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Article

An Efficient Topology for Wireless Power Transfer over a Wide Range of Loading Conditions

1
School of Automation, Beijing Institute of Technology, Beijing 100081, China
2
School of Energy and Environment, City University of Hong Kong, Hong Kong, China
*
Author to whom correspondence should be addressed.
Energies 2018, 11(1), 141; https://doi.org/10.3390/en11010141
Submission received: 7 December 2017 / Revised: 31 December 2017 / Accepted: 3 January 2018 / Published: 6 January 2018

Abstract

:
Although an inductive power transfer (IPT) system can transfer power efficiently in full-load conditions, its efficiency obviously decreases in light-load conditions. To solve this problem, based on a two-coil IPT system with a series-series compensation topology, a single-ended primary-inductor converter is introduced at the secondary side. By adjusting the set effective value of the current in the primary coil, the converter input voltage changes to maintain the equivalent input resistance of the converter in an optimal condition. The system can then transfer the power efficiently with the wide load conditions. Moreover, the system operates at a constant resonance frequency with a high power factor. Both the simulation and experimentation of a prototype with a 10 W IPT system demonstrate the effectiveness of the proposed topology for wireless power transfer.

1. Introduction

Compared to the cable charging, wireless power transfer (WPT) technology is more secure and convenient due to its feature of having no wires. This technology has received increasing attention in many fields [1,2], especially in recent years. Additionally, many WPT studies have been conducted for mobile phones [3], biomedical implants [4,5,6], and electric vehicles [7,8,9].
These inductive power transfer (IPT) applications receive the energy from the charger and store it into the battery. Thus, the technology to charge the battery is important. To simplify the design of the WPT system, the battery can be considered a wide range of variable resistance. Researchers have undertaken many studies to achieve efficient transmission regardless of load conditions. A method for improving efficiency by adjusting the operating frequency was presented in [10], which may require a greater input voltage or current if the operating frequency is not equal to the resonant frequency. Accordingly, higher performance components were selected.
Different coupling compensation circuits were adopted to improve circuit efficiency [4,6,11,12]. In addition, four basic topologies of compensation circuits exist, depending on how the compensation capacitors are connected to the primary and secondary coils: series-series (SS), series-parallel, parallel-series, and parallel-parallel topologies. These topologies were analyzed in detail in reference [13]. An inductor/capacitor/capacitor compensation topology was adopted in both the primary and secondary circuits in [11,12], while it was inserted at only the primary side in [8]. Meanwhile, an inductor/capacitor topology was placed at the secondary side in [4] and an inductance was paralleled before the rectifier circuits in [6]. All of them can improve efficiency, although additional inductors or capacitors also result in different voltage and current characteristics. Therefore, according to the expecting characteristics in an application, a specific compensation circuit is necessary.
Another common approach is to use dc-dc power converters in various ways after the rectifier circuit to adjust its equivalent input resistance. The examples of this approach are the buck converter used in electrical vehicles in [8,12] and the boost converter used in [14]. If the output voltage is constant, boost converters can increase the input voltage and decrease the input load resistance, whereas buck converters can decrease the input voltage and increase the input load resistance. These two circuits can only meet resistance changes within a certain range. To solve this problem, a cascaded boost-buck converter at the secondary side was designed and presented to provide optimal impedance matching for various loads [15,16]. The control methods of this kind of boost-buck converters are convenient to analyze, because the boost and buck converters can be separately analyzed. However, the efficiency of a two-stage power converter is generally lower than a single-stage power transfer’s. Moreover, extra microcontrollers will consume more power. Compared with those in continuous conduction mode [17], the buck-boost converters in discontinuous conduction mode [18] were apparently suitable for impedance matching because their input resistances were independent of their load resistances and input voltages. Differently from an independent buck or boost converter, a buck-boost converter output voltage is opposite in polarity to its input voltage, and its input current is discontinuous.
Moreover, an interleaved dc-dc converter at the secondary side was introduced in [19], which consists of two single-ended primary-inductor converters (SEPIC) in parallel. A dc-dc converter based on a half-bridge inverter was also designed to meet the response requirements during the movement of the vehicle in [9,20]. This two topologies can also achieve efficient energy transmission.
A SEPIC converter [21] and a buck converter [22] were introduced to cascade at the secondary side to match load impedances with input impedances for larger power transfer. However, such approaches result in losing at least 50% of input power. Therefore, they are suitable only for some specific applications.
Based on the above researches and successful schemes, an efficient topology of IPT systems in low-power applications is proposed in this paper. The objective of the proposed topology is to maintain the efficiency of the coupling compensation circuits as being always highest under different system load resistance conditions. Therefore, the total efficiency of the system will be high. A peak current mode controlled SEPIC converter is used to make its input resistance the most suitable and its output voltage constant. The converter can increase and decrease its input resistances, and it is not required to communicate with the primary circuit, which means no microcontroller is needed.
The contents of this paper are arranged as follows. Firstly, mathematical models of the primary and secondary circuit are built to estimate the output resistance of the rectifier circuit as well as the input resistance of the dc-dc converter while making the system the most efficient. Secondly, the relationship between the resistance and efficiency is transferred to the relationship between the primary current and efficiency. The system is only required to maintain the optimal primary current for highest efficiency. Finally, both the simulation and hardware system are conducted to verify its feasibility and effectiveness.

2. Proposed System

The structure of the proposed IPT system is presented in Figure 1. It consists of a full-bridge inverter, a coupling compensation circuit, a full-bridge rectifier circuit, and a SEPIC converter.
A SS compensation circuit is used in this system, which operates at a fixed resonant frequency independent of the system load resistance and coupling coefficient. If the system runs at a resonant frequency, its power factor is one. The output voltage of the full-bridge inverter is changed by changing the phase difference between the controlling signals of the two half-bridge inverters included in the full-bridge inverter.
In the secondary circuit, energy is received by the secondary coil. After a rectifier circuit, a SEPIC converter is used to output a constant voltage. A closed-loop control at the primary side is also designed to optimize the equivalent load resistance after the rectifier for maximum energy efficiency. The input resistance of the dc-dc converter is only determinate when the efficiency is the highest. It can be known from the configuration of the system that the change of the setting effective value of the current in the primary coil will change the input voltage of the SEPIC converter. The input resistance of the converter will be changed, accordingly. Therefore, the effective value of the primary current will be adjusted to an appropriate setting value, which is estimated based on the coupling coefficient and input power for providing a stable voltage to the secondary side. In addition, the SEPIC converter is automatically adjusted to adapt itself to the changes of the primary side without any communication.

3. Circuit Design

3.1. Primary Circuit Design

The primary circuit includes an input dc voltage, a full-bridge inverter, a primary coil, and its compensation capacitor.
Figure 2 depicts the control signals of switches S1~S4 and the output voltage of the full-bridge inverter. The control signal of switch S1 is always opposite to S2, and the relationship between S3 and S4 is opposite, too. Based on phase-shift pulse width modulation (PWM), the control signal of S1 leads S4, and their phase difference is β.
Based on fundamental analysis, the three-level square-wave signal output by the inverter can be equivalent to the sinusoidal voltage at the same frequency, which is the base of the subsequent analysis. The larger is phase shift angle β, the greater is the fundamental voltage. Thus, the current in the primary coil is sampled for calculating its effective value. Then, according to the error between the set value and the calculated current, the phase shift angle β is adjusted to change the fundamental voltage for maintaining the effective value of the primary current iP constant.
A SS compensation equivalent circuit is shown in Figure 3, where uP is the output of the full-bridge inverter. Moreover, LP and CP comprise the primary series resonant circuit, while LS and CS comprise the secondary series resonant circuit. Resistance R is the equivalent resistance of the subsequent circuit. Furthermore, rP and rS are the equivalent loss resistance of the primary and secondary coil, respectively, and uS is the output voltage of the coupling compensation equivalent circuit.
Based on Figure 3, the equivalent model expressed by the phasor is established, as shown in Equation (1). U ˙ P , I ˙ P , and I ˙ S are the phasor representations of uP, iP, and iS, respectively. M is the mutual inductance and satisfies M = k L P L S (k represents the coupling coefficient), while ω is the operating frequency.
U ˙ P = ( j ω L P j 1 ω C P + r P ) I ˙ P j ω M I ˙ S j ω M I ˙ P = ( j ω L S j 1 ω C S + R + r S ) I ˙ S
It can be known from Equation (1) [13] that when the system operates at the frequency of ω0, the power factor of coupling compensation circuit is one. It is evident that ω0 only involves LP, CP, LS, and CS, which is independent of the system load resistance and coupling coefficient.
ω 0 = 1 L S C S = 1 L P C P
If the operating frequency is ω0, the reflected impedance of the secondary side to the primary side can be matched with the complex conjugate of the primary circuit, and the maximum power transmitted to the secondary side PS_max can be calculated as shown in Equation (3). When the power transmitted to the secondary side is maximum, M is equal to r P ( r S + R ) / ω 0 at the constant load R, i.e., the load R is equal to ω02M2/rPrS at the constant M. Additionally, the maximum power (PR_max) of the load R can be calculated as shown in Equation (4). When the power transmitted to the load R is maximum, the load R is equal to ω02M2/rP + rS if M does not change.
P S _ max = | U ˙ P | 2 / ( 4 r P )
P R _ max = ω 0 2 M 2 | U ˙ P | 2 / ( 4 ω 0 2 M 2 r P + 4 r P 2 r S )
G P = η C G T = P R / P S _ max = 4 r P ω 0 2 M 2 R / [ r P ( R + r S ) + ω 0 2 M 2 ] 2 G A = P R _ max / P S _ max = ω 0 2 M 2 / ( ω 0 2 M 2 + r P r S )
where GP, GT, GA is the power gain, the transducer gain, and the available gain of the coupling compensation circuit, respectively. ηC is the efficiency of the coupling compensation circuit, and PR is the received power of the load R.
To make the power transmitted to the secondary side maximum or the power transmitted to the load R maximum, the load resistance R needs to be adjusted, and the efficiency is too small at this time. To improve the efficiency, a control method with efficiency priority is put forward at the expense of the low GT in this paper.
When the operating frequency is ω0, the efficiency formula of the coupling circuit is shown in Equation (6). The equation is derived, and the coupling compensation circuit is the most efficient when the output resistance R is equal to the optimal resistance, Rop.
η C = ω 0 2 M 2 / ( 1 + r S / R ) ( ω 0 2 M 2 + r P ( R + r S ) ) R o p = r S / r P ω 0 2 M 2 + r S 2
The relationship between the optimal resistance and optimal primary current can be deduced from Equation (1), as shown in Equation (7). To ensure that R always remains around Rop, the primary current should be guaranteed to be optimal. In Equation (7), IP and IS denote the effective value of the fundamental current in the primary and secondary coil, respectively. PIN is the input power and α is defined as the ratio of IP and IS. When R is equal to the optimal resistance Rop, α is around one.
I P = α P I N α r P + ω 0 M α P I N ω 0 k L P L S α = I P I S = R + r S ω 0 M
α op = R o p + r S ω 0 M 1 ( r P = r S )
Besides the coupling compensation circuit, the SEPIC and rectifier circuit must be analyzed for obtaining the relationship between the system load resistance RL and R, and the calculation formula of the overall system efficiency.
The relationship between the input and output of the SEPIC circuit is expressed as [21]:
I L I 1 = 1 D D U L U 1 = η S D 1 D
where U1 and UL are the average values of the input and output voltages of the SEPIC circuit, respectively. I1 and IL are the average values of the input and output currents of the SEPIC circuit, respectively. D is the duty cycle of the control signal of switch S5, and ηS is the efficiency of the SEPIC circuit.
In addition, R1 is the input equivalent resistance, and the relationship between R1 and RL can be obtained as shown in Equation (10).
R 1 = ( 1 D ) 2 η S D 2 R L
The relationship between the input and output of the rectifier circuit is expressed as:
I S = π 2 2 I 1 U S = 2 2 π ( U 1 + 2 V D ) = 2 2 η D π U 1
where US is the effective value of the fundamental voltage on the resistor R. VD is the forward voltage drop across the diode D1~D4, and ηD is the efficiency of the rectifier circuit.
The relationship between R1 and RL can be obtained as shown in Equation (12) by calculating Equation (11):
R = 8 η D π 2 R 1 = 8 ( 1 D ) 2 η D η S π 2 D 2 R L
When the mutual inductance is constant, the input power will instantly change as the system load changes. By adjusting the setting effective value of the primary current, the SEPIC circuit will automatically adjust the duty cycle to output various power levels with a constant voltage output, and load R of the coupling circuit will be maintained at the optimal value.
The overall system efficiency is shown in Equation (13), which is the product of the efficiency of the coupling compensation circuit (ignoring the full-bridge inverter), the rectifier, and the SEPIC circuit.
η = η C η D η S
When the efficiency of the coupling compensation circuit is optimal, the whole system efficiency depends on the SEPIC circuit and rectifier. For a SEPIC circuit, by selecting the correct components and optimizing the control, a higher efficiency will be achieved. For the rectifier, a high efficiency will be realized when the diode conduction voltage is much smaller than the effective value of U1. The setting effective value of the primary current cannot be too small because a small primary current results in the small value of U1.
However, the loss power of the rectifier is not small in low-power applications when the appropriate diodes are selected. This is the drawback of using rectifier diodes. In practical applications, the IP in Equation (7) must be corrected.

3.2. Secondary Circuit Design

The common battery charging method is the constant current/constant voltage charging control scheme, which requires a charging management chip. To simplify the charging management circuit, it is herein regarded as a variable system load resistance, RL. The secondary circuit shown in Figure 1 includes a secondary coil, a series capacitor, a full-bridge rectifier circuit, and a dc-dc circuit.
As shown in Figure 4, a SEPIC topology is used in the dc-dc circuit, which can increase and decrease the voltage. When MOSFET S5 is turned on, the diode D5 is in the cutoff state and the system load is supplied by the capacitance C2. When MOSFET S5 is turned on, the relationship between the various parameters is shown in Equation (14) (the voltage of diode D5 is ignored).
X ˙ = A 1 X + B 1 U 1 Y = C 1 X X = [ I 1 U C 1 I 2 U L ] Y = I 1 + I 2 A 1 = [ 0 0 0 0 0 0 1 C 1 0 0 1 L 2 0 0 0 0 0 1 R L C 2 ] B 1 = [ 1 L 1 0 0 0 ] C 1 = [ 1 0 1 0 ]
On the other hand, when MOSFET S5 is turned off, the diode D5 is in the conduction process and the system load is supplied by the input power supply. In this state, the relationship between the various parameters is shown in Equation (15) (the voltage of diode D5 is ignored).
X ˙ = A 2 X + B 2 U 1 Y = C 2 X X = [ I 1 U C 1 I 2 U L ] Y = I 1 + I 2 A 2 = [ 0 1 L 1 0 1 L 1 1 C 1 0 0 0 0 0 0 1 L 2 1 C 2 0 1 C 2 1 R L C 2 ] B 2 = [ 1 L 1 0 0 0 ] C 2 = [ 1 0 1 0 ]
Based on the state-space averaging method, the state space model of the entire SEPIC converter is shown in Equation (16).
X ˙ = A X + B U 1 Y = C X A = D A 1 + ( 1 D ) A 2 B = D B 1 + ( 1 D ) B 2 C = D C 1 + ( 1 D ) C 2
By adding a small signal perturbation to X, Y, U1, and D, respectively, the four matrixes become X + x ^ , Y + y ^ , U 1 + u ^ 1 , and D + d ^ . Thus, the relationship of these small signal perturbations is expressed as:
x ^ ˙ = A x ^ + B u ^ 1 + [ ( A 1 A 2 ) X + ( B 1 B 2 ) U 1 ] d ^ y ^ ˙ = C x ^ + ( C 1 C 2 ) X d ^
Using Equation (17), y ^ can be calculated as:
y ^ = G y d d ^ + G y u u ^ 1 G y d = C ( s I A ) 1 [ ( A 1 A 2 ) X + ( B 1 B 2 ) U 1 ] + ( C 1 C 2 ) X G y u = C ( s I A ) 1 B
In Equation (18), Gyd is the transfer function between y ^ and d ^ . Gyu is the transfer function between y ^ and u ^ .
After analyzing the SEPIC circuit, it can be known that the output voltage increases as the duty cycle increases when the input voltage is constant, and the opposite is true when the input current is constant. The system efficiency and control performance of the two control methods are not significantly different. To simplify the design, a commercial control chip of a SEPIC circuit is used in this system. These commercial control chips are generally designed for constant input voltage.
The aim of inserting Rslope is to add a ramp signal to the voltage of the current sense resistor RS to eliminate the instability of the open loop. Based on Figure 5, a mathematical model was built, as shown in Equation (19).
V C = 8 [ R S ( I 1 + I 2 + 0.5 S n D T ) + S e D T ] S n = U 1 ( L 1 + L 2 ) ( L 1 L 2 ) 1 S e = ( R S + R s l o p e ) I s l o p e T 1
where T is the period of the switching S5. Sn is the rising slope of the current through S5 when switch S5 is turned on. And Se is the slope of the ramp voltage.
The current through S5 during the turn-on state is the sum of I1 and I2, while the current through S5 during the turn-off state is zero. The inner current loop can predict the changes of the output voltage in advance and quickly adjust the output voltage of the SEPIC converter, which optimizes the control performance. When output voltage UL is constant, Equation (19) is satisfied.
A small signal perturbation is added to U1, D, I1, I2, and VC, respectively, and the five parameters are respectively changed to U1 + u ^ 1 , D + d ^ , I1 + i ^ 1 , I2 + i ^ 2 , and VC + v ^ c . Thus, the relationship of these small signal perturbations is expressed as:
d ^ = F m [ ( 8 R S ) 1 v ^ c i ^ 1 i ^ 2 F 1 u ^ 1 ] F m = R S [ S e T + R S U 1 ( L 1 + L 2 ) ( 2 L 1 L 2 ) 1 T ] 1 F 1 = D ( L 1 + L 2 ) ( 2 L 1 L 2 ) 1 T
Based on Equations (14)–(18), the following formula can be derived:
i ^ 1 + i ^ 2 = G i d d ^ + G i u u ^ 1 u ^ L = G u d d ^ + G u u u ^ 1
By calculating Equations (20) and (21), the transfer function of the power stage is shown in Equation (22).
G P o w e r = u ^ L v ^ c = F m G u d ( 8 R s ) 1 ( 1 + F m G i d ) 1
The error amplifier is an operational transconductance amplifier. Its transfer function is shown in Equation (23).
G e = g m R o u t V R E F U L 1 ( 1 + R c o m p C c o m p s ) [ 1 + ( R c o m p + R o u t ) C c o m p s ] 1
If the parameters of the inductances and capacitances are determined, the transfer function of the power stage will not change. By adjusting the parameters of the error amplifier, an effective control can be achieved. To ensure the phase margin between 30 and 60 degrees, the desired gain crossover frequency can be set around the minimum corner frequency of the transfer function of the power stage.

4. Simulation Results

A Simulink simulation model was established to verify the feasibility of the model based on the theoretical analysis. The full-bridge inverter of the system operated at 100 kHz, and the SEPIC converter operated at 1 MHz. The parameters of the system are shown in Table 1.
As shown in Table 1, the two identical coils were used in the coupling compensation circuit. After simulation by using JMAG Designer, the coupling coefficients at the vertical distance of 1.8 cm, 1.5 cm, and 1.2 cm are calculated as 0.31, 0.40, and 0.51, respectively. For the coupling coils, its magnetic field distribution at 1.5 cm is shown in Figure 6 as an example. The magnetic flux density is obviously enhanced by soft magnetic material, as shown in Figure 6a, while the maximum magnetic flux density is in the center of the plane between the two parallel coils.
For the full-bridge inverter, its output voltage and the measured value of IP are shown in Figure 7 when the effective values of the primary current, the distance of the coils, and the output power are 3 A, 1.5 cm, and 9.78 W. UM is the measured value of IP and U M = 0.2 I P + 1.65 . The inverter output voltage’s phase shift angle β is approximately 127 degrees. A small depression exists in the waveform of UM, which is caused by high-frequency signals.
The forward voltage across the diodes in the rectifier is set to 0.25 V. Considering the rectifier diodes, Formula (24) must be modified. Moreover, iterative calculations and a curve fitting method are used to replace the onerous manual computation for the extreme value of the overall efficiency.
The relationship of IP, PIN, and k is shown in Equation (25).
I P = α P I N ω 0 k L 1 L 2 = 0.42 ( P I N k ) 0.5
I P = 0.94 ( P I N k ) 0.36
Furthermore, the power supply of the control chip used in the SEPIC converter is at least 4.5 V. When the coupling coefficients are 0.51, 0.4, and 0.31, the minimum effective values of the primary current are set to 1.6 A, 2 A, and 2.65 A, respectively.
In Figure 8, the effective values of the primary current in the different schemes are 2 A, 3 A, and variable, respectively. The results show that the system controlled by the proposed control method has a higher efficiency. Compared with 3A RMS constant primary current control scheme, the efficiencies of the proposed control method increase from 49.8% to 71.4% at 1.2 cm, 53.0% to 69.0% at 1.5 cm, and 52.6% to 57.5% at 1.8 cm at 1 W output power. The efficiencies of the proposed control method do not decrease and are 83.8% at 1.2 cm, 83% at 1.5 cm, and 79.9% at 1.8 cm at 9.78 W output power. The optimal primary currents change with the different output power. As shown in Figure 8b, the efficiencies of “Ip = 2 A” are optimal at low power output and small at high power output, whereas the efficiencies of “Ip = 3 A” are optimal at high power output and small at low power output. Additionally, the efficiencies of the proposed method can always stay optimal.
The power gain (GP), the transducer gain (GT), and the available gain (GA) of the coupling compensation circuit are only studied in the simulation, because it is difficult to measure the voltages and currents of the coupling compensation circuit input and output in the experiments. Thus, GP, GT, GA cannot be calculated easily in practice. Figure 9 shows the simulation results of GP, GT, GA at different coupling coefficients. Although GT is small, GP can always keep high. When GP is about 50%, GT is about 100%, and GA can keep constant as the output power is changing. When the coupling coefficients are 0.51, 0.40, and 0.31, GA are 99.97%, 99.96%, and 99.93%, respectively.
From Figure 8 and Figure 9, it can be seen that GP or the efficiencies of the proposed method decrease with the reduction of the output power and the coupling coefficients. When the output power is 1 W, the optimal efficiencies of the proposed control method are 71.4% at 1.2 cm, 69.0% at 1.5 cm, and 57.5% at 1.8 cm. Additionally, the power gains of the coupling circuit are 90.3% at 1.2 cm, 87.1% at 1.5 cm, and 77.6% at 1.8 cm. The proposed system can still keep the efficiencies optimal, although the efficiencies decrease somewhat.

5. Experimental Results

After the simulation, the hardware scheme was used to verify the validity of the proposed topology for WPT. The experiment adopted TMS320F28335 as the controller at the primary side, MAX16992 as the controller of the SEPIC circuit, and MAX1757 as the charging management chip. The rectifier diodes were V25PN60, with a forward voltage of 0.25 V at a current of 5 A and a forward voltage of 0.45 V at a current of 25 A. Two identical coupling coils were 760308103102. The inductances of coils were 10 μH and the loss resistance was 0.055 Ω. After some experiments, the coupling coefficients at 1.8 cm, 1.5 cm, and 1.2 cm are calculated as 0.29, 0.40, and 0.51, respectively. These results are consistent with the simulation.
The hardware system is shown in Figure 10. At the primary side, P1 is the port for DSP power supply, and P2 is the input voltage port of the full bridge circuit. At the secondary side, P4 is connected to the secondary coil, P5 is connected to the system load RL, and P6 is connected to two lithium batteries.
The diagram of the full-bridge inverter output voltage and the measured value of IP are shown in Figure 11 when the effective values of the primary current, the distance of the coils, and the output power are 3 A, 1.5 cm, and 10.4 W. It shows that the phase shift angle β of the output voltage is approximately 110 degrees, and the peak-peak value of UM is around 1.77 V. IP can be calculated to be 3.1 A. The system operates well.
During this experiment, P6 was disconnected. P2, the +10 V power supply, and the ammeter were connected in series. P5 was connected in series with different resistances and the ammeter. A voltmeter was used to measure the input and output voltage. The system efficiency could be computed based on these data.
The system controlled by the proposed control method shows a higher efficiency, as depicted in Figure 12. Compared with 3 A RMS constant primary current control scheme, the efficiencies of the proposed control method increase from 22.5% to 34.3% at 1.2 cm, 22.6% to 32.0% at 1.5 cm, and 21.2% to 27.6% at 1.8 cm at 1 W output power. The efficiencies of the proposed control method increase from 67.7% to 69.7% at 1.2 cm, 67.2% to 68.6% at 1.5 cm, and 63.9% to 66.7% at 1.8 cm at 10.4 W output power. The efficiencies of the SEPIC converter in the independent measurement are 51% at 1 W output and 82% at 10.4 W output. It is seen that the coupling compensation circuit has a less power loss. Most of the loss power is caused by the SEPIC converter. In the experiment, the efficiency of the SEPIC converter is limited by the MAX16992 converter. To further improve the efficiency of the system, the research on a higher efficiency SEPIC converter is needed in the future.
When the vertical distances of coils are 1.8 cm, 1.5 cm, and 1.2 cm, the coupling coefficients are 0.29, 0.40, and 0.51, respectively. If the vertical distance of coils is 1.2 cm and the misalignment horizontal distances of coils are 1.3 cm, 0.9 cm, 0 cm, the coupling coefficients are 0.29, 0.40, and 0.51, respectively. The experiments at different misalignment horizontal distance are similar to the ones at different vertical distance if the coupling coefficients are the same.
Figure 13 shows the efficiencies and output power of the proposed method at different loads while k = 0.29, 0.40, 0.51, respectively. With the increase of the output power and coupling coefficient, the efficiencies are also improved.
In the references of the DC-DC converters adopted, their power levels range from 100 to 600 W and the efficiencies range from 65% to 79%. The power in our experimental system is only 10 W and the efficiency is up to 68.6% at 1.5 cm vertical distance of two coils. As its power is small, the controller and other factors have a great impact on the total efficiency. Neglecting the influence of these factors, the experimental result is basically consistent with the simulation result. The proposed system may have a high efficiency.

6. Conclusions

This paper presents an optimization scheme of a low-power wireless charging system under different load conditions. The scheme requires no communication, which improves system efficiency. The introduction of SEPIC makes the output resistance in the coupling circuit flexible from zero to infinity, which is beneficial to the realization of the control scheme. A simulation of a 10-W IPT system and a corresponding hardware scheme were conducted, which demonstrated the validity and effectiveness of the proposed topology for WPT.
Besides the coupling circuit, the rectifier and the dc-dc circuits also need to be improved in terms of efficiency. The rectifier circuit has a certain influence on the relationship between the optimal primary current and the input power in low-power applications; thus, the control scheme needs adjusted further for the practical application. If the diodes in the rectifier circuit are replaced by the switch tubes, efficiency will be significantly improved. At the same time, the design of an efficient dc-dc circuit is also very important. Direct use of the SEPIC circuit as a charge management circuit is another direction for future research. For high-power applications, the proposed system provides a reference. In a follow-up study, the efficiencies of the other parts in the wireless charging system will be examined and improved, and the application of the proposed control system on the high-power equipment will be explored.

Acknowledgments

This work was supported by a grant (Project No. 2014BAF08B06) from the Natural Key Technology Support Program of Ministry of Science and technology, China.

Author Contributions

All authors contributed equally in preparing this manuscript.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Proposed WPT system with bilateral independent control.
Figure 1. Proposed WPT system with bilateral independent control.
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Figure 2. MOSFET control signals in a full-bridge inverter (β is the phase-shifting angle).
Figure 2. MOSFET control signals in a full-bridge inverter (β is the phase-shifting angle).
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Figure 3. Equivalent coupling compensation circuit.
Figure 3. Equivalent coupling compensation circuit.
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Figure 4. Topology of SEPIC circuit: (a) MOSFET S5 is turned on; and (b) MOSFET S5 is turned off.
Figure 4. Topology of SEPIC circuit: (a) MOSFET S5 is turned on; and (b) MOSFET S5 is turned off.
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Figure 5. Peak current mode of a dc-dc circuit.
Figure 5. Peak current mode of a dc-dc circuit.
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Figure 6. Magnetic field distribution: (a) magnetic flux line distribution; (b) magnetic flux density distribution at the plane between two parallel coils.
Figure 6. Magnetic field distribution: (a) magnetic flux line distribution; (b) magnetic flux density distribution at the plane between two parallel coils.
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Figure 7. Input voltage and current of coupling compensation circuit: (a) output voltage of full-bridge inverter; and (b) measured value UM of IP.
Figure 7. Input voltage and current of coupling compensation circuit: (a) output voltage of full-bridge inverter; and (b) measured value UM of IP.
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Figure 8. Comparison of efficiencies at different primary currents: (a) vertical distance of coils is 1.2 cm (k = 0.51); (b) vertical distance of coils is 1.5 cm (k = 0.40); (c) vertical distance of coils is 1.8 cm (k = 0.31).
Figure 8. Comparison of efficiencies at different primary currents: (a) vertical distance of coils is 1.2 cm (k = 0.51); (b) vertical distance of coils is 1.5 cm (k = 0.40); (c) vertical distance of coils is 1.8 cm (k = 0.31).
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Figure 9. Power gain, transducer gain, and available gain of coupling compensation circuit controlled by proposed method: (a) vertical distance of coils is 1.2 cm (k = 0.51); (b) vertical distance of coils is 1.5 cm (k = 0.40); (c) vertical distance of coils is 1.8 cm (k = 0.31).
Figure 9. Power gain, transducer gain, and available gain of coupling compensation circuit controlled by proposed method: (a) vertical distance of coils is 1.2 cm (k = 0.51); (b) vertical distance of coils is 1.5 cm (k = 0.40); (c) vertical distance of coils is 1.8 cm (k = 0.31).
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Figure 10. Hardware system: (a) circuit at the primary side, (b) circuit at the secondary side, and (c) coupling coils.
Figure 10. Hardware system: (a) circuit at the primary side, (b) circuit at the secondary side, and (c) coupling coils.
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Figure 11. Input voltage and input current of the coupling compensation circuit in the experiment: (a) output voltage of the full-bridge inverter, and (b) measured value UM of IP.
Figure 11. Input voltage and input current of the coupling compensation circuit in the experiment: (a) output voltage of the full-bridge inverter, and (b) measured value UM of IP.
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Figure 12. Comparison of efficiencies at different primary currents: (a) vertical distance of coils is 1.2 cm (k = 0.51); (b) vertical distance of coils is 1.5 cm (k = 0.40); (c) vertical distance of coils is 1.8 cm (k = 0.29).
Figure 12. Comparison of efficiencies at different primary currents: (a) vertical distance of coils is 1.2 cm (k = 0.51); (b) vertical distance of coils is 1.5 cm (k = 0.40); (c) vertical distance of coils is 1.8 cm (k = 0.29).
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Figure 13. Comparison of efficiencies and power at different loads while k = 0.29, 0.40, 0.51.
Figure 13. Comparison of efficiencies and power at different loads while k = 0.29, 0.40, 0.51.
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Table 1. Key Simulation Parameters of Proposed IPT System.
Table 1. Key Simulation Parameters of Proposed IPT System.
Parameters of the Coupled CircuitValueParameters of the Dc-Dc CircuitValue
LP/LS(rs/rp)10 μH (0.05 Ω)L133 μH
CP/CS0.247 μFL215 μH
UDC10 VC14.7 μF
POUT_max9.78 WC222 μF
UL9.89 V

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Li, T.; Wang, X.; Zheng, S.; Liu, C. An Efficient Topology for Wireless Power Transfer over a Wide Range of Loading Conditions. Energies 2018, 11, 141. https://doi.org/10.3390/en11010141

AMA Style

Li T, Wang X, Zheng S, Liu C. An Efficient Topology for Wireless Power Transfer over a Wide Range of Loading Conditions. Energies. 2018; 11(1):141. https://doi.org/10.3390/en11010141

Chicago/Turabian Style

Li, Tianqing, Xiangzhou Wang, Shuhua Zheng, and Chunhua Liu. 2018. "An Efficient Topology for Wireless Power Transfer over a Wide Range of Loading Conditions" Energies 11, no. 1: 141. https://doi.org/10.3390/en11010141

APA Style

Li, T., Wang, X., Zheng, S., & Liu, C. (2018). An Efficient Topology for Wireless Power Transfer over a Wide Range of Loading Conditions. Energies, 11(1), 141. https://doi.org/10.3390/en11010141

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