Integrated Solution for Driving Series-Connected IGBTs and Its Natural Intrinsic Balancing

Abstract

The use of series connected IGBTs is still a current subject in literature, despite such a discussion having started in the 1990s. Though countless academic studies, there are currently no available commercial products on the market for medium voltage inverters (up to 4.16 kV) and lower power (up to 1 MW) using this technology. This is related to the difficulty of ensuring the dynamic and static voltage sharing between IGBTs, giving rise to relatively expensive and complex firing circuits, when compared to the components they intend to control. Therefore, this article aims to present a simple and low-cost alternative, still effective for driving low voltage series-connected IGBTs, specifically for the encapsulation TO-247 type. Experimental results are presented showing the behavior of the solution under several operating conditions.

1. Introduction

The medium voltage semiconductor device market is fairly restricted and has a low component consumption when compared to the low voltage semiconductors market. Thus, the speed of development and the cost of medium voltage semiconductor devices has not followed the same trend seen in the low voltage device market over the last few decades.

This deflection between the evolutionary curve of these two areas creates the opportunity to review methods and topologies that address the use of series-connected semiconductor devices. With specific interest in the niche of medium voltage inverters (up to 4.16 kV) with lower power (up to 1 MW), more efficient, advanced and lower cost components, currently available on the low voltage market, can be used in series connection, in order to meet the requirements of medium voltage equipment. However, this better trade-off collides with the difficulty of ensuring the dynamic and static voltage sharing between the devices.

Some IGBTs series connection techniques were introduced and discussed in [1,2,3,4], which summarized that the difficulties of this association were related to the following intrinsic characteristic differences in: Leakage currents (Ices); tail currents; output capacitances (Cce); gate threshold voltages (Vth); gate-emitter capacitances (Cge). As well as the following extrinsic characteristics, referring to the load and gate circuit differences in: Series parasitic inductances between devices; control circuits, due time delays between parallel firing channels; parasitic capacitances of each gate driver power supply.

There are many methods that aim to overcome such differences and ensure voltage sharing. Primarily, they can be divided into three broad categories and some subcategories [5]: Passive or active snubbers circuits; active gate control circuits; and voltage clamping circuits. As shown in Figure 1.

The static voltage unbalance is caused by the difference in the device tail current, resulting in distinct widths of their depletion regions and voltage blocking. In order to make it clear, a practical turn-off switching example, obtained by [4], is presented at Figure 2a and it shows the static voltage unbalance occurring before 35 µs (turn-on) and after 65 µs (turn-off) instants. This physical effect is usually avoided by a parallel resistor with each device in series. In this regard, they can also be used together with active methods, as these usually act only during switching transients [6,7,8]. Also, they can be series-connected with zener diodes [9,10,11], reducing losses by limiting their operation range. In the active category, there are methods that temporarily put the device back into the active region, increasing the losses of the semiconductor devices. For example, the active voltage control (AVC) [12,13] provides a temporary clamping preconditioning step, avoiding the static unbalance after a certain period, under penalty of a complex analog and digital control system. Also, there is a zener voltage clamp feeding the gate signal back [3,14], which limits the static voltage unbalance between devices. However, this would not necessarily reach parity, because it fits more adequately as a maximum voltage protection or an active clamping.

The dynamic voltage unbalance is the one which occurs during the switching transient, and can essentially be rejected in two ways [7]. The first one is the load-side balancing and uses simple circuits such as passive snubbers C, RC, RCD, PC [5,10] or more complex circuits such as active snubbers [15,16]; The other is the gate-side balancing, where the firing circuit is used to actively act on the current or voltage profile of the gate. Also, for practical elucidation, a turn-on transient example [4], is presented in Figure 2b where a voltage zoom shows clearly a poor dynamic voltage sharing when no-balancing method is applied.

In [1], an active firing solution for series-connected IGBTs was described and an analogue feedback control circuit was used. Thus, the individual firing circuits received a predefined reference and manipulated each gate voltage profile, so that the Vce voltages of the devices followed the reference. However, by restricting the transient, imposing a slower reference, and by defining a fixed initial preconditioning stage, this method increases the switching losses [5]. In [17], a current feedback control (di/dt) was internally inserted to the previous Vce voltage controller, being able to increase its bandwidth, under the penalty of inserting a new sensor and making the control adjustment more complex. Another evolution of the method [1] was proposed by [8], where the fixed parameters of the model (Vce reference and preconditioning step) were now dynamically estimated and varied in order to obtain optimal losses and voltage sharing. However, the greater flexibility imposes the need for a micro controlled system with A/D conversion, making it even more complex and with dynamic limitation.

In [18], the voltage unbalance was avoided by inserting time delays into the gate signals of each semiconductor device. Effectively, in a series connection, leading or lagging one device firing command directly influences the blocking voltage of the others. For that purpose, a feedback control system tracks the required delays to impose optimal balancing, taking some time up to the convergence. In general, the solution presented low reliability [5], besides the need for micro-processing and A/D conversion, which greatly increased its complexity and reduced its dynamic response. Therefore, it ended up limiting the class of IGBTs in which such a system could be used, being restricted to those with slower switching times. In [19], a micro-controller was used to track and reject delay times in the IGBT firing commands, as well as to integrate the concepts of passive control (snubber RC) and active voltage clamping.

In [20], to overcome the asynchronous firing commands, a balancing core was proposed (Figure 3), avoiding time differences of the firing commands due to the imposition of magnetically induced currents in the gate driver circuits. According to [5], this method presents moderate reliability and high complexity, due to the need for parallel coupling between the firing channels.

Returning to the concept of passive voltage sharing, in [21] the effects of the parasitic capacitances on the series connected IGBTs were analyzed. They came from the gate driver power supply and were due to the load side geometry. Two proposals were presented: The first was based on a self-powered firing circuit, which decreased its parasitic capacitance; the second one was based on a three-dimensional connection of the IGBTs, which physically also allowed for the decrease and more balanced distribution of parasitic capacitances. Essentially, this method explored the need for a careful look at one of the extrinsic characteristics. In this way, interestingly, it focused on the cause and not on its effect. However, the intrinsic characteristics were totally denied.

An interesting firing solution was proposed in [22] for individual IGBT firing. It used a double magnetic link through which the power supply energy and the firing command (high-frequency encoded) were transmitted (Figure 4). Therefore, it is possible to eliminate the auxiliary power supplies required for each gate driver circuit. However, high-frequency data transmission, over a non-insulated link from the load side, makes this method more complex to ensure electromagnetic compatibility and the ability to decode the firing signal.

Based on the literature reviewed, it is clear that the complex methods are suitable for firing medium voltage IGBTs, as they present a dynamic response limitation. They demonstrate results for devices with switching times of a few micro-seconds. In addition, its complexity drastically increases the cost, due to the use of digital and/or analogue feedback systems, besides the need for auxiliary power supplies with specific galvanic isolation for medium voltage class. Therefore, they are only justified when driving medium voltage and high power IGBTs, since it equalizes its relative cost. Consequently, they would give rise to solutions with tens of kilovolts.

This article specifically focused on practical feasibility and proposes an effective, simple and low-cost solution oriented to the specific niche of medium voltage inverters (up to 4.16 kV) with lower power (up to 1 MW). In this regard, it is considered that the use of semiconductor devices will be restricted to ultra-fast IGBTs (for example, with rise times less than 100 ns), with a forward blocking voltage of 1200 V and manufactured with the encapsulation TO-247. These devices cost about eight dollars, representing real restriction in the complexity of the firing system and, therefore, in its cost, since it is supposed to be cheaper or in the same price range of the power device it intends to command. In this sense, an optimized power layout and gate driver circuit was proposed based on the typical command of thyristors using pulse transformers. A synchronous rectifier was galvanic isolated by a pulse transformer and it was responsible for treating the firing current pulses, as well as controlling the gate´s maximum and minimum voltage. These commands were imposed via two primary simple magnetic loops—one for positive and another for negative commands. Both were driven by a pulse amplifier, as shown in Figure 5.

2. Main Requirements

A. Perfect Firing Sync

One of the main factors of voltage unbalance during the switching transient of series-connected IGBTs is caused by time delays, due to individualized parallel channels for firing the devices. Considering the use of ultra-fast IGBTs with switching times of tens of nanoseconds, even a small uncertainty in the timing accuracy of firing channels can lead to the voltage unbalance. Thus, it is indispensable to propose a firing system capable of imposing an extremely precise synchronism in the gate command of each series-connected semiconductor device.

B. Power and Control Galvanic Insulation

In the matter of series connected devices for a medium voltage multilevel application, another important issue is how to provide galvanic insulated firing circuits among devices and the controller. Usually, galvanic isolation is done through small individual transformers. Its insulation level is crucial to a medium voltage application, which increases its cost and size.

On the other hand, in the vast majority, the insulation of the command circuits is done through optical transmitters and receivers. However, the cost of these receivers, transmitters and the optical fibers is also a limiting factor in their use. This restricts their application to higher power and voltage systems where their relative cost is reduced.

C. Relative Cost

Especially in this paper, the cost factor imposes strict limits, after all, the value of a gate driver should be lower than or equal to the device it intends to control. Therefore, when considering only IGBTs with encapsulation TO-247, simplicity becomes indispensable for project viability. Thus, extrinsic and intrinsic causes must first be attacked, as opposed to the direct attempt to reject its effects, since this would imply a higher cost for the solution.

D. Extrinsic Characteristics

Regarding the extrinsic issues, the concern with electrical parasitic characteristics is very important. They are derived from the mechanical and electrical design, as evidenced in [21], regarding the parasitic capacitance of the power supplies. Therefore, a precise symmetry of the control and power circuits must be imposed. Also, magnetic loops induced by high current variations must be avoided in the firing circuits.

E. Intrinsic Characteristics

Regarding the nature of the intrinsic characteristics, it is important to carefully select the IGBT models, since fabrication technologies influence the physical behavioral effects of the series connection [23]. Certain physical effects naturally tend to bring the devices to share voltage during switching transients, such as the Miller effect [24,25]. Where, the fastest devices “slow down”, while the slower ones “accelerate” during the transient. Such behavior is a consequence of the inverse proportional characteristic of the gate-collector capacitance (Cgc) in relation to the collector-emitter voltage (Vce).

F. Passive Balancing

Also, to avoid any intrinsic differences, passive snubbers with smaller percentage values should be used, so far as the unbalance is naturally reduced from the point of view that the solution is optimized, primarily, for causes and, secondarily, for the effects.

3. Gate Driver

Analyzing the previous section, the proposed firing solution aimed to comply with requirements A, B and C. As shown in Figure 5, two simple primary magnetic loops were responsible for both power energy and firing command (typical thyristor concept). Therefore, there was no need for a power supply for each IGBT or individual optical fibers control, which made the cost of the control system less dependent on the number of serial devices. However, for the IGBTs, the gate voltage must be kept constant after turn-on and turn-off. Thus, the individual gate driver circuits were supplied by two types of periodic positive or negative current pulses (the refreshing and switching pulses—see Figure 6). Benefiting from the IGBT gate storage function [26] and the very small parasitic capacitance of the gate-driver components, the gate-emitter capacitance (Cge) can be easily charged, discharged or kept constant when clamped positive or negatively by zener diodes, setting the gate voltage levels for turn-on and off (Figure 6).

In more detail, Figure 7 shows the push-pull pulse amplifier circuit that was supplied by 30–60Vdc and had a 30 V freewheel zener diode; the double primary pulse transformers with turns ratio of 1:1:7; the individual gate driver circuits implemented by two 6.5 V small zener diodes used for triggering the mosfets type N and P; two 18.5 V zener diodes responsible for setting the gate voltage levels for turn-on and off; and the R_S and RC snubbers for n series-connected IGBTs.

The solution presented imposed an extremely precise synchronism, since only one command channel was responsible for firing or blocking, simultaneously, all devices in series. In addition, when using toroidal cores (Figure 5) and wires with medium voltage insulation, the necessary galvanic isolation was obtained between power and control. Therefore, requirements A and B were fulfilled. Requirement C was achieved as a consequence of simplicity, since the method did not use complex microprocessor systems, extra sensors, A/D converters and feedback controllers. In addition, the gate driver circuit was designed by shelf components, allied to the fact that it was a method that was less dependent from the number of devices.

4. Hexagonal Sub-Module

As previously defined, the extrinsic characteristics refer to the power and control circuit. The use of IGBTs with encapsulation TO-247 facilitated its integration using printed circuit boards. Thus, the mechanical design of the power and control could be fully integrated in order to minimize the inductances, parasitic capacitances and magnetic loops that could be induced by the high current variations during switching transients. Jointly, it is indispensable to have a mechanical and electrical design totally symmetrical between the series-connected devices. In this regard, in order to comply with the aforementioned requirement D, Figure 8 shows a developed model that was a hexagonal sub-module concept with six series-connected IGBTs. It is responsible for one of the voltage levels in a larger three-dimensional multilevel converter structure, which is not the subject of this article.

5. Natural Intrinsic Balancing

It is very important to use IGBT families whose technologies maximize physical effects that lead to natural voltage sharing. In this case, IGBT IKQ75N120CH3, manufactured by Infineon was used. It is based on Highspeed3 technology, a vertical structure with a trench gate and field stop layer [27]. Figure 9 shows two physical effects, present in this family, where only a little is known, but is unprecedented in the series connection context. The first effect is called self-turn-on [28,29], identified by the increasing of the gate voltage rise between instants −20 ns to 0 ns. The second effect is called negative gate capacitance [30,31], which is identified by the gate voltage drop between 0 ns and 60 ns.

To verify the natural intrinsic balancing, a turn-on experiment was carried out with three different forward blocking voltages (0 V, 100 V and 200 V) and no-load current, shown in Figure 9. In this way, it could be seen that one IGBT with a higher forward blocking voltage presented its gate command leading and with larger amplitude than the other one with a smaller forward blocking voltage. This behavior was reversed by the negative gate capacitance effect at the final switching instants (between 50 ns and 100 ns), lagging the command to re-equalize the gate-emitter voltage back again (the arrows indicate the leading and lagging effects). Therefore, a negative physical feedback was present in the gate signal, which led to the increase or decrease of the switching times and, naturally, imposed the voltage sharing of the series-connected devices.

In addition to the behavioral analysis defined in requirement E, passive snubbers were still necessary to avoid physical differences during the tail current period (requirement F). No technique is simpler, more effective and popular than the use of passive snubber circuits. Its use increases total losses, but it has the trade-off presented by the reduction of the power device switching losses [5]. A comparison of several passive snubbers C, RC, RCD and PC is made in [10], which was focused on series association. However, it did not present major improvements, as the slightly better results come with an increased circuit complexity.

Therefore, we started with the simplest snubber circuit possible, consisting of a resistor (Rs) and a RC filter (Figure 7).

6. Experimental Results

6.1. Test Bench and Hexagonal Sub-Module

A test bench was assembled according to the power scheme shown in Figure 10, consisting of two hexagonal sub-modules, output inductor, dual secondary transformer and a 12-pulse rectifier feeding a DC link with nominal voltage of 1200 V.

Figure 11 shows pictures of the hexagonal power sub-module. In its top view, we can see the six sets of IGBTs, the individual gate driver circuits, powered by pulse transformers designed with toroidal cores, as well as the two primary isolated loops responsible for the positive and negative gate current pulses. In the bottom view, the snubbers circuits can be seen.

All experiments presented below show many waveforms since, in general, they are comparisons between the six series-connected IGBTs. Due to the impossibility of obtaining six simultaneous measurements, a variable was used to synchronize the experiments carried out separately. Therefore, they could be seen under the same time base, imposing temporal determinism over their comparisons. For this, nothing was fairer than the use of the primary current firing pulse that is shared by all semiconductor devices in the series string. In this sense, the experiments were always repeated six times, obtaining the temporal sync signal and the measured variable of interest for each device. Subsequently, the experiments were arranged together, where the sync signals were the time reference for positioning the signals of interest.

6.2. Gate Command Synchronization

Figure 12 shows the operation of the control firing system for switching under zero forward blocking voltage. As expected, perfect synchronization between all gate-emitter voltages was obtained. Yet, the primary current firing pulses were shown in order to prove the temporal determinism of the results.

6.3. Natural Intrinsic Balancing without Snubber

Figure 13 and Figure 14 show a turn-on and a turn-off transient switching, respectively. They were performed with a current of 60 A, total voltage of 1200 V and in the snubberless condition, to avoid any influence on the Vce voltages. The Vce and Vge voltages of the six series-connected IGBTs are shown, as well as the collector current (Ic). The new results corroborate with the argument cited in topic 5, since the fastest device (IGBT 6+) is clearly the one with the slowest and lowest amplitude gate voltage (see arrows). Especially, for the case of the turn-off switching (Figure 14), the most apparent effects were the Miller effect and the negative gate capacitance. Therefore, in both cases, turn-on or turn-off, a negative feedback on the gate signal was present, which led to the intrinsic natural balancing during transients.

6.4. Final Results with Static Analysis

In this topic, the complete solution, using the snubbers circuits, has been experimented for different current conditions (0 A, 30 A and 60 A) and under same 1200 V total blocking voltage. In these experiments, unlike the previous analysis, static imbalances are also considered.

Figure 15 shows the turn-on switching with no-load current; however, it is possible to verify the snubbers circuits current (of negative side devices—Figure 10). The result shows a perfect balancing during the static and dynamic periods.

Figure 16 and Figure 17 show the turn-on switching with 30 A and 60 A load currents, respectively. There is a maximization of the physical effects, responsible for the natural intrinsic balancing, in the attempt to reject the unbalances caused by the increased collector current. The results demonstrated an effective dynamic balancing, even under a critical condition, since the transient switching time was about 60 ns. In addition, there was also a tendency to increase the static differences in the collector-emitter voltages as the current increased. However, snubber circuits fulfill their role in keeping these differences within a threshold that does not greatly affect transient behavior, as obtained.

Figure 18 and Figure 19 show the turn-off switching with 30 A and 60 A load currents, respectively. Again, a maximization of the physical effects, responsible for the natural intrinsic balancing, is inferred with the increase of the collector current, resulting in an optimal dynamic voltage sharing. There is also an increase in static differences among collector-emitter voltages due the current increase, as can be noticed during the off-state. Clearly, some physical behaviors are current dependent as, for instance, the space charge region width [32,33], leading to greater differences on the blocking voltage when compared with a no-load turn-off. It means that increasing intrinsic physical differences will result in a slightly greater static voltage unbalance, since its limitation is imposed only by passive snubbers during the off-state (refer to Figure 17 that shows satisfactory dynamic results during the turn-on, despite of the initial static voltage unbalance caused by a previous turn-off switching).

7. Conclusions

Under a holistic view on the practical feasibility of the series-connected low voltage IGBTs, this article presented an integrated solution based on an optimized power design and a simple and low-cost gate firing solution. The extrinsic and intrinsic voltage unbalancing causes were discussed and they must first be attacked, as opposed to the direct attempt to reject their effects. In addition, the natural intrinsic balancing concept was introduced along with the importance of selecting IGBT families whose technologies maximize the physical behaviors that are helpful for voltage sharing. In this sense the results prove that the integrated solution under the proposed requirements was feasible, efficient and low cost, being able to impose static and dynamic voltage sharing among the series-connected IGBTs. Thus, this solution may be the basis for the development of a new class of medium voltage multilevel converters. A class that, by leveraging the low-voltage IGBTs series association can take advantage of its improved performance, higher frequency switching capabilities, easy mounting on printed circuit boards, its inherent application in multi-level topologies, in addition to its extremely low cost. As a matter of fact, these are the positive factors supporting the studies presented here.