Implementation of Rapid Prototyping Tools for Power Loss and Cost Minimization of DC-DC Converters

Abstract

In this paper, power loss and cost models of power electronic converters based on converter ratings and datasheet information are presented. These models aid in creating rapid prototypes which facilitate the component selection process. Through rapid prototyping, users can estimate power loss and cost which are essential in design decisions. The proposed approach treats main power electronic components of a converter as building blocks that can be arranged to obtain multiple topologies to facilitate rapid prototyping. In order to get system-level power loss and cost models, two processes are implemented. The first process automatically provides minimum power loss or cost estimates and identifies components for specific applications and ratings; the second process estimates power losses and costs of each component of interest as well as the whole system. Two examples are used to illustrate the proposed approaches—boost and buck converters in continuous conduction mode. Achieved cost and loss estimates are over 93% accurate when compared to measured losses and real cost data. This research presents derivations of the proposed models, experimental validation of the models and demonstration of a user friendly interface that integrates all the models. Tools presented in this paper are expected to be very useful for practicing engineers, designers, and researchers, and are flexible and adaptable with changing or new technologies and varying component prices.

1. Introduction

1.1. Overview

As dependence on electronic appliances, digital products and computer systems in both industrial and household applications grows, the demand for power electronic converters is increasing. DC-DC converters continue to grow in popularity in all major electronics applications. Given the high demand for these converters, engineers are faced with a major challenge to design them in a very short period of time while still ensuring competitive cost. Rapid prototyping tools for converter development help solve this constraint and thus are of interest as both time- and cost-saving methods.

Existing literature indicates significant research related to power loss estimation of various power electronic components. Loss estimation, for example, is used in [1] to analyze how power loss can be redistributed in a power converter using a modulation technique. Another reason for the need for power loss estimation is when evaluating the effect of different material on device power losses, e.g., [2,3]. In other applications, e.g., [4], power loss estimation is central in evaluating the usability of a power electronic converter, and power loss is used as a metric when comparing various converters. Since temperature rise in semiconductors and other power electronic devices is mainly caused by power losses, power losses have also been used for thermal analysis and modeling of power electronic systems, e.g., [5,6]. Therefore, power loss estimation is essential for new material, device, and converter evaluation, in addition to comparing various converters and designs where efficiency is a major figure of merit. Modeling of power electronic converters can be improved by loss and cost estimation, such as distributed power converters in a standalone DC microgrid [7], or DC microgrids for electric vehicle charging stations [8]. Also, essential application which relies on power converter topology can benefit from loss and cost estimation, like PFC converters for plug-in-hybrid electric vehicles [9], and novel bidirectional DC/DC converter topologies [10].

Several techniques have been implemented to find out power loss or cost models of specific components. A majority of this research has focused on selecting components for power electronic converters, e.g., [11]. Extensive research has been conducted for finding specific losses in semiconductors and magnetic components, e.g., [12]. Power loss estimation in semiconductors has also been extensively studied, e.g., [6,13] where power losses are correlated with temperature rise in the devices using thermal resistance datasheet values. Topology-specific power loss models also exist, which address specific component losses, e.g., power MOSFET losses in a buck converter [14], or system-level losses, e.g., boost converter [15]. Several methods to measure system-level power loss have also been proposed, e.g., [16,17]. Power losses in other parts of the converter, e.g., PCB losses [18,19,20] and gate drive losses [21], have been addressed but are only introduced in the Appendix A of this paper.

Cost consideration is the most important factor for industries which mass-produce power electronic converters, to achieve market success and competitiveness by reducing cost [22]. However, most existing literature mainly focuses on methods to predict costs of specific systems and avoids generalized cost models of power electronic devices and converters. For example, in [23] the cost models of a battery, inverter and converter were developed on the basis of power ratings of these sub-systems. Cost estimation and reduction techniques have been developed for a single component such as inductor or heat sink in [24]. Some cost models are also developed for switch-mode power supplies by considering component power losses, weight, manufacturing process and raw material cost fluctuations [25].

An important application of power loss and cost estimation is design optimization of power electronic converters. With a well-established power loss or cost model of various devices that can form the converter, an optimization problem can be established where the converter’s power loss or cost are the figures of merit. Attempts for such analytical design approaches are [26], but mostly focus on power losses, especially semiconductor losses in [26]. Cost models and power loss models of specific devices which can be extended for integration in power electronic converters, have been presented in [27] but without converter design optimization.

Therefore, generalized power loss models of major power electronic devices, as well as cost models of these devices, have not been shown in the literature for ease of integration for any power converter topology. For example, textbook models such as those presented in [16,28,29,30], are presented in an introductory ay where they may not be easily integrated into any power converter topology. Research papers, on the other hand, present very specific models for devices or topologies but rarely provide a flexible model that can be integrated with different power converter topologies.

1.2. Proposed Approach and Contribution

This paper presents a building-block approach, as demonstrated in Figure 1, towards modeling power loss and the cost of power electronic converters. Power loss models are based on converter voltage, current, power, and frequency ratings and operating conditions along with basic datasheet information. Cost models are based on average prices related to component ratings obtained using an extensive market survey and surface-fitting tools. It is important to note that component technology and cost profiles change over time as a result of changes in material and manufacturing techniques and thus this paper intends to develop power loss and cost modeling methodologies that can evolve with time and changes in technology.

The paper focuses on the building-block approach of the modeling of power loss and the cost of power electronic converters to achieve minimum power loss and cost design instead of the model construction of single component. The proposed method provides a new tool and effective way where assembles the circuit from parts to an entirety to evaluate the power loss and cost of an entire converter. The overall process used in rapid prototyping tools for cost and power loss models in optimization and component-specific modes as proposed here is illustrated in Figure 2. The target of the models is to minimize the estimation error when comparing actual component power loss and cost values with the measured power losses or actual cost. Their main advantage is the ability to evaluate a large number of possible component combinations and achieve almost instantaneous cost and loss estimates. Thus a large quantity component library is generated as the basement of the models and the web based program of the rapid prototyping tool ensures the component library is up to date along with the newest marketing price and technology. From customer perspective, once the converter topology is chosen and desired power loss and cost are typed into the GUI interfacing panel, the rapid prototyping tool is able to search, chose the appropriate component and assemble the converter rapidly to save the time of customer to search and evaluate the component. Also, the rapid prototyping tool is able to optimize the results to minimize the power loss and cost with the change of the custom parameters such as topology, total cost and power loss.

Rapid prototyping tools for DC-DC converters are of main interest here due to the converters’ simplicity, wide range of their applications and since the methodology for developing models is of main interest rather than actual topologies.

The paper proceeds as follows: Section 2 shows generalized component-level power loss models. Section 3 discusses the application of generalized power loss models for several power electronic converters. Section 4 explains the concept behind cost model development and illustrates these models. Section 5 shows experimental results that validate the developed models. Section 6 explains rapid prototyping tools for model-based power loss minimization and presents tools for cost minimization. Section 7 concludes with the summary remarks and future work.

2. Generalized Component-Level Power Loss Models

Generalized power loss models of power electronic components are derived based on equivalent circuit models of each major component by considering component non-idealities and parasitic elements. The models presented here stem from existing models in textbooks and foundational research papers, e.g., [13,19,28,29,30] and others. Therefore, this Section is a summary of such models, while Section 3 presents these models when massaged for specific buck and boost converter topologies.

2.1. MOSFET Losses

In power electronic converters, MOSFETs operate as switching elements. Figure 3 shows a MOSFET model with its non-idealities.

The MOSFET P_CM [28] is:

$$P_{CM}=R_{DSon}{I}_{Drms}^2$$

(1)

where I_D is represented as shown in Figure 4 when the MOSFET operates as a switch. I_Drms can be computed by $I_{Drms}=\sqrt{\frac{1}{T}{\displaystyle {\int }_0^T{(\frac{\Delta i}{DT}t+I_{Lavg}-\frac{1}{2}\Delta i)}^{2}dt}}=\sqrt{\frac{1}{3}\Delta i^{2}D+(I_{Lavg}-\frac{1}{2}\Delta i)\Delta iD+{(I_{Lavg}-\frac{1}{2}\Delta i)}^{2}D}$.

Switching losses of MOSFETs are mainly divided into two parts, P_ON(M) and P_OFF(M). Because only steady state efficiency is concerned, voltage overshoot and diode reverse recovery effect won’t be considered. The total switching loss P_SW is thus [31]:

$$P_{SW}=P_{ON(\mathrm{M})}+P_{OFF(\mathrm{M})}$$

(2)

where for a fixed f_sw:

$$P_{ON(M)}=\frac{1}{2}{V}_{DS}{I}_{Don}(t_r+t_{d(on)})f_{sw}$$

(3)

$$P_{OFF(M)}=\frac{1}{2}{V}_{DS}{I}_{Doff}(t_f+t_{d(off)})f_{sw}$$

(4)

The gate loss P_G is usually observed at C_gs [17]:

$$P_G=Q_{gs}{V}_{Supply}{f}_{sw}$$

(5)

Thus, total power losses in a MOSFET are:

$$P_{loss(\mathrm{MOSFET})}=P_{CM}+P_{SW}+P_G$$

(6)

2.2. Diode Losses

Diodes in power electronic converters act as rectifiers and uncontrolled switches. Figure 5 shows a diode model with its non-idealities.

The diode conduction loss P_CD is modeled as:

$$P_{CD}=V_{D0}(1-D)I_{Favg}+R_D(1-D)I_{Frms}^2$$

(7)

where typical values of V_D0 and R_D are:

V_D0 = V_Dmax/V_Dtyp

(8)

R_D = ΔV_F/ΔI_F

(9)

There are two switching losses of a diode—turn-on loss and turn-off loss. The turn-on loss is usually ignored because the diode starts conducting from an off-state. P_SWD is thus [6]:

$$P_{SWD}=\frac{1}{2}{Q}_{rr}{V}_{rr}{f}_{sw}$$

(10)

and the total diode power loss is:

$$P_{loss(Diode)}=P_{CD}+P_{SWD}$$

(11)

2.3. Inductor Losses

An inductor stores energy in its magnetic field. Figure 6 shows an inductor with non-idealities and Figure 7 shows a typical inductor current waveform in a DC-DC converter.

The core loss P_CORE is usually obtained by the Steinmetz equation [16,32] to be:

$$P_{CORE}=K_1{f}^x{B}^y{V}_e$$

(12)

Note that modified Steinmetz equations are also common for core loss estimation, but if core loss coefficients are not supplied in a datasheet, a constant R_C can be used and P_CORE is estimated as:

$$P_{CORE}\approx \frac{V_L^2}{R_C}$$

(13)

The Steinmetz equation is used as an example, but the methodology is intended to support other forms of loss models. This is clear by using either Equation (12) or Equation (13) and can extend to more detailed models. Resistive losses can also be estimated as shown in [16,32], DCR and ACR are provided by datasheets or manufacturers:

$$P_{DCR}=I_{Lavg}^{2}DCR$$

(14)

$$P_{ACR}=I_{Lrms}^{2}ACR$$

(15)

Total power loss of an inductor is thus:

$$P_{loss(Inductor)}=P_{CORE}+P_{DCR}+P_{ACR}$$

(16)

2.4. Capacitor Losses

Capacitors are major storage elements in power electronic converters and their typical non-idealities are shown in Figure 8.

Two major power losses in the capacitor are those in its AC and DC resistances [33]. P_ac is:

$$P_{ac}=I_{Crms}^{2}ESR$$

(17)

while P_dc is:

$$P_{dc}=\frac{V_C^2}{R_P}$$

(18)

Total power loss of the capacitor is thus:

$$P_{loss(Capacitor)}=P_{ac}+P_{dc}$$

(19)

P_dc is small as compared to P_ac as capacitors are mainly used to pass current ripple, thus P_dc it is frequently ignored.

3. Power Loss Models for Several Converters

Equations explained in the previous section are common in the literature, but are rarely presented for specific converter topologies. In this section power loss models for boost and buck converter in continuous conduction mode (CCM) and flyback converter in discontinuous conduction mode (DCM) are explained in detail. These converters are used as examples due to their common use in any applications and their simple construction and analysis. All generalized equations are reformulated in terms of input and output parameters and datasheet information.

3.1. Boost Converter in CCM

A typical non-ideal boost converter is shown in Figure 9 followed by derivations for power losses in main boost converter components operating in CCM.

3.1.1. MOSFET Losses

P_CM is obtained from Equation (1) and can be estimated [34] as:

$$P_{CM}=R_{DSon}D\left[I_{in}^2+\frac{\Delta i^2}{12}\right]$$

(20)

To calculate P_SW, I_Don and I_Doff can be obtained from Figure 7:

$$I_{Don}=I_{in}-\frac{\Delta i}{2}$$

(21)

$$I_{Doff}=I_{in}+\frac{\Delta i}{2}$$

(22)

$$V_{DS}=V_{in}$$

(23)

Thus, P_ON(M) and P_OFF(M) are calculated as:

$$P_{ON(\mathrm{M})}=\frac{1}{2}{V}_{in}\left(I_{in}-\frac{\Delta i}{2}\right)t_r{f}_{sw}$$

(24)

$$P_{OFF(\mathrm{M})}=\frac{1}{2}{V}_{in}\left(I_{in}+\frac{\Delta i}{2}\right)t_f{f}_{sw}$$

(25)

3.1.2. Diode Losses

P_CD and P_SWD are obtained using Equations (7) and (10) as:

$$P_{CD}=V_{D0}(1-D)I_{in}+R_D(1-D)I_{in}^2$$

(26)

$$P_{SWD}=\frac{1}{2}{Q}_{rr}\left(V_{out}-V_{in}-I_{in}DCR\right)f_{sw}$$

(27)

3.1.3. Inductor Losses

P_CORE, P_DCR and P_ACR can be calculated as:

$$P_{CORE}\approx \frac{{\left(V_{out}-V_{in}-I_{in}DCR-V_F\right)}^2}{R_C}$$

(28)

$$P_{DCR}=I_{in}^{2}DCR$$

(29)

$$P_{ACR}=\frac{\Delta i^2}{12}ACR$$

(30)

3.1.4. Capacitor Losses

P_{loss(Capacitor)} is obtained using Equation (17) as:

$$P_{loss(Capacitor)}=\frac{\Delta i^2}{12}ESR$$

(31)

3.2. Buck Converter in CCM

A typical non-ideal buck converter is shown in Figure 10.

3.2.1. MOSFETs Losses

P_CM is obtained from Equation (1) and can be estimated [30] as:

$$P_{CM}=R_{DSon}D\left[I_{out}^2+\frac{\Delta i^2}{12}\right]$$

(32)

To calculate P_SW, I_Don and I_Doff can be obtained from Figure 7 and V_DS as in Equation (23). Thus, P_ON and P_OFF are calculated as:

$$I_{Don}=I_{out}-\frac{\Delta i}{2}$$

(33)

$$I_{Doff}=I_{out}+\frac{\Delta i}{2}$$

(34)

$$P_{ON(\mathrm{M})}=\frac{1}{2}{V}_{in}\left(I_{out}-\frac{\Delta i}{2}\right)t_r{f}_{sw}$$

(35)

$$P_{OFF(\mathrm{M})}=\frac{1}{2}{V}_{in}\left(I_{out}+\frac{\Delta i}{2}\right)t_f{f}_{sw}$$

(36)

3.2.2. Diode Losses

P_CD and P_SWD are obtained by referring Equations (7) and (10) as:

$$P_{CD}=V_{D0}(1-D)I_{out}+R_D(1-D)I_{out}^2$$

(37)

$$P_{SWD}=\frac{1}{2}{Q}_{rr}\left(V_{out}+I_{out}DCR\right)f_{sw}$$

(38)

3.2.3. Inductor Losses

P_CORE, P_DCR and P_ACR can be calculated as:

$$P_{CORE}\approx \frac{{\left(V_{in}-V_{out}-I_{in}{R}_{DSon}-I_{out}DCR\right)}^2}{R_C}$$

(39)

$$P_{DCR}=I_{out}^{2}DCR$$

(40)

$$P_{ACR}=\frac{\Delta i^2}{12}ACR$$

(41)

3.2.4. Capacitor Losses

P_{loss (Capacitor)} is obtained using Equation (17) as:

$$P_{loss(Capacitor)}=\frac{\Delta i^2}{12}ESR$$

(42)

3.3. Flyback Converter in DCM

Flyback converters are widely used in DCM. A non-ideal flyback converter in DCM is shown in the Figure 11. For the sake of illustration, the MOSFET switching period was considered as T_ON + T_OFF = 0.8T_S as shown in Figure 12.

3.3.1. MOSFET Losses

$$T_{ON}=\frac{0.8T_S\left(V_{out}+V_F\right)}{V_F}$$

(43)

$$V_{DS}=V_{in}+n{V}_{out}$$

(44)

P_CM in the flyback converter is described in [30,35] as:

$$P_{CM}=R_{DSon}{\left(\frac{V_{in}}{\left(L_m+L_{pri}\right)f_{sw}}D\sqrt{0.26\left(1+\frac{V_{out}}{V_F}\right)}\right)}^2$$

(45)

For a flyback converter in DCM, I_Don is zero but I_Doff and P_SW are determined using [35,36] and Figure 13 as:

$$I_{Doff}=\frac{0.9V_{in}D}{2\left(L_m+L_{pri}\right)f_{sw}}$$

(46)

$$P_{SW}=P_{OFF(\mathrm{M})}=\left(V_{in}+n{V}_{out}\right)\left[\frac{0.9V_{in}D}{2\left(L_m+L_{pri}\right)}\right]\frac{t_f}{2}$$

(47)

3.3.2. Diode Losses

P_CD and P_SWD of the flyback diode are calculated as:

$$P_{CD}=V_{D0}(1-D)I_{out}+R_D(1-D){\left[\frac{0.52n{V}_{in}D}{\left(L_m+L_{pri}\right)f_{sw}}\right]}^2$$

(48)

$$P_{SWD}=\frac{1}{2}{Q}_{rr}{V}_{out}{f}_{sw}$$

(49)

3.3.3. Flyback Coupled-Inductor/Transformer Lossses

P_CORE is given in [20,34,36] as:

$$P_{CORE}=K_{fe}{B}_{AC}^{\mathsf{\beta }}{A}_C{L}_m$$

(50)

where:

$$B_{AC}^{\mathsf{\beta }}=\frac{L_m\Delta i}{N_{pri}{A}_C}$$

(51)

Primary P_Rpri and secondary P_Rsec resistive power losses are calculated [21] as:

$$P_{Rpri}={\left(\frac{0.4V_{in}D}{\left(L_m+L_{pri}\right)f_{sw}}\right)}^2{R}_{pri}$$

(52)

$$P_{R\sec }={\left(\frac{0.4n{V}_{in}D}{\left(L_m+L_{pri}\right)f_{sw}}\right)}^2{R}_{\sec }$$

(53)

3.3.4. Capacitor Losses

Form Equation (17), P_{loss(Capacitor)} is calculate as:

$$P_{loss(Capacitor)}=\left\{{\left[\frac{0.52n{V}_{in}D}{\left(L_m+L_{pri}\right)f_{sw}}\right]}^2-I_{out}^2\right\}ESR$$

(54)

3.3.5. Snubber Circuit Losses

The main components in the snubber branch are R_sn, C_sn and D_sn. R_sn and C_sn form a clamp unit. P_clamp is represented as [35]:

$$P_{clamp}=\frac{{(V_{clamp})}^2}{R_{sn}}=\frac{{(0.9V_{DSBR}-V_{in})}^2}{R_{sn}}$$

(55)

or:

$$P_{clamp}=\frac{1}{2}{f}_{sw}{L}_{pri}\Delta i^2\left(1+\frac{V_{in}}{0.9V_{DSBR}-2V_{in}}\right)$$

(56)

Snubber diode conduction loss P_CDsn is obtained from Equation (7) as:

$$P_{CDsn}=V_{Dsn0}(1-D)n{I}_{out}+R_{Dsn}(1-D)n{I}_{Srms}^2$$

(57)

while P_SWDsn is obtained as:

$$P_{SWDsn}=\frac{1}{2}{Q}_{rrsn}{V}_{in}{f}_{sw}$$

(58)

Total snubber circuit power loss is the summation of snubber diode power loss and power loss in the clamp unit. Therefore, all power loss equations for the three different converter examples are derived based on datasheet information and converter ratings. Results that validate the derived models are shown in Section 5 where experimental prototypes are used to measure the total loss in the converter.

4. Major Component Cost Models

A large database of cost information for multiple elements was compiled from common manufacturers’ and suppliers’ data. The two main sources of this data were Digikey [37] and Mouser Electronics [38], where searches were performed for MOSFETs, diodes, capacitors, and inductors of specific rating ranges. Search filters were applied to achieve such range limits, and the database is compiled and available for public use [39]. Since multiple options exist for different power, voltage, current, and/or device value rating (e.g., inductance and capacitance), the average cost for each component at a certain rating combination was found by considering these multiple options. This database was input to MATLAB to create interpolated graphs and find a mathematical relationship between cost and component ratings. Cost per quantity was also considered. The impact of time on cost is not considered due to availability of present prices only. Some other costs such as costs resulting from auxiliaries, heat sinks, fan/clod plates, etc are also not considered because they are beyond the scope of this work, where the focus is mainly on methodology.

4.1. MOSFETs

SiC and GaN type semiconductor cost is still varying rapidly due to continued production improvements, thus to demonstrate the methodology we focus on Si. To create a MOSFET cost model Cost_M, a large database was prepared using V_DS, I_D and cost. α_i coefficients are as listed in

Table 1. Coefficients for the MOSFET cost model equation.

Coefficient	Value	Range	βi	γi
α0	0.8091	(−17.52, 19.14)	0	0
α1	0.01964	(−0.06058, 0.09985)	1	0
α2	−0.1375	(−2.465, 2.19)	0	1
α3	−3.497 × 10−5	(−0.0001393, 6.939 × 10−5)	2	0
α4	−0.00323	(−0.0106, 0.004137)	1	1
α5	0.01736	(−0.08388, 0.1186)	0	2
α6	1.3 × 10−8	(−1.6 × 10−6, 1.6 × 10−6)	3	0
α7	5.022 × 10−6	(−4.517 × 10−6, 1.456 × 10−5)	2	1
α8	9.087 × 10−5	(−9.87 × 10−5, 0.0002804)	1	2
α9	−0.0005698	(−0.002582, 0.001443)	0	3
α10	−8.033 × 10−8	(−2.976 × 10−7, 1.37 × 10−7)	2	2
α11	−9.716 × 10−7	(−2.976 × 10−6, 1.032 × 10−6)	1	3
α12	7.185 × 10−6	(−1.183 × 10−5, 2.62 × 10−5)	0	4
α13	3.17 × 10−10	(−1.034 × 10−9, 1.668 × 10−9)	2	3
α14	4 × 10−9	(−5.126 × 10−9, 1.313 × 10−8)	1	4
α15	−3.103 × 10−8	(−1.006 × 10−7, 3.851 × 10−8)	0	5

, but it should be noted that these coefficients vary across a certain range and the values shown are selected to achieve the best fit for specific components used in Section 5. Figure 14 and Figure 15 show the mathematical relationship for this database. Cost_M is represented as:

$$Cos{t}_M(V_{DS},I_D)={\displaystyle \sum _{i=0}^{i=15}{\mathsf{\alpha }}_i{V}_{DS}^{{\mathsf{\beta }}_i}{I}_D^{{\mathsf{\gamma }}_i}}$$

(59)

4.2. Diodes

A diode cost database was prepared using V_B, I_F and cost where Figure 16 and Figure 17 show the interpolated cost surfaces while the mathematical model is shown in Equation (60) and its coefficients are shown in

Table 2. Coefficients for the diode cost model equation.

Coefficients	Value	Range	θj	κj
δ0	0.22	(0.1, 0.3)	0	0
δ1	7 × 105	(−2.6 × 10−4, 1.2 × 10−4)	1	0
δ2	0.1	(0.08, 0.13)	0	1

.

$$Cos{t}_D(V_B,I_F)={\displaystyle \sum _{j=0}^{j=2}{\mathsf{\delta }}_j}{V}_B^{{\mathsf{\theta }}_j}{I}_F^{{\mathsf{\kappa }}_j}$$

(60)

4.3. Inductors

Inductor cost data is compiled based on L, I_L and cost. Figure 18 and Figure 19 show the interpolated cost surfaces while the mathematical model is shown in Equation (61) and its coefficients are where x = 9.67, µ = 61.64, ϕ = −8.246, v = 4.495, ω = −0.08658.

$$Cos{t}_L(L,I_L)=\mathsf{\chi }+\mathsf{\mu }\sin (\upsilon \mathsf{\pi }L{I}_L)+\mathsf{\varphi }{\mathrm{e}}^{-{(\mathsf{\omega }{I}_L)}^2}$$

(61)

4.4. Capacitors

A capacitor cost (Cost_C) database for electrolytic capacitors was prepared using C, V_C and cost where Figure 20 and Figure 21 show the interpolated cost surfaces while the model is shown in Equation (62) and its coefficients are shown in

Table 3. Coefficients for the capacitor cost model equation.

Coefficients	Value	Ranges	σz	ξz
η0	−0.5651	(−4.043, 2.913)	0	0
η1	7.98 × 10−4	(−0.017, 0.019)	1	0
η2	0.03	(−0.022, 0.082)	0	1
η3	5.35 × 10−7	(−1.6 × 10−5, 1.74 × 10−53)	2	0
η4	3.2 × 10−5	(−5 × 10−5, 0.0001139)	1	1
η5	−1.72 × 10−4	(−4 × 10−4, 5.9 × 10−5)	0	2
η6	−4.81 × 10−8	(−1.1 × 10−7, 1 × 10−8)	2	1
η7	1.6 × 10−7	(4.2 × 10−8, 2.8 × 10−7)	1	2
η8	2.5 × 10−7	(−5.5 × 10−8, 5.6 × 10−8)	0	3

. Different material of capacitor will lead to different cost, but electrolytic capacitor is chosen as an example to illustrate the methodology:

$$Cos{t}_C(C,V_C)={\displaystyle \sum _{z=0}^{z=8}{\mathsf{\eta }}_z}{C}^{{\mathsf{\sigma }}_z}{V}_C^{{\mathsf{\xi }}_z}$$

(62)

4.5. Flyback Coupled-Inductor Core

Typical core materials include silicon steel, iron powder and ferrites. A ferrite material core is used in the selected transformer to demonstrate the methodology. Two types of cores, gapped and ungapped, are considered in the proposed cost model with a frequency range between 50 KHz and 500 KHz. High frequency cores which are used for radio or telecommunications application are excluded. The cost core cost model was prepared using f_sw, A_L and cost. Figure 22 and Figure 23 show the interpolated Cost_CO surfaces while the mathematical model is shown in Equation (63) and its coefficients are shown in

Table 4. Coefficients for the core cost model equation.

Coefficients	Value	Ranges	ψm	ρm
τ0	1.204	(0.6736, 1.735)	0	0
τ1	1.625	(1.31, 1.939)	1	0
τ2	0.1432	(−0.6245, 0.9078)	0	1
τ3	−0.007604	(−0.467, 0.4518)	1	1
τ4	−0.1744	(−0.6827, 0.344)	0	2

.

$$Cos{t}_{Co}(A_L,f_{sw})={\displaystyle \sum _{m=0}^{m=4}{\mathsf{\tau }}_m{A}_L^{{\mathsf{\psi }}_m}{f}_{sw}^{{\mathsf{\rho }}_m}}$$

(63)

Cost models presented here were evaluated based on two criteria. The first criterion is that an analytical form is available for the cost model, i.e., polynomial, trigonometric, exponential, etc. in order to integrate this model with other mathematical and optimization tools. The second criterion is that the R² value for each model, which is a measure between 0 and 1 of how well does the model match discrete data points, is acceptable. An R² value that is closer to 1 is desired. The second criterion is essential when dealing with cost modeling of power electronic devices since their ratings are not available as continuous options; for example, MOSFET ratings of 50 V and 100 V exist, but not necessarily at 63.5 V, and the surface fit provided applies to the continuous range. All R² values of the proposed models are shown in

Table 5. Surface fitting evaluation of cost models.

Cost Model	R2 Value (0 to 1)
CostM (Polynomial, presented here)	0.6717
CostM (LOWESS, no analytical expression)	0.9436
CostD	0.8899
CostC	0.8274
CostL	0.7014
CostCO	0.9365

, and are all acceptable except for MOSFETs whose cost model’s R² value is low. To mitigate this case, a locally weighted scatterplot smoothing (LOWESS) model was established to achieve an R² = 0.9436 for Cost_M but does not have an explicitly model equation like the polynomial one. Also, note that that exact cost estimates of specific components can be obtained if coefficients are changed within the specified ranges shown in Table 1, Table 2, Table 3 and Table 4.

5. Results

Basic boost, buck and flyback converters were experimentally developed to test the power loss and cost models presented here. Bus bar losses are not considered since the experimental prototype is at a power level that does not require bus bar. More bus bar losses information can be found in [40]. All parasitic elements and specific test condition examples are given in

Table 6. Example testing conditions and parasitic elements in experimental prototypes.

Parameter	Boost	Buck	Flyback
Vin	19.3 V	60 V	12.1 V
Iin	3.18 A	1.04 A	0.434 A
Vout	75.2 V	24.1 V	25.7 V
Iout	0.794 A	2.39 A	0.151 A
Δi	1.1 A	2.95 A	0.89 A
fsw	50 KHz	50 KHz	100 KHz
D	0.75	0.4	0.7
ESR	0.603 Ω	0.603 Ω	0.603 Ω
VD0	1 V	1 V	1 V
RD	7 mΩ	7 mΩ	7 mΩ
DCR/Rpri	0.06 Ω	34 mΩ	0.09
ACR/Rsec	0	1.5 Ω	0.58
Qrr	195 nC	195 nC	195 nC
Qgs	64 nC	13 nC	13 nC
RDSon	0.029 Ω	0.18 Ω	0.18 Ω
tr	100 nsec	51 nsec	51 nsec
tf	63 nsec	36 nsec	36 nsec
≈Rc	3325 Ω	-	-
Lm, Lpri	-	-	59.4 µH, 3.5 µH
B	-	3400 mT	42.42 mT
Ve/AC	-	0.24 cm3	0.97 cm3

. Figure 24 shows the board housing both the boost and buck converters (flyback converter not shown).

Parasitic elements shown in Table 6 are extracted from datasheets of the components used in the experimental setup and which are IRFP4332PBF MOSFET, AIRD-03-101K inductor, MURF860G diode, and EEU-EB2D221 capacitor in the boost converter and IRFP240 MOSFET, AIRD-03-101K inductor, MURF860G diode, and EEU-EB2D221 capacitor in buck converters, and IRFP240 MOSFET, Q4338-BL flyback transformer, EGP10G Diode, and EEU-EB2D221 capacitor are used in the flyback converter.

5.1. Power Loss Model Verification

To validate the power loss models derived in Section 3, each of the three converters was tested under the conditions shown in Table 6, along with various output voltages and currents varied with the duty ratio. Power losses were measured by deducting the output power of the converter from its input power. Gate drive losses can be measured, but were not considered since the gate drive power supply was separate in the experimental setup and the gate drive losses do not contribute to the experimental system-level verification. Voltage divider and current sensor in the prototype consume much less power than main power losses, thus they are not taken into consideration. Figure 25, Figure 26 and Figure 27 show experimental results of each converter at the specified test conditions in Table 6. Input and output voltage and current were measured to obtain totally converter loss to verify converter scope-level power loss. All measurements are under zero offset condition and using calibrated probes to ensure measurement accuracy.

Table 7. Estimated and measured power loss in boost converter.

Duty Ratio	PMeasured (W)	PEstimated (W)	Error %
30%	0.6	0.56	−6.6%
40%	0.78	0.72	−7.69%
50%	0.97	0.92	−5.15%
60%	1.36	1.37	0.74%

,

Table 8. Estimated and measured power loss in buck converter.

Duty Ratio	PMeasured (W)	PEstimated (W)	Error %
20%	2.54	2.49	−1.96%
30%	3.76	3.78	0.53%
40%	4.8	5.04	5%
50%	7.05	6.55	−7.09%

and

Table 9. Estimated and measured power loss in flyback converter.

Duty Ratio	PMeasured (W)	PEstimated (W)	Error %
20%	0.32	0.31	−3.13%
30%	0.55	0.56	1.81%
40%	0.85	0.82	−4.7%
50%	1.32	1.27	−3.78%

show power loss estimates of each converter under different duty ratios. It is clear from Table 5, Table 6 and Table 7 that the error in estimating power losses using the derived models is less than 8% leading to more than 92% accuracy. More accurate measurements and models would still be of very high value for rapid prototyping, but the achieved model-based estimation error is very satisfactory for evaluating various design options. Among the sources of estimation error are approximations, e.g., R_C (when not in a datasheet), and limited measurement accuracy.

5.2. Cost Model Verification

In order to validate the cost models proposed in Section 3, prices of the parts used were compared to prices generated from the mathematical models for the MOSFET, diode, inductor, and capacitor utilized. The flyback coupled inductor model was split into wire and cores due to their abundant information, thus similar core and wire to the Q4338-BL model are used for cost validation. Cost figures of these components were generated based on Equations (59)–(63), and results are compared to estimated prices in

Table 10. Detailed cost comparison for power components.

Component	Actual Cost	Estimated Cost	Error %
MOSFET (IRFP4332PBF)	$4.33	$4.37	−0.92%
Inductor (AIRD-03-101K)	$5.97	$5.95	0.33%
Diode (MURF860G)	$0.99	$1.03	−4.04%
Capacitor (EEU-EB2D221)	$0.723	$0.752	−4.01%
Core (B66421G0000X187)	$0.69	$0.724	−4.93%
Wire (Belden 22AWG)	$49.03	$48.03	2.039%

.

Results in Table 10 are shown to have less than 5% error and thus the cost models established prove that the results are more than 95% accurate. The accuracy of the cost model was improved with the help of interpolated graphs and surface fitting tools. Since cost of components changes with technology and manufacturing trends, the methodology presented here can be applied for future technologies or with a refined, more comprehensive database.

6. Optimization of Converter Designs for a Specific Figure of Merit

6.1. Optimal Design Selection Approach

The main objective of establishing power loss models in Section 3 and Section 4 is to achieve the capability of selecting the “right components” in a converter. Such components can be selected based on a figure of merit, or an optimization objective function. These figures of merit include two main factors which are (1) minimum power loss; and (2) minimum cost. While co-optimizing for both can establish a Pareto front for acceptable local minima of cost and power loss, the next sections optimize for either power loss or cost, independently. Co-optimization is left for future work and is a natural next step of this paper.

In order to find component combinations that can optimize a figure of merit, a direct search optimization is performed with priority given to the component with most influence on the figure of merit being optimized. In both power loss and cost optimizations, inductors are given priority—(1) In power loss optimization, the impact of inductors on ripple and other components’ power losses is very significant; (2) in cost optimization, inductors tend to be the most expensive components. Figure 28 demonstrates the overall high-level direct search optimization performed. Section 6.2 and Section 6.3 present approaches for two different figures of merit being power loss and cost, respectively.

6.2. Minimum Power Loss Designs

Power loss models developed here are combined with converter ratings to automatically produce system-level minimum power loss and select the right components. This procedure reduces the manual effort in calculating component power losses to select a combination of components that minimizes power losses. Components are selected in the order that affects selection of other components—For example, selecting the inductor in a boost converter comes as a priority as it affects the losses in semiconductors and capacitor as the inductor determines the input current ripple. In order to search for components with compatible voltage and current ratings which are set by the designer, minimum inductance and capacitance values in addition to MOSFET and diode ratings for boost and buck converters in CCM are calculated based on [41,42], while component ratings are double the converter ratings even though this factor can be modified. The resulting minimum power loss does not guarantee low cost but selects components leading to a minimum converter power loss from the available database. A pseudo-code is shown below as an example for inductor selection for minimum inductor power loss and similar logic is applied to other components. Figure 29 shows a flowchart for the minimum power loss rapid prototyping tool.

Start

Get input and output parameters;

IL = Iin;

L = ((Vin × D × (1 − D))/(2 × fsw × Iout));

Lmax = 2 × L;

Read inductor.xls file and get the entire database;

for i = 1 to all database

if L <= inductor values in database &&

Lmax > inductor values in database

if IL <= inductor current values in database

Extract ACR, DCR and RC values from the database;

end if;

end if;

i = i + 1;

end if;

Calculate PACR, PDCR and PCORE as described in power loss model

Ploss_inductor = PACR + PDCR + PCORE;

Print component name;

The procedure shown in Figure 29 is integrated into a user-friendly GUI developed in MATLAB for rapid-prototyping. The user enters the converter type, currently boost or buck converter, and sets the operating points and basic specifications of the converter such as desired output voltage ripple and switching frequency, then receives suggested components based on the minimum combined power loss. This GUI is shown in Figure 30 and Figure 31 for buck and boost optimal component selection, respectively.

In order to validate the optimal component selection based on minimum converter power losses, all selected components based on compatible ratings were evaluated manually. Power losses highlighted as gray background in

Table 11. Component options for the buck converter minimum power loss example where shown components have values and/or ratings satisfy converter operating points.

MOSFET		Diode
Suitable Components	PLoss (W)	Suitable Components	PLoss (W)
FQD4N20TMFSCT-ND	5.03508831
FQD4N20TMFSDKRND	5.03508831	SK35A-LTP	2.878
Capacitor		STPS5H100B-TR	2.037
Suitable Components	PLoss (W)	B350A-13-F	2.881
UHE2A101MPD	0.005741826	SS35	2.877
ESH107M200AM7AA	1.07828776	CDBC5100-G	2.464
UVZ2F101MHD	0.014467593	SB550-E3/54	2.397
UPT2G101MHD6	0.014467593	SK55L-TP	2.464
Inductor		SB550	2.255
Suitable Components	PLoss (W)	CDBC580-G	2.458
PCV-0-104-01L	0.940523683	SS5P10-M3/86A	2.301
PCV-0-104-03L	0.35827212	SB580-T	2.213
PCV-0-104-05L	0.274278036	HSM580G/TR13	2.464
		RGP30B-E3/73	3.186
		SK310A-LTP	2.890
		CDBA3100-G	2.734
		B3100-13-F	2.586

and

Table 12. Component options for the boost converter minimum power loss example where shown components have values and/or ratings satisfy converter operating points.

MOSFET		Capacitor
Suitable Components	PLoss (W)	Suitable Components	PLoss (W)
RDN100N20FU6-ND	3.436527778	EEU-EB2D221	0.000223251
RDN100N20-ND	3.436527778	LGU2F221MELB	0.000223251
IRLI640GPBF	1.898888889	ECO-S2GB221EA	0.0271
IRLI640G	1.898888889	Inductor
FQP9N30	4.466997222	Suitable Components	PLoss (W)
STP12NK30Z 3.763864198	3.76386	PCV-0-274-10L	2.983
Diode		PCV-2-274-03L	3.3021
		PCV-2-274-05L
		PCV-2-274-10L
		PCV-2-394-05L
Suitable Components	PLoss (W)	PCV-2-274-05L	1.172
CDBB5200-HF	1.495	PCV-2-274-10L	1.528
		PCV-2-394-05L	3.299

are those for minimum power loss components and confirm results shown in Figure 30 and Figure 31. Other examples are shown in the Appendix B.

Note that a separate GUI has also been developed for component-specific evaluation as shown in Figure 32, where the effect of specific parameters and component choices can be visualized in terms of power loss.

6.3. Minimum Cost Designs

Another rapid prototyping tool is developed to achieve minimum cost of essential components for boost and buck converters as example applications. Component selection for minimum cost is done sequentially for different components based on converter ratings only. A short list of components that satisfy the converter ratings and values for inductance and capacitance is established, and components with minimum cost are selected. This selection is not necessarily optimal in terms of efficiency but ensures minimum cost based on the available database. The optimal-cost component selection pseudo-code is below and the flowchart is shown in Figure 33.

Start

Get input and output parameters;

L = ((Vin × D × (1-D))/(2 × fsw × Iout)); Lmax = 2 × L;

Read inductor.xls file and get all the database;

for i = 1 to all database

if L <= inductor values in database && Lmax > inductor values in database

Extract ACR, DCR and RC values from database;

Extract unit costs and multiple unit costs data base;

end  i = i + 1;

end

Find minimum cost of the component

Print minimum cost of the component for unit quantity;

Calculate PACR, PDCR and PCORE as described in power loss model;

Ploss_inductor = PACR + PDCR + PCORE;

Print component name; Print component cost;

Two GUIs were developed to implement rapid prototyping based on cost models with one GUI targetting minimum converter cost and the other targeting component-specific cost models. Screenshots of the tool designed for rapid prototyping to achieve minimum converter cost are shown in Figure 34 and Figure 35 for buck and boost converters, respectively.

Table 13. Component options for the buck converter optimal cost example where shown components have values and/or ratings satisfy converter operating points.

MOSFET		Diode
Suitable Components	Cost ($)	Suitable Components	Cost ($)
FQD4N20TMFSCT-ND	0.67	SK35A-LTP	0.57
FQD4N20TMFSDKR-ND	0.67	STPS5H100B-TR	1.4
Capacitor		B350A-13-F	0.46
Suitable Components	Cost ($)	SS35	0.63
UHE2A101MPD	0.56	B550C-13-F	0.95
ESH107M200AM7AA	1.02	SB550-E3/54	0.61
UVZ2F101MHD	1.85	SK55L-TP	0.49
UPT2G101MHD6	2.68	SB550	0.56
Inductor		CDBC580-G	0.74
Suitable Components	Cost ($)	SB580	0.59
PCV-0-104-01L	1.31	SB580-T	0.43
PCV-0-104-03L	1.48	HSM580G/TR13	1.34
PCV-0-104-05L	2.37	RGP30B-E3/73	0.476
		SK310A-LTP	0.57
		CDBA3100-G	0.63
		B3100-13-F	0.68
		CDBC5100-G	0.74
		SS5P10-M3/86A	0.77
		SB5100-T	0.74

and

Table 14. Component options for the boost converter optimal cost example where shown components have values and/or ratings satisfy converter operating points.

MOSFET
Suitable Components	Cost ($)	PLoss (W)
RDN100N20FU6-ND	2.73	3.436
RDN100N20-ND	2.73	3.436
IRLI640GPBF	2.88	1.898
IRLI640G	2.88	1.898
FQP9N30	1.18	4.467
STP12NK30Z	1.95	3.763864198
Diode
Suitable Components	Cost ($)	PLoss (W)
CDBB5200-HF	0.21	1.495
Inductor
Suitable Components	Cost ($)	PLoss (W)
PCV-0-274-10L	4.08	2.984
PCV-2-274-03L
PCV-2-274-05L
PCV-2-274-10L
PCV-2-394-05L
PCV-2-274-03L	4.15	3.302
PCV-2-274-05L	4.56	1.172
PCV-2-274-10L	7.39	1.528
PCV-2-394-05L	5.1	3.299
Capacitor
Suitable Components	Cost ($)	PLoss (W)
EEU-EB2D221	2.56	0.000223251
LGU2F221MELB	7.022	0.000223251
ECO-S2GB221EA	4.68	0.0271

show manual validation of these results based on the short list of components that meet the converter specifications in the available database. Results in Figure 34 and Figure 35 are highlighted in Table 13 and Table 14 for minimum cost. The component-specific GUI is shown in Figure 36.

As can be seen in the GUI screenshots and manual validations, the rapid prototyping tools holding all power loss models and cost models from Section 2 are very valuable for practicing engineers and researchers. These GUIs can be conveniently adjusted to include different component types, various technologies for specific components, and a growing database of component with adjustable cost and prices. While models running behind the GUIs may not be all inclusive of all losses in buck and boost converters, the presented methodology and MATLAB platform is very scalable and flexible. Engineers, designers, and researchers can iteratively and manually study the effect of different component parameters, e.g., MOSFET R_DS,on, on converter efficiency using the component-specific mode, or can rely on built in minimum cost or loss searches in the optimization mode.

7. Conclusions

This paper presents power loss and cost models of major power electronic components which can be further aggregated into power electronic converters. The proposed models are expected to aid designers in making preliminary useful estimates which help to decide specific components that can achieve desired system power loss and cost. Cost models are found based on an extensive survey of commercial devices followed by cost surface fitting. Power loss models are based on generalized forms that are reformulated to reach converter-specific models. Power loss models presented here are based on non-idealities and parasitic elements including PCB and gate drive losses to develop to achieve higher accuracy. The presented models are shown to be over 93% accurate. All models are integrated into MATLAB-based rapid prototyping tools designed for either minimum power loss or minimum cost component selection. With a large database, hundreds or thousands of various component options can be evaluated in minutes to achieve model-based component selection for optimized converter designs. The implementation of these tools with supplier databases is of major future interest, and extending the models to other applications and converters such as DC/AC inverters and AC/DC rectifiers can be achieved using the methodologies proposed here. Future work will include open-access web-based GUIs and possible linking to major supplier databases for up-to-date component lists that eliminate obsolete parts, and up-to-date prices.