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Article

A Comparative Performance Analysis of Zero Voltage Switching Class E and Selected Enhanced Class E Inverters

by
Ratil H. Ashique
1,*,
Md Hasan Maruf
1,
Kazi Md Shahnawaz Habib Sourov
2,
Md Mahadul Islam
2,
Aminul Islam
3,
Mamun Rabbani
4,
Md Rasidul Islam
1,
Mohammad Monirujjaman Khan
2 and
ASM Shihavuddin
1
1
Department of Electrical and Electronics Engineering, Green University of Bangladesh, Dhaka 1207, Bangladesh
2
Department of Electrical and Computer Engineering, North South University, Dhaka 1229, Bangladesh
3
Department of Mechanical Engineering, Technical University of Denmark, 2800 Kgs. Lyngby, Denmark
4
Department of Biomedical Physics and Technology, University of Dhaka, Dhaka 1000, Bangladesh
*
Author to whom correspondence should be addressed.
Electronics 2021, 10(18), 2226; https://doi.org/10.3390/electronics10182226
Submission received: 17 July 2021 / Revised: 29 August 2021 / Accepted: 1 September 2021 / Published: 10 September 2021
(This article belongs to the Section Power Electronics)

Abstract

:
This paper presents a comparative analysis of the class E and selected enhanced class E inverters, namely, the second and third harmonic group of class EFn, E/Fn and the class E Flat Top inverter. The inverters are designed under identical specifications and evaluated against the variation of switching frequency (f), duty ratio (D), capacitance ratio (k), and the load resistance (RL). To offer a comparative understanding, the performance parameters, namely, the power output capability, efficiency, peak switch voltage and current, peak resonant capacitor voltages, and the peak current in the lumped network, are determined quantitatively. It is found that the class EF2 and E/F3 inverters, in general, have higher efficiency and comparable power output capability with respect to the class E inverter. More specifically, the class EF2 (parallel LC and in series to the load network) and E/F3 (parallel LC and in series to the load network) maintain 90% efficiency compared to 80% for class E inverter at the optimum operating condition. Furthermore, the peak switch voltage and current in these inverters are on average 20–30% lower than the class E and other versions for k > 1. The analysis also shows that the class EF2 and E/F3 inverters should be operated in the stretch of 1 < k < 5 and D = 0.3–0.6 at the optimum load to sustain the high-performance standard.

1. Introduction

The class E inverter has found numerous applications in radio transmission, induction heating, industrial ultrasonic, renewable energy systems, or the commercial electronics industry [1,2,3,4,5,6,7,8,9,10,11]. The widespread adoption of this inverter is mainly due to the compact structure with low component count and high-power driving capability. On top of that, if coupled with the zero-voltage switching (ZVS) or zero derivative voltage switching (ZVDS) techniques, it can operate with high efficiency even at very high switching frequency. The analytical modeling and design of the ZVS/ZVDS class E inverters are well reported in the literature [1,2,8,9,10,11,12,13,14]. However, the class E has one big disadvantage. The high peak switch voltage (3.5 to 5 times depending simultaneously on the duty ratio, input inductance, and switching frequency) is of significant concern [15]. Henceforth, among other reasons, including improved stability and voltage regulation, the enhanced class E configurations are proposed to counter this issue. These inverters are classified as EFn or E/Fn inverters where n defines the harmonic tuning component and realized by adding tuned LC networks at the nth harmonic of the switching frequency [16,17,18,19,20]. Traditionally, the class EFn inverters are a combination of class E and class F inverters where n is even, while the class E/Fn is the combination of class E and class 1/F inverters where n is odd. In addition to that, the flat top-class E is another alternative configuration that offers a flat top switch voltage with lowered peak [21,22,23]. Technically, the flat top feature is achieved by tuning an LC resonant network to the nearest even harmonic and emphasizing the odd harmonics into the fundamental voltage waveform.
The analytical models to correctly describe the characteristic behavior of enhanced class E inverters have been investigated in [11,15,17,18,19,22,23,24,25,26,27,28,29,30,31,32]. Based on the analysis technique, these models can be classified into the waveform equation [11,17,22,24], state-space [15], or frequency domain [25] methods. These models either provide a closed-form analytical expression for describing the circuit behavior or present a numerical solution with design-oriented curves [11].
Despite the attractive features these inverters might offer, the literature on this topic has not grown so far. Currently, only a handful of journals can be found dedicated to developing a comparative performance analysis. For example, a discussion of the class E, EF2, and E/F3 inverters can be found in [15,17]. In [15], the inverters are primarily designed to maximize the power output capability at soft switching conditions. The peak switch voltage and current are measured by varying the duty ratio. The paper also concludes that the class EF2 and E/F3 inverters outperform class E in terms of efficiency and power output capability. Nevertheless, it does not demonstrate the state of the efficiency, auxiliary peak capacitor voltage and current in the lumped network and against the variation of other important parameters, such as the switching frequency, resonant components, and load. Additionally, instead of considering the diverse configurations for the lumped network, the performance evaluation is restricted to the ‘series LC in parallel to the load network’ only. In [17], the authors mainly concentrate on evaluating the class E/F3 inverter, which is designed to operate at optimum operating point with a constant 50% duty ratio. It concludes that the third harmonic tuning (i.e., class E/F3) provides higher efficiency and lower peak switch voltage compared to the class E. However, similar to [15], the performance is not justified with the variation of other important parameters, such as the switching frequency, resonant components, and load. Furthermore, as in [15], only the lumped ‘series LC in parallel to the load network’ configuration is considered. Henceforth, the comparative evaluation is incomplete unless the aforementioned issues are addressed considerably.
Based on these facts, this paper mainly intends to understand the comparative performances of the class E and selected enhanced class E inverters in various configurations designed under identical specifications by adopting the classical analytical models. However, to reduce the workload, a unified design approach is followed. The latter would allow for building a ‘base’ class E prototype circuit and transforming it into the enhanced versions by simply adding the lumped auxiliary networks. The performance parameters are then measured and compared quantitatively.

2. The Circuit Operation of Class E and Enhanced Class E Inverters

2.1. The Circuit Configurations

The generalized class E and enhanced class E inverter topology is shown in Figure 1. The inductance Ls and the capacitance Cs resonate at a resonant frequency (fr) according to a chosen quality factor (Q). The input inductance (Lf) is designed to provide a constant dc current, a very low ripple current. The input current ripple is inversely proportional to Lf. The input capacitance Cin facilitates the ZVS and absorbs the drain to source non-linear capacitance (Cds) of the switch. The auxiliary resonant branch in EFn and E/Fn inverters consists of the auxiliary resonant inductance (L1) and capacitance (C1) arranged in a series or parallel formation. They resonate at a frequency of nfs where fs is the optimum switching frequency and chosen to be greater than fr. The multiplier n is an integer and determined by L1, C1, and fs. The switch S1 is operated at an optimum duty ratio Dopt to achieve the ZVS operation. The switching pattern is given as follows.
Switch = Turned   ON ,   0 θ < 2 π D Turned   OFF ,   2 π D θ < 2 π
Depending on the auxiliary resonant branch configuration, the EFn and E/Fn inverters can be classified as demonstrated in Table 1. This classification is accompanied by a convenient ‘short-form’ representation. Throughout this document, these short-forms are used to refer to the corresponding inverter. The class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters are also known as ‘second harmonic’ and ‘third harmonic’ class E inverters, respectively.

2.2. Modes of Operation and Input Impedance (Zin)

In Figure 2, the impedance distribution and the currents are shown. The class E and class E based inverters operate in two modes. In mode 1, the switch S1 is turned ON and the voltage across the capacitor Cin falls to zero. The input current (Iin) flows through the switch S1 and the Lf stores energy. In the resonant tank, resonant current flows through the switch exchanging stored energy from Cs to Ls and completing half of the resonance cycle. By the end of this cycle, this current decreases, and the energy transfer is completed. In mode 2 as soon as S1 is closed at θ = 2πD, Iin diverts to charge the input capacitor Cin, which eventually reaches the peak voltage before it discharges through the resonant tank. The peak voltage can also be signified as the peak switch voltage (VS1,peak) of the inverter. Due to the inductive nature of the load network, the output current (Iout) lags the input voltage to the resonant tank (VS1). To achieve ZVS or ZVDS, the following conditions must be satisfied.
V S 1 ( 2 π ) = 0
and   d d θ V S 1 ( 2 π ) = 0
The class E inverter demonstrates two resonant frequencies: fr1 (S1 is ON) and fr2 (S1 is OFF). These frequencies can be determined as follows.
f r 1 = 1 2 π L s C s   and   f r 2 = 1 2 π L s C s _ e q
where   C s _ e q = C s C i n C s + C i n
Additionally, the quality factor (Q) of the circuit is defined as:
Q 1 = ω S 1 L s R L , o p t = ω S 1 R L , o p t C s ( S 1   is   ON )   and   Q 2 = ω S 2 L s R L , o p t = ω S 2 R L , o p t C s _ e q ( S 1   is   OFF )
Throughout this document, wherever fr is mentioned, it is meant to be the series resonant frequency fr1. The input impedance of the resonant tank at the switch ON and OFF states are stated in Equations (1) and (2), respectively.
Z i n , O N = R 2 L + 2 π f s L s 1 2 π f s C s 2
Z i n , O F F = 1 16 + C s 2 L s 2 π 4 f s 4 + 1 4 π 2 C s f s 2 C s R 2 L 2 L s C s 2 C i n 2 L s 2 π 4 f s 4 + 1 4 π 2 C s C i n f s 2 C s R L 2 2 L s C i n 2 C s L s + 1 16 C s + C i n 2 f s 2 2 π
The class EFn and E/Fn inverters incorporate an auxiliary resonant branch tuned to multiple n of the optimum switching frequency fs. The primary series resonant frequency is identical to that of class E and determined by the resonant inductance Ls and resonant capacitance Cs. The secondary resonant frequency fr2 in the class E and EFn (sLCpLN) can be characterized by parallel resonance and determined by the primary and auxiliary resonant components (L1, C1) and their configurations. The input impedances for sLCpLN and pLCsLN configurations are stated in Equations (3) and (4) respectively. A representative diagram in Figure 2 shows the impedances and currents in the primary and auxiliary resonant networks. The primary and nth harmonic current is defined by iprires and iauxres, respectively. The definitions for variables A, B, C, D, and E are stated in Equations (10)–(14).
Z i n , O F F = 1 2 π A B + C D f s 2
Z i n , O F F = π f s L 1 1 4 π f s C 1 2 + E R L 2 2 π f s C i n R L 2 + E + 2 π f s L 1 1 2 π f s C 1 1 2 π f s C i n 2
To exemplify the behavior pattern, the impedances are plotted in Figure 3 against ɷ for mode 2 according to the specifications described in Table 2. The primary series resonant frequency fr1 and the second parallel resonant frequency fr2 are identical for class E, EF2 (sLCpLN), and E/F3 (sLCpLN) configurations. This is shown in Figure 3a,b where ωfr1s ≈ 0.85 and ωfr2s ≈ 1. However, due to the series configuration of the L1C1 to the load network, the primary resonance frequency (fr1) is altered in EF2 (pLCsLN) and E/F2 (pLCsLN) configurations. This is shown in Figure 3c, where ωfr1s ≈ 2 and ωfr1s ≈ 3 for EF2 and E/F3, respectively. In addition to that, a third series resonance close to ω/ωs ≈ 1 (i.e., at fr3) occurs in EF2 (sLCpLN) and E/F3 (sLCpLN) configurations. This can be observed in Figure 3b, where ωfr3s ≈ 2 and ωfr3s ≈ 3 for EF2 and E/F3, respectively. This feature, particularly, enables these inverters to transfer more power at identical input voltage (Vin), duty ratio (D), and switching frequency (f) compared to class E. Additionally, a lower impedance for class EFn and E/Fn, in general, induces lower loss and higher efficiency. A fourth parallel resonance can be found for both class EF2 (sLCpLN, pLCsLN) and E/F3 (sLCpLN, pLCsLN) inverters at much higher frequency, where ωfr4s > 4. Again, fr4 is characterized by parallel resonance and largely determined by the auxiliary branch components.

2.3. The Peak Switch Voltage (VS1,peak)

The capacitor current (iCin) in class E inverter can be expressed in terms of the input current (Iin) and the sinusoidal resonant current as:
i C i n ω t = I i n I m sin ω t + φ
where, Im is the maximum resonant current. By integrating Equation (5) and applying the ZVS conditions [1,2], the switch voltage (VS1) and the peak switch voltage (VS1,peak) can be derived as:
V S 1 = 2 I i n π D + I i n θ n I i n cos 2 π D + φ + I i n θ + I m cos θ + φ ω C i n
V S 1 , p e a k = 2 P o u t R L D 1 4 π 2 D 1 2 1 D 1 2 + sin 1 1 2 π D 1 + φ 2 π ω C i n D 1
where symbols carry their usual meaning. As can be noted, VS1,peak is a function of duty cycle (D), switching frequency (f), and input capacitance (Cin). As for class EFT, VS1,peak can be approximated using Equation (9).
i C i n ω t = I i n + I n sin n ω t + I m sin ω t + φ
V S 1 = 2 I i n n π D + I i n θ n + n I m cos 2 π D + φ n I m cos θ + φ + I n cos 2 n π D I n cos n D ω n C i n
As opposed to class E and EFT, iCin and VS1,peak in class EFn and E/Fn inverters are also a function of n [9,15]. The expression for iCin and VS1 are shown in Equations (8) and (9), respectively. From Equation (9), VS1,peak is solved numerically and plotted in Figure 4 against ɷ, D, and Cin at the optimum operating condition described in Table 2. In general, it decreases with increasing f and D. Additionally, at any given f and D, VS1,peak decreases with increasing Cin. It is also to be noted that VS1,peak for the given case (i.e., k < 1) is higher for EF2 inverters than class E and EF3 counterparts. Furthermore, as the odd (particularly, 3rd) harmonic currents are emphasized (second harmonic being bypassed through the auxiliary branch), EF2 switch voltage peak would have a flattening effect. This is observable in a later section (see Figure 5c).
A = C 1 L 1 π f s 1 4 2 1 6 + C s 2 L s 2 π 4 f s 2 + 1 4 π 2 C s f s 2 C s R L 2 2 L s
B = C 1 2 C s 2 C i n 2 L 1 2 L s 2 π 8 f s 8 + L 1 π 6 C s C i n L 1 R L 2 2 L s L 1 + L s C 1 2 C i n L s 2 C s 2 C i n C 1 L 1 L s C 1 C in f s 6 4
C = π 4 16 2 C i n L 1 R L 2 + L 1 + L s 2 C 1 2 2 C i n C i n L 1 R L 2 2 L 1 L s L s 2 C 1 + C i n 2 L s 2 C s 2 + 4 L 1 L 1 2 + L s C 1 + C i n L s C 1 C i n C s + C i n 2 C 1 2 L 1 2 f s 4
D = C i n + C 1 + C s 2 256 π 2 f s 2 C 1 2 R L 2 2 + C i n R L 2 + L 1 + L s C 1 C i n 2 R L 2 2 + C i n L s C s 2 + L 1 + L s C 1 2 + 2 C i n C 1 L 1 + L s + C i n 2 L s C s + C i n C 1 L 1 C i n + C 1 32
E = 1 2 π f s C 1 3 2 L 1 C 1 8 π 2 f s 2 L 1 2 4 2 π f s L 1 1 2 π f s C 1 2

3. Design of the Class E and Enhanced Class E Inverters

In this section, based on the analytical models described elsewhere [1,2,9,15,19,25,26,27], the class E and enhanced class E inverters are designed. The inverters are designed to fulfill an identical requirement, specified in Table 2, to help formulate a fair comparison. The inverters share a common ‘base’ structure of class E with identical input inductance (Lf), resonant components (Ls and Cs), and input capacitance (Cin) [2,28]. In this process, the following assumptions are involved:
  • All the components are ideal and do not possess any parasitic resistance, inductance, or capacitances.
  • The switch is ideal. The switch on-resistance is zero and off-resistance is infinite. The switching time is negligible.
The design methodology is summarized in Table 3.

3.1. The Optimum Load Resistance (RL,opt)

Class E

To start with the design process, the optimum load resistance for class E has to be determined for the rated output power Pout. Hence, in a transformer less configuration, the optimum load resistance (Ri) is defined as
R i = 8 π 2 + 4 × V i n 2 P o u t
Now, replacing Vin = 50 V and Pout = 25 W in Equation (14) and considering the transformer ratio: n,
R L , o p t = 8 π 2 + 4 × 50 2 25 × 1 n 2 = 57.68 n 2 Ω
The voltage (Vpri) at the primary side of the transformer is a function of Vin and D as defined by the following:
V p r i = 4 sin π D sin π D + φ π 2 1 D × V i n
where φ = phase of the resonant tank current and is defined as
ϕ = π + arctan cos 2 π D 1 2 π 1 D + sin 2 π D
Now, replacing D = Dopt in Equation (18):
ϕ = 2.574 ( r a d )
Replacing Vin in Equation (17), we obtain:
V p r i = 34.17   V
However, considering the specified output voltage Vout = 5 V, the required transformer ratio is:
n = 34.17 5 7
Accordingly, RL,opt has to be updated as:
R L , o p t = 57.68 7 2 1.17
The load resistance RL,opt for EF2 (sLCpLN), EF3 (sLCpLN), E/F2 (pLCsLN), and E/F3 (pLCsLN) is [11,28] selected as 4, 10, 3, and 2 Ω, respectively, to provide specified Vout, Pout and ZVS by varying switching frequency (f).

3.2. The Optimum Duty Ratio (Dopt)

D o p t k = 0.39275 k 0.26593 k 0.62755
The optimum duty ratio for class E and EFFT inverter is 0.50 [2,19,25,26]. The optimum duty ratio for class EFn and E/Fn inverters (n = 2) can be calculated from Equation (23) as ≈0.40. If n = 3, the concept described in [28] is used to determine the optimum duty ratio.

3.3. The Input Capacitance (Cin,opt)

3.3.1. Class E

The input capacitance (Cin,opt) of the converter is given by:
C i n , o p t = 2 sin π D cos π D + φ sin π D + φ 1 D π cos π D + sin π D π 2 ω R i 1 D
Replacing parametric values in Equation (23) gives us:
C i n , o p t 2 sin π × 0.5 cos π × 0.5 + 2.57 sin π × 0.5 + 2.57 1 0.5 π cos π × 0.5 + sin π × 0.5 π 2 × 2 π × 200 k × 57.68 × 1 0.5 F 2.53   nF

3.3.2. Class EFn and E/Fn

ω R L , o p t C i n = 0.14069 k + 0.08613 k + 0.1315
Using the design curves presented in [11], the Cin for EF3 (sLCpLN) and E/F3 (pLCsLN) can be calculated using Equation (26) to achieve ZVS for any given RL. However, [28] gives us more freedom to select any convenient Cin (and rather vary f) to achieve the ZVS condition. The latter technique is followed in this paper.

3.4. The Input Inductor (Lf)

The input inductance (Lf) of the converter is given by:
L f = 2 π 2 4 + 1 R i f s
Replacing parametric values in Equation (27) gives us:
L f = 2 π 2 4 + 1 1.17 200 k 37   μ H

3.5. The Resonant Inductance (Ls)

The resonant inductance can be determined as follows:
L s = Q L R L , o p t ω s
Replacing the parametric values in (29) and assuming QL = 7 and replacing fs gives us:
L s = 7 × 57.68 2 π × 200000 321.3   μ H

3.6. The Resonant Capacitance (Cs)

Using fs and Ls as determined in Equation (30) gives us,
C s = 1 ω s 2 L s
Replacing the parametric values in Equation (31) gives us:
C s = 1 2 π × 200 k × 321   μ   F
The design of Ls and Cs are applicable for class E, EFT, EFn, and E/Fn inverters [2,9,27].

3.7. The Auxiliary Resonant Inductance (L1) and Capacitance (C1)

By choosing k in Equation (33), C1 is determined. The auxiliary resonant inductance (L1) is then calculated from Equation (34). Similarly, this design of L1 and C1 is applicable for class E, EFn, and E/Fn inverters [2,9,19,27].
k = C i n C 1   and   n = 1 ω s L 1 C 1
L 1 = 1 n 2 ω s 2 C 1

3.8. The Capacitance (Cex) and the Shifting Inductance (L)

m = 1 ω s L C e x   m 5.9
The capacitance (Cex) and L have to be selected to maintain a flat top switch voltage, as well as for desired peak switch voltage and current. From Equation (35) as in [3], Cex and L can be determined. Here, m is selected to maintain a flat top switch voltage [3]. Accordingly, Cex = 2.5 nF and L = 6 µH are selected.

4. Simulation and Experimental Analysis

As mentioned earlier, the inverters are designed to satisfy an identical criterion described in Table 1 for objective comparison. Based on the analytical models, the circuit components for the corresponding inverters are designed. Accordingly, the inverters are tested in LTspice simulation environment, and the prototypes are built to support and verify the simulation data. The list of components used to build and test the prototypes are demonstrated in Table 4. In the next section, the experimental results are presented. In Figure 5a–c, the switch voltage waveforms of class E and EFn and E/Fn prototype inverters at the optimum operating point are shown. In Figure 6, Figure 7, Figure 8, Figure 9 and Figure 10, the performance parameters measured against f, D, k, and RL are demonstrated. A comparison at the optimum operating point is presented in Figure 6.

5. Results and Discussion

The inverters were experimentally tested by varying the switching frequency (f), duty cycle ratio (D), capacitance ratio (k), and the load resistance (RL). The primary objective was to evaluate the voltage and current at different points of interest. These parameters would help define the component ratings, the size of the inverter, and relative complexity in control. Eventually, a qualitative comparison can be formulated. The results are accumulated in Figure 5, Figure 6, Figure 7, Figure 8, Figure 9 and Figure 10. The voltage regulation is defined as follows:
V R % = V o u t , r m s V o u t , r a t e d V o u t , r a t e d × 100
In addition, the efficiency is measured as follows:
η = P o u t P i n × 100 = V r m s I r m s V d c I d c × 100
Table 5 demonstrates a comparative cost difference of the class E and enhanced class E inverters. As low power inverters, the components are small in size. Hence, the induced cost for a single inverter is low. However, in general, the cost of building enhanced class E inverters could be more than 20% than that of the class E inverter. In addition, the cost would increase nonlinearly with the power rating of the inverter.
The resonant tank of the inverters is designed to resonate at fr with a predefined quality factor Q. By varying the switching frequency f, the inverter rms output voltage, output power, peak switch voltage and current, and peak voltage across the resonant capacitors are measured. It was observed that the optimum operability (i.e., ZVS) sustained at the vicinity or close proximity of the resonant frequency fr. The power output capability was maximum in this region. As f increased, the resonant tank, which behaves like a bandpass filter, blocked the higher harmonics. Resultantly, the power flow was curtailed. Because of the higher input impedance (Zin), the efficiency also dropped. In general, the peak switch voltage (VS1,peak) and the peak resonant capacitor voltage (VC1,peak) dropped with increasing frequency. This is due to the capacitor current (iCin), which also reduces with increasing f. The lowest VC1,peak were recorded for the pLCsLN configurations for k < 1. However, as more current was being diverted through the switch (S1) from the auxiliary networks, there was an apparent rise in the peak switch current (IS1,peak) for sLCpLN configurations. These results are demonstrated in Figure 7a–h.
The optimum duty ratio (Dopt) of class E inverter was 0.50, while for class EFn and E/Fn inverters, it was approximately 0.40. Any deviation from these values would incur higher switching losses in the respective inverter type due to the loss of soft switching operation. In Figure 8a–h, the inverters were evaluated by varying the duty ratio (D) while operating at the corresponding optimum load (RL,opt) and fs. It was observed that at extreme D (≥0.7), the energy delivered to the resonant tank deteriorated due to longer switch ON time. The energy stored in the input inductor (Lf) increased with D but mostly diverted through the switch S1. Hence, the switch voltage and current increases gave rise to switch conduction losses. Subsequently, the efficiency, while remaining fairly constant, dropped at extreme D. The highest efficiency was recorded for class E and the pLCsLN configurations at around 80–90% in the proximity of Dopt. The peak resonant capacitor voltages were relatively unaffected by D. The peak switch current (IS1,peak) was significantly higher (2–3 times) for sLCpLN configurations at k < 1. However, this could be lowered significantly by operating the inverters at higher k (>1). This fact is demonstrated in Figure 8c. The peak auxiliary resonant current (IL1,peak) in the sLCpLN configurations became significantly higher at extreme D however, this could be avoided by increasing k.
The ratio k is defined by the ratio of the input capacitance to the auxiliary resonant capacitance (Cin/C1). The variation k can be translated as the variation of the auxiliary resonant components (L1 and C1) while keeping n constant. Hence, by definition, increasing k means decreasing C1 and increasing L1 and vice versa. In general, with increasing k, the rms output voltage and power output capability (cp) drops. The efficiency (η) also drops with higher k. This is shown in Figure 9a–h. k < 1, VS1,peak, and IS1,peak for sLCpLN configurations were significantly higher (2–3 times) than class E and pLCsLN configurations, as mentioned earlier. This was mainly due to the excessive energy that was stored in the large resonant capacitor C1 and subsequently dissipated through the switch at the turn ON instant. As k increased, the resonant inductance L1 became bigger and diverted almost a constant current through S1. Hence, VS1,peak and IS1,peak remained fairly constant at higher k. However, because of smaller C1 at higher k, a relatively larger voltage was induced across C1 (i.e., VC1,peak).
On the other hand, the increasing load resistance (RL) drove the inverter operating from continuous conduction mode (CCM) to the discontinuous conduction mode (DCM). Hence, Vout,rms and cp decreased, with increasing RL being maximum at RL,opt. The peak switch voltage and current (VS1,peak and IS1,peak) remained fairly constant over the entire load range. VC1,peak and IL1,peak were relatively higher (2–4 times) for sLCpLN configurations. The voltage regulation (VR) was higher at lower loads. The results are demonstrated in Figure 10.
In Figure 6, the performance parameters recorded at the optimum operating point (Dopt = 0.50 or 0.40, RL = RL,opt) are demonstrated. The maximum and minimum quantities are marked in ‘red’ and ‘sky blue’, respectively. As obvious from Figure 6a, cp is maximum for class E and EF2 (sLCsLN) configuration at k > 1, recorded as 0.1356 and 0.215, respectively. The lowest is 0.01 for EF2 (sLCsLN) configuration at k < 1. Again, as shown in Figure 6b, the class E and pLCsLN configurations demonstrated higher efficiency compared to the sLCpLNs. The maximum and minimum efficiency were recorded for class E/F3 (pLCsLN) (k < 1) and E/F3 (sLCpLN) (k < 1) as 91% and 58%, respectively. However, η did not vary largely with k. The peak switch voltage in Figure 6c was generally lower for higher k. The maximum and minimum are recorded for class EF2 (sLCpLN) at 5.1 and 2.74 for k < 1 and k > 1, respectively. However, a further reduction of VS1,peak was possible by increasing k, as demonstrated in Figure 9c. The peak switch current (IS1,peak) was generally higher in sLCpLN compared to the pLCsLN configurations. The highest and lowest IS1,peak were recorded at 3.25 and 1.17 for class EF2 (sLCpLN) (k < 1) and class E, respectively, as demonstrated in Figure 6d. From Figure 9d, it can be deduced that selecting k > 1 and k < 1 for sLCpLN and pLCsLN can minimize IS1,peak further. The peak voltage across the resonant capacitor (VC1,peak) was lower for pLCsLN configurations (2–3 times than sLCpLN in general), as can be observed in Figure 6f. This is expected as the voltage across the load network is shared across the capacitors Cs and C1 for pLCsLN configurations. On the other hand, the peak current in the auxiliary resonant network (IL1,peak) is notably higher for k < 1 (See Figure 9g). The summary of these findings and optimum operating conditions for enhanced inverters are accumulated in Table 6.
In addition to the comparison presented in Figure 7, Figure 8, Figure 9 and Figure 10, the switching losses and THD are demonstrated in Figure 11 and Figure 12 respectively. As can be observed, the switching loss is minimized due to application of ZVS and ZVDS. The percentage loss is maximum for class EF2 (sLCpLN) at approximately 3.6%. The loss is minimum for class E/F3 (pLCsLN) inverters at 3.08%. The THD can be greatly improved by adding extra filter at the output of the inverter.

6. Conclusions

In this paper, the class E and enhanced class E inverters are investigated for comparative performance analysis. Extensive simulation and experimental testing are performed in this regard. It is observed that the enhanced class E inverters excel beyond the conventional ZVS class E inverters in terms of efficiency and power output capability. This is also in line with the research published elsewhere. To be specific, the class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters demonstrate higher efficiency (8–10% higher) compared to other configurations. This is mainly due to the lowered switch conduction losses. In addition, the peak switch voltage and current are significantly lower (≈20–30%) in these inverters at the optimum operating condition while k > 1, and k = Cin/C1. On the other hand, the peak capacitor voltages in all enhanced versions are lowered by 2–3 times on average. However, the peak current in the lumped auxiliary network of these inverters are 2–3 times higher. Based on the simulation and experimental results, it is recommended that class EFn and E/Fn inverters are operated at 1 < k < 5 and D = 0.3–0.6 for sustained higher efficiency, power output capability, and lower switch stress.

Author Contributions

Conceptualization, R.H.A.; data curation, K.M.S.H.S. and M.M.I.; formal analysis, A.I., R.H.A. and M.R.I.; funding acquisition, A.I.; investigation, R.H.A. and M.H.M.; methodology, R.H.A. and M.R.; project administration, A.S.; resources, M.H.M. and M.M.K.; software, R.H.A.; validation, A.S.; visualization, M.R.I.; writing—original draft, R.H.A.; writing—review and editing, R.H.A. All authors have read and agreed to the published version of the manuscript.

Funding

This research received no external funding.

Conflicts of Interest

The authors declare no conflict of interest.

Highlights

  • The average output power of class E is higher than the class EFn and E/Fn inverters across the switching frequency (fs), duty cycle ratio (D), capacitance ratio (k), and the load resistance (RL).
  • The peak switch voltage for class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters are 20–30% lower than class E, particularly at D = 0.2 − 0.7 for any load condition and for any k at the optimum load.
  • The average output power of class E is higher than the class EFn and E/Fn inverters across the switching frequency (fs), duty cycle ratio (D), capacitance ratio (k), and the load resistance (RL).
  • The power output capability (high output power at lower switch stress) of class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters are on par with class E at the optimum load for D = 0.4 − 0.7 and for k < 5.

Abbreviations

1ZVSZero voltage switching
2ZCSZero current switching
3ZVZCSZero voltage zero current switching
4ZVDSZero voltage derivative switching
5CCMContinuous conduction mode
6DCMDiscontinuous conduction mode

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Figure 1. The class E and enhanced class E topologies with auxiliary resonant networks.
Figure 1. The class E and enhanced class E topologies with auxiliary resonant networks.
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Figure 2. Impedance and current distribution (ideal) for class E and enhanced topologies with auxiliary resonant network.
Figure 2. Impedance and current distribution (ideal) for class E and enhanced topologies with auxiliary resonant network.
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Figure 3. Input impedance (Zin) of (a) class E at switch ON and OFF conditions (b) class EF2 and EF3 at switch OFF condition (c) class E/F2 and E/F3 at switch OFF condition at Vin = 50 V, Dopt = 0.5, fs = 220 kHz, RL = RL,opt, k ≈ 0.30 (EF2) and 0.67 (E/F3).
Figure 3. Input impedance (Zin) of (a) class E at switch ON and OFF conditions (b) class EF2 and EF3 at switch OFF condition (c) class E/F2 and E/F3 at switch OFF condition at Vin = 50 V, Dopt = 0.5, fs = 220 kHz, RL = RL,opt, k ≈ 0.30 (EF2) and 0.67 (E/F3).
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Figure 4. Peak switch voltage (VS1,peak) of class E, EF2, and EF3 against (a) normalized switching frequency (ω/ωs), (b) duty ratio (D), (c) the input capacitance (Cin) at Vin = 50 V, Dopt = 0.50 (E) or 0.40 (EF2, E/F3), fs ≈ 220 kHz, RL = RL,opt, k ≈ 0.30 (EF2) and 0.67 (E/F3).
Figure 4. Peak switch voltage (VS1,peak) of class E, EF2, and EF3 against (a) normalized switching frequency (ω/ωs), (b) duty ratio (D), (c) the input capacitance (Cin) at Vin = 50 V, Dopt = 0.50 (E) or 0.40 (EF2, E/F3), fs ≈ 220 kHz, RL = RL,opt, k ≈ 0.30 (EF2) and 0.67 (E/F3).
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Figure 5. Class E: (a) VS1; Class EFT: (b) VS1; Class EF2: (c) VS1 (sLCpLN), (d) VS1 (sLCpLN), (e) VS1 (pLCsLN), (f) VS1 (pLCsLN); Class EF3: (g) VS1 (sLCpLN), (h) VS1 (sLCpLN), (i) VS1 (pLCsLN), (j) VS1 (pLCsLN) at fs ≈ 220 kHz, k ≈ 0.30,1.30 (EF2) and 0.67,3.02 (E/F3).
Figure 5. Class E: (a) VS1; Class EFT: (b) VS1; Class EF2: (c) VS1 (sLCpLN), (d) VS1 (sLCpLN), (e) VS1 (pLCsLN), (f) VS1 (pLCsLN); Class EF3: (g) VS1 (sLCpLN), (h) VS1 (sLCpLN), (i) VS1 (pLCsLN), (j) VS1 (pLCsLN) at fs ≈ 220 kHz, k ≈ 0.30,1.30 (EF2) and 0.67,3.02 (E/F3).
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Figure 6. The normalized parameters recorded at the optimum condition (Dopt = 0.50 or 0.40, RL = RL,opt, low and high k) (a) power output capability, cp; (b) Efficiency, η (%); (c) normalized peak switch voltage, VS1,peak/Vin; (d) normalized peak switch current, IS1,peak/Im; (e) normalized peak auxiliary resonant capacitor voltage, VC1,peak/Vin; (f) normalized peak resonant capacitor voltage, VCs,peak/Vin; (g) normalized peak auxiliary resonant current, ILc,peak/Im.
Figure 6. The normalized parameters recorded at the optimum condition (Dopt = 0.50 or 0.40, RL = RL,opt, low and high k) (a) power output capability, cp; (b) Efficiency, η (%); (c) normalized peak switch voltage, VS1,peak/Vin; (d) normalized peak switch current, IS1,peak/Im; (e) normalized peak auxiliary resonant capacitor voltage, VC1,peak/Vin; (f) normalized peak resonant capacitor voltage, VCs,peak/Vin; (g) normalized peak auxiliary resonant current, ILc,peak/Im.
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Figure 7. (a) The power output capability (cp); (b) efficiency (η); (c) the normalized peak switch voltage (VS1,peak/Vin); (d) the normalized peak switch current (IS1,peak/Im); (e) the normalized peak resonant capacitor voltage (Vcs,peak/Vin); (f) the normalized peak auxiliary resonant capacitor voltage (VC1,peak/Vin); (g) the normalized peak auxiliary resonant current (IL1,peak/Im); (h) voltage regulation in percentage against normalized switching frequency (ω/ωs) at fs = 220 kHz, D = 0.50 (E), 0.40 (EF2,E/F3) k ≈ 0.30 (EF2) and 0.67 (E/F3).
Figure 7. (a) The power output capability (cp); (b) efficiency (η); (c) the normalized peak switch voltage (VS1,peak/Vin); (d) the normalized peak switch current (IS1,peak/Im); (e) the normalized peak resonant capacitor voltage (Vcs,peak/Vin); (f) the normalized peak auxiliary resonant capacitor voltage (VC1,peak/Vin); (g) the normalized peak auxiliary resonant current (IL1,peak/Im); (h) voltage regulation in percentage against normalized switching frequency (ω/ωs) at fs = 220 kHz, D = 0.50 (E), 0.40 (EF2,E/F3) k ≈ 0.30 (EF2) and 0.67 (E/F3).
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Figure 8. (a) The power output capability (cp); (b) efficiency (η); (c) the normalized peak switch voltage (VS1,peak/Vin); (d) the normalized peak switch current (IS1,peak/Im); (e) the normalized peak resonant capacitor voltage (Vcs,peak/Vin); (f) the normalized peak auxiliary resonant capacitor voltage (VC1,peak/Vin); (g) the normalized peak auxiliary resonant current (IL1,peak/Im); (h) voltage regulation in percentage against duty ratio (D) at fs ≈ 220 kHz, k ≈ 0.30 (EF2) and 0.67 (E/F3).
Figure 8. (a) The power output capability (cp); (b) efficiency (η); (c) the normalized peak switch voltage (VS1,peak/Vin); (d) the normalized peak switch current (IS1,peak/Im); (e) the normalized peak resonant capacitor voltage (Vcs,peak/Vin); (f) the normalized peak auxiliary resonant capacitor voltage (VC1,peak/Vin); (g) the normalized peak auxiliary resonant current (IL1,peak/Im); (h) voltage regulation in percentage against duty ratio (D) at fs ≈ 220 kHz, k ≈ 0.30 (EF2) and 0.67 (E/F3).
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Figure 9. (a) The power output capability (cp); (b) efficiency (η); (c) the normalized peak switch voltage (VS1,peak/Vin); (d) the normalized peak switch current (IS1,peak/Im); (e) the normalized peak resonant capacitor voltage (Vcs,peak/Vin); (f) the normalized peak auxiliary resonant capacitor voltage (VC1,peak/Vin); (g) the normalized peak auxiliary resonant current (IL1,peak/Im) (h) voltage regulation in percentage against capacitance ratio (k) at fs ≈ 220 kHz, D = 0.50 (E) or 0.40 (EF2, E/F3).
Figure 9. (a) The power output capability (cp); (b) efficiency (η); (c) the normalized peak switch voltage (VS1,peak/Vin); (d) the normalized peak switch current (IS1,peak/Im); (e) the normalized peak resonant capacitor voltage (Vcs,peak/Vin); (f) the normalized peak auxiliary resonant capacitor voltage (VC1,peak/Vin); (g) the normalized peak auxiliary resonant current (IL1,peak/Im) (h) voltage regulation in percentage against capacitance ratio (k) at fs ≈ 220 kHz, D = 0.50 (E) or 0.40 (EF2, E/F3).
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Figure 10. (a) The power output capability (cp); (b) efficiency (η); (c) the normalized peak switch voltage (VS1,peak/Vin); (d) the normalized peak switch current (IS1,peak/Im); (e) the normalized peak resonant capacitor voltage (Vcs,peak/Vin); (f) the normalized peak auxiliary resonant capacitor voltage (VC1,peak/Vin); (g) the normalized peak auxiliary resonant current (IL1,peak/Im); (h) the voltage regulation (VR) in percentage against load resistance (RL) at fs = 220 kHz, D = 0.50 or 0.40, k ≈ 0.30 (EF2) and 0.67 (E/F3).
Figure 10. (a) The power output capability (cp); (b) efficiency (η); (c) the normalized peak switch voltage (VS1,peak/Vin); (d) the normalized peak switch current (IS1,peak/Im); (e) the normalized peak resonant capacitor voltage (Vcs,peak/Vin); (f) the normalized peak auxiliary resonant capacitor voltage (VC1,peak/Vin); (g) the normalized peak auxiliary resonant current (IL1,peak/Im); (h) the voltage regulation (VR) in percentage against load resistance (RL) at fs = 220 kHz, D = 0.50 or 0.40, k ≈ 0.30 (EF2) and 0.67 (E/F3).
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Figure 11. The switching loss in the class E and enhanced class E inverters.
Figure 11. The switching loss in the class E and enhanced class E inverters.
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Figure 12. The THDv of class E and enhanced class E inverters at optimum condition.
Figure 12. The THDv of class E and enhanced class E inverters at optimum condition.
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Table 1. Inverter nomenclature.
Table 1. Inverter nomenclature.
Inverter ConfigurationShort-Form
Class EF2 with series LC in parallel to the load networkEF2 (sLCpLN)
Class EF2 with parallel LC in series to the load networkEF2 (pLCsLN)
Class E/F3 with series LC in parallel to the load networkE/F3 (sLCpLN)
Class E/F3 with parallel LC in series to the load networkE/F3 (pLCsLN)
Class E Flat TopEFT
Table 2. Converter specifications at the optimum operating point.
Table 2. Converter specifications at the optimum operating point.
Parameter DescriptionSymbolValue
Input voltageVin50 V
Output voltageVout5 V
Rated output powerPout25 W
Nominal optimum switching frequencyfs220 kHz
Primary resonant frequencyfr190 kHz
Loaded quality factorQL≈7
Table 3. The design methodology of the class E, EFn, and E/Fn inverters [3,11,26,27,28].
Table 3. The design methodology of the class E, EFn, and E/Fn inverters [3,11,26,27,28].
Class EFnand E/FnClass E and EFT
Step 1Choose Vin, RL, and PoutChoose Vin and Pout
Step 2Choose Q, n, and kCalculate RL,opt
Step 3Calculate DChoose n and D
Step 4Select fsCalculate phase shift, φ
Step 5Calculate CinFind input capacitance, Cin
Step 6Calculate L1 and C1Compute Lf
Step 7Calculate LxChoose fr1 and Q
Step 8Calculate CsChoose fs > fr1
Step 9Calculate L (Ls + Lx)Calculate Ls, Cs
Step 10Calculate RDCCex selected for desired VS1,peak and IS1,peak
Step 11Compute LfL is selected to maintain a switch flat top voltage
Table 4. List of components and measurement devices used in the prototype inverter testing.
Table 4. List of components and measurement devices used in the prototype inverter testing.
DescriptionModelRating/Nominal Values
Mosfet IRFP460LCPBF 500 V (Vds,br), 20 A (Ids,max), 0.27 Ω (Rds(ON))
Mosfet driver TC4432CPA 30 V (Vmax), 1.5 A (max. drive current)
Differential probe - 1/20: 0–60 V1/200: 0–600 V
Current probe - 100 mV/A,10 mV/A
Lf - 40 µH
Cin - 2.60 nF
Ls - 330 µH
Cs - 2.40 nF
L1 - 10 µH (kEF2 ≈ 0.30, kE/F3 ≈ 0.67)
45 µH (kEF2 ≈ 1.30, kE/F3 ≈ 3.02)
C1 - 13 nF (kEF2 ≈ 0.30), 6 nF (kE/F3 ≈ 0.67), 3 nF (kEF2 ≈ 1.30), 1 nF (kE/F3 ≈ 3.02)
RL -
L - 6 µH
Cex - 2.5 nF
Table 5. Cost Comparison Chart.
Table 5. Cost Comparison Chart.
Class EClass EFn (n = 2)Class E/Fn (n = 3)
ComponentsUnitPriceComponentsUnitPriceComponentsUnitPrice
Input inductor01xInput inductor01xInput inductor01x
Input capacitor01yInput capacitor01yInput capacitor01y
Resonant inductor01xResonant inductor022xResonant inductor022x
Resonant capacitor01yResonant capacitor022yResonant capacitor022y
Switch01zSwitch01zSwitch01z
Total cost2x + 2y + zTotal cost3x + 3y + zTotal cost3x + 3y + z
x = unit price of the input inductor for class E, y = unit price of the input capacitor for class E, z = unit price of the switch.
Table 6. Summary.
Table 6. Summary.
Efficiency (η)
1Class EFn and E/Fn inverters operate more efficiently at optimum load at:
  • low Q (low Ls)
  • low k
  • D = 0.2 − 0.6
2Efficiency wise, class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters outperform class E and others with maximum efficiency recorded as 86 and 94%, respectively, at the optimum operating point.
The power output capability (cp)
1The power output capability (high output power at lower switch stress) of class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters is on par with class E at the optimum load:
  • For D = 0.4 − 0.7
  • For k < 5
2Highest power output capability at the optimum operating point is recorded for class EF3 (pLCsLN) as ≈0.10.
The output voltage and power (Vout and Pout)
1The average output power of class E is higher than the class EFn and E/Fn inverters across the switching frequency (fs), duty cycle ratio (D), capacitance ratio (k), and the load resistance (RL).
2The output voltage and output power of class EF2 (sLCpLN) are not severely affected by k.
The peak switch voltage (VS1,peak)
1The peak switch voltage for class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters are 20–30% lower than class E, particularly:
  • at D = 0.2 − 0.7 for any load condition
  • for any k at the optimum load
2The peak switch voltage of class EF2 (sLCpLN) and E/F3 (sLCpLN) are 40–50% higher than the other inverters at the optimum operating point. However, they are considerably higher, particularly:
  • at ω/ωs << 1
  • at k < 0.50
3Comparatively, the peak switch voltage is not affected considerably by the load change.
The peak switch current (IS1,peak)
1The peak switch current for class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters is lower than class E for any D and load condition.
2The peak switch current of class EF2 (sLCpLN) is comparatively higher than class E and other variations of EFn and E/Fn at the optimum load and:
  • for D > 0.65 and k < 1
The peak resonant capacitor voltage (Vcs,peak)
1The peak resonant capacitor voltage is approximately 50% lower in class EFn and E/Fninverters than that in class E for any D, k and load condition
The peak capacitor voltage (VC1,peak) in the lumped network
1The peak capacitor voltage in the auxiliary network is 2 to 5 times lower in class EF2 (pLCsLN) and E/F3 (pLCsLN) inverters than in class EF2 (sLCpLN).
2The peak auxiliary resonant capacitor voltage of class EF2 (sLCpLN) is, particularly, very high:
  • at k >> 5
  • at D ≥ 0.65
The peak current (IL1,peak) in the lumped network
1The peak auxiliary resonant current in class EFn and E/Fn inverters is on average 2–3 times higher for k < 1.
2This current is particularly higher for class EF2 (sLCpLN) inverter
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Ashique, R.H.; Maruf, M.H.; Sourov, K.M.S.H.; Islam, M.M.; Islam, A.; Rabbani, M.; Islam, M.R.; Khan, M.M.; Shihavuddin, A. A Comparative Performance Analysis of Zero Voltage Switching Class E and Selected Enhanced Class E Inverters. Electronics 2021, 10, 2226. https://doi.org/10.3390/electronics10182226

AMA Style

Ashique RH, Maruf MH, Sourov KMSH, Islam MM, Islam A, Rabbani M, Islam MR, Khan MM, Shihavuddin A. A Comparative Performance Analysis of Zero Voltage Switching Class E and Selected Enhanced Class E Inverters. Electronics. 2021; 10(18):2226. https://doi.org/10.3390/electronics10182226

Chicago/Turabian Style

Ashique, Ratil H., Md Hasan Maruf, Kazi Md Shahnawaz Habib Sourov, Md Mahadul Islam, Aminul Islam, Mamun Rabbani, Md Rasidul Islam, Mohammad Monirujjaman Khan, and ASM Shihavuddin. 2021. "A Comparative Performance Analysis of Zero Voltage Switching Class E and Selected Enhanced Class E Inverters" Electronics 10, no. 18: 2226. https://doi.org/10.3390/electronics10182226

APA Style

Ashique, R. H., Maruf, M. H., Sourov, K. M. S. H., Islam, M. M., Islam, A., Rabbani, M., Islam, M. R., Khan, M. M., & Shihavuddin, A. (2021). A Comparative Performance Analysis of Zero Voltage Switching Class E and Selected Enhanced Class E Inverters. Electronics, 10(18), 2226. https://doi.org/10.3390/electronics10182226

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