1. Introduction
An inductive transducer, known as the linear variable differential transformer (LVDT), is an important transducer used in a position measurement system. The LVDT provides excellent behavior in terms of high resolution, robustness, and durability [
1,
2,
3]. Many applications of the LVDT are found in the fields of industrial process control [
3,
4,
5,
6], building construction [
7], automobiles [
8,
9], military equipment [
10,
11,
12], scientific and medical equipment [
12,
13], and robotics [
14,
15]. All applications of the LVDT are used to measure position, force, flow, displacement, and pressure. The LVDT structure is similar to a transformer which comprises one primary winding and two secondary windings with a moveable core. Two secondary windings of the LVDT are connected in series in opposite directions. Therefore, the resulting signal from the secondary windings is the difference signal which calls the LVDT signal. The excitation signal is applied to the primary winding and then the secondary signal or the LVDT signal is in the form of balance modulation or amplitude modulation with a suppressed carrier (AMSC) [
1,
2,
15]. The amplitude of the LVDT signal is dependent on the core position. Therefore, a synchronous demodulator is required to extract the core position signal from the LVDT signal. There are several synchronous demodulators to obtain the core position signal. Traditionally, the simple synchronous demodulators are provided by an analog multiplier and low-pass filter, or analog switch and integrator have been proposed to extract the core position signal from the LVDT signals [
1,
3,
15,
16,
17]. The disadvantage of the simple demodulator is that the large response time and phase shift of the low-pass filter or integrator degrade the accuracy of the demodulated signal. An alternative demodulation technique using a peak-amplitude finder was proposed to overcome the disadvantage mentioned above [
18,
19,
20]. This technique exhibits a simple configuration, fast response, and high accuracy. However, the core position signal obtained from the demodulator is narrow due to the structure of the LVDT [
2,
21,
22,
23]. The large measuring range of the LVDT requires a huge structure for the LVDT, which causes an inconvenience for the applications of compact scale of the measurement system. If the linear measuring range of the LVDT can be extended without disturbing the LVDT structure, then the advantage will be gained.
The measuring range of the LVDT offers a narrow linear range due to its nonlinear transfer characteristic. The transfer characteristic of the LVDT can be expressed in the form of the odd function of the cubic polynomial, which corresponds to the first-order and the third-order terms of the series of an inverse hyperbolic sine function [
2,
22,
23,
24]. Therefore, the transfer characteristic of the LVDT can be approximated to the inverse hyperbolic sine function for its full-stroke range. It can be seen that the linear measuring range of the LVDT is linear only in the range around the zero-crossing of its transfer characteristic curve. The linear measuring range of the LVDT can provide a wide measuring range to meet such a requirement by increasing the structure size of the LVDT, which results in the bulky structure of the LVDT [
21]. The large structure of the LVDT is limited only to the applications of the LVDT due to the large configuration of the measurement system. The small structure of the LVDT with a wide measuring range requires the most attention for the small or compact scale of the position measurement system. However, the requirement of the small structure of the LVDT is in contrast to the wide measuring range. The extension of the linear measuring range of the LVDT requires the most attention for reducing the configuration of the measurement systems and increasing its cost-effectiveness. Recently, a technique based on the fractional-order LVDT for extension of the linear measuring range was proposed in the literature [
25]. However, the LVDT used in this technique requires a special design, which is inappropriate for a commercial LVDT. There are many techniques to extend the linear measuring range without disturbing the LVDT structure [
22,
23,
26,
27,
28]. The approaches for the extension of the linear measuring range using an artificial neural network are introduced [
26,
27]. These techniques use an adaptive inverse model to compensate for the nonlinear transfer characteristic of the LVDT. The disadvantage of these techniques is that a high-speed processor is required to determine the adaptive inverse model. This causes a large circuit configuration, large response time, and increased expense. An alternative approach for the extension of the LVDT linear range using a binomial series of the LVDT inverse transfer characteristic is proposed in the literature [
22,
23]. The advantage of this technique is that a wide linear range and high accuracy are obtained. However, this technique requires precision analog multipliers to synthesize the inverse transfer characteristic of the LVDT, which requires high production cost. Additionally, the technique based on the hyperbolic tangent function to enhance the LVDT linear range is presented [
28]. This technique requires two well-matched diodes and the operational amplifiers (opamp) to accurately generate the hyperbolic tangent function. Unfortunately, it is impractical to specify two well-matched diodes in both discrete and integrated forms. In addition, an overview of the literature review for the linear range extension of the LVDT is shown in
Table 1.
The purpose of this paper is to propose a simple circuit for the linear range extension of the LVDT using a commercially available device. The linear range of the LVDT is extended using the inverse function of the LVDT transfer characteristic. The hyperbolic sine (sinh) function is used to compensate for the nonlinear transfer characteristic of the LVDT. The proposed technique utilizes the behavior of a current feedback operational amplifier (CFOA) with the class AB input stage to generate the sinh function. The linear range of the LVDT can be extended to its maximum stroke range, limited by LVDT’s physical dimension. The performance of the proposed technique was analyzed and discussed in detail. Experimental results exhibiting the performance of the proposed technique are included. The maximum full-scale error is about 0.295% for the core varied to the maximum stroke of the LVDT used in this paper. The proposed technique obtains the goal of a simple circuit configuration, high accuracy, and low cost.
2. Principle of LVDT
The structure of the LVDT comprised a primary winding and two identical secondary windings curving around a hollow rod with a radius
rl is shown in
Figure 1a. From
Figure 1a, the primary winding is placed in the middle of two secondary windings connected in opposite directions. The simplified diagram of the LVDT is shown in
Figure 1b. The lengths of the primary winding and two identical secondary windings are given by
Pl and
Sl, respectively.
Np and
Ns are the numbers of turns for primary winding and secondary winding, respectively. The moving core of the LVDT is provided from a ferromagnetic with a radius and length set as
rc and
Lc, respectively. The gaps isolated between both sides of the primary winding and two secondary windings are assigned as
d. When the excitation signal
vex =
VPsin(
ωext), it is applied to the primary winding. The secondary winding signals
vS1 and
vS2 are generated, which depend on the position of the moving core and can be stated as [
2,
22,
23] follows:
and
where
ZP is an impedance of the primary winding,
l1 and
l2 denote the distances for the moving core penetrated the secondary windings
S1 and
S2, respectively. Thus, the LVDT signal
vs is equal to the difference of the secondary winding voltages, (
vS1 –
vS2), and can be expressed as follows:
for
and
where
l0 = (
l1 +
l2)/2 is the position of the moving core at the center and
l = (
l1 −
l2)/2 is the distance or the position of the moving core moved from the center. Normally, the gaps
d are very small compared to the length
Pl or
Pl >>
d. Assigning the length of the moving core
Lc = (3
Pl + 2
d), the LVDT signal
vs can be expressed as follows:
where
kse and
knl are the sensitivity and the nonlinear coefficient of the LVDT, respectively. The peak amplitude of the LVDT signal
vs of Equation (4) is dependent on the position
l of the moving core in the form of AMSC. The peak amplitude of the LVDT signal
vs is extracted to obtain the position signal
vp by the synchronous demodulator as shown on the right of
Figure 1b. The transfer characteristic of the LVDT is shown in
Figure 1c for the LVDT core varied in full range. From Equation (4), the term of
knl limits the linear measuring range of the LVDT. The linear measuring range
llin can be expressed as follows:
where
εli denotes the linearity error of the LVDT. Practically, the percentage error
εli is about 0.5% for the LVDT used in this paper. The linear measuring range
llin of about 2.54 mm is determined from Equation (5) for
knl = 7.75 × 10
−4. From
Figure 1c, the stroke range ±
lp of the LVDT for the peak-to-peak amplitude in the transfer characteristic can be given as follows:
In addition, the stroke range ±
ld of the LVDT due to its physical dimensions can be determined from the lengths
La and
Lc of the structure in
Figure 1a as follows:
It should be noted that the maximum stroke range
lmax of the LVDT is limited by the minimum number between the stroke ranges
lp and
ld and can be written as follows:
From Equation (7), the lengths
La and
Lc for the physical dimensions of the LVDT used in this paper are equal to 44.1 mm and 31.8 mm, respectively. Therefore, the maximum stroke range ±
lmax for the LVDT used in this paper is equal to ±
ld = ±6.2 mm. From Equation (5), if the term of
knl is decreased, then the linear measuring range of the LVDT is achieved for a wide range. Unfortunately, the small value of
knl can be obtained by increasing the length and the number of turns for the primary winding, which causes the large dimensions of the LVDT structure. The LVDT signal
vs in Equations (3) and (4) is the odd function form of the cubic polynomial, which corresponds to the series of the inverse hyperbolic sine (sinh
−1) function for the first- and third-order terms. The series of the sinh
−1 function is given by [
24] as follows:
where
From Equation (9), the magnitudes of the terms
anx(2n+1) for
n ≥ 2 are very small and can be ignored. Thus, the position signal
vp demodulated from the LVDT signal
vs in Equation (4) can be approximated as follows:
where
λ is the scaling factor to maintain the condition of −1 <
λl < 1 for the core of the LVDT varied in the maximum stroke range. The scaling factor
λ can be determined from the maximum error of the LVDT in its linear measuring range and the magnitude of the sinh
−1 function in Equation (10) at the maximum error
εmax of the LVDT signal in Equation (4). Therefore, the scaling factor
λ can be given approximately as follows:
From Equation (4), the transfer characteristic of the LVDT is nonlinear with respect to the moving core
l. The linear range of the LVDT transfer characteristic is achieved for the core position closed to
l0, which corresponds to the condition of
knl2 << 1. If the core position
l is varied in the linear range of ±
llin in Equation (5). Then, the signal
vp of Equation (10) can be given as follows:
It should be noted that Equation (12) is satisfied only for the core position
l varied in the range of the dashed line A and B in
Figure 1c. Unfortunately, the linear range of the LVDT is very narrow compared to its physical dimensions. The linear measurement of the LVDT for a wide measuring range causes a large structure, which limits the application of the LVDT for the small- or compact- measurement systems. To extend the linear measuring range, the sinh
−1 function of the LVDT behavior is linearized using the sinh function circuit as shown in the block diagram of
Figure 1d.
3. Synthesis of Sinh Function
The synthesis of the sinh function utilizes the inherent behavior of the bipolar transistor-based class AB configuration. The class AB configuration can be provided from a commercially available CFOA, as shown in
Figure 2a [
29]. The basic principle of the bipolar class AB configuration is shown in the dash-line frame of
Figure 2a. The currents
IB1 =
IB2 =
IB are the bias current for the transistors
Q1 to
Q4. From
Figure 2a, the currents
I1 and
I2 can be expressed as in [
30], as follows:
From Equations (13) and (14), the relationship between the voltage signal
vx and the current
ix can be given as follows:
where
VT =
kT/
q is a thermal voltage,
k = 1.38 × 10
−23 J/K is a Boltzmann’s constant,
q = 1.602 × 10
−19 C is an electron charge, and
T = (273+ °C) in Kelvin is an absolute temperature [
31]. From the expression of the sinh
−1 function, Equation (15) can be written in the form of the sinh
−1 function as [
24], as follows:
It should be noted that the voltage signal
vx is dependent on temperature due to the thermal voltage
VT. This temperature effect can be compensated by the simple circuit technique discussed in the next explanation. From Equation (15), the relationship of the voltage
vx and the current signal
ix can be rewritten as follows:
From
Figure 2a, the current
ix can be obtained by the subtraction of the currents
I1 and
I2 of Equations (13) and (14), respectively. The current mirrors
CM1 and
CM2 formed by the transistors
Q5–
Q7 and
Q8–
Q10, respectively, transfer the currents
I1 and
I2 to the output port z and the current
iz can be stated as follows:
The output current
iz can be simply converted to the voltage signal
vz by the resistance
Ro. From Equation (16), the sinh
−1 function can be approximated to a linear function for the condition of
ix << 2
IB. Thus, Equation (16) can be given as follows:
where
rx denotes a small-signal resistance at port x of the CFOA. The schematic diagram of the CFOA in
Figure 2a can be represented by the equivalent diagram as shown in
Figure 2b. The circuit diagram for synthesizing the sinh function is shown in
Figure 2c. An operational transconductance amplifier (OTA),
A3, acting as an active resistor, is provided to compensate for the thermal voltage
VT. The output current
iT of the OTA
A3 can be given as follows:
where
IC denotes the bias current of the OTA
A3. From the circuit in
Figure 2c, the input current
ii is equal to the current
iT with the opposite direction, or
ii = −
iT. Therefore, the voltage signal
vc across the input of the OTA
A3 is equal to (2
VT/IC)
ii, which is provided for the input signal of the sinh function formed by the CFOA
A1. From Equations (17) and (20), the relationship between the output voltage signal
vo and the input current signal
ii can be stated as follows:
It should be noted that the temperature effect due to the thermal voltage
VT is compensated for. The input signal of the circuit in
Figure 2c is in the form of a current signal. Thus, the voltage to current converter is required to convert the position signal
vp into the current form.
Figure 2d shows the simulation result of the circuit in
Figure 2c, where
IB = 211.88 μA,
IC = 500 μA, and
Ro = 3.46 kΩ.
4. Proposed Circuit for LVDT Linear Range Extension
The proposed circuit for the extension of the LVDT linear measuring range is shown in
Figure 3a. The operation of the circuit can be explained as follows. The demodulated signal
vp is transferred to the voltage signal
vx2 at port x of the CFOA
A2, which can be stated as follows:
where
gmc2 = 2
IB/
VT denotes the transconductance at port x of the CFOA
A2 and
rx2 = 1/
gmc2 =
VT/2
IB. The bias current
IB is about 211.88 μA for the CFOAs used in this paper. The thermal voltage
VT at 25 °C is about 25.69 mV and the resistance
rx2 is about 60.62 Ω is calculated from Equation (19). If the resistance
gmc2Rx2 >> 1 is assigned, then the voltage signal
vx2 can be approximately equal to the position signal
vp. From
Figure 3a, the current
ix2 flowing through the resistance
Rx2 is equal to
vp/
Rx2 and transferred to the current
iz2 at port z of the CFOA
A2,
iz2 =
ix2. The current
iz2 is provided for the input current of the OTA
A3 to generate the voltage signal
vz2. Thus, the voltage signal
vz2 can be expressed as follows:
The voltage signal
vz2 is applied to port y of the CFOA
A1. From Equations (10), (21), and (23), the voltage signal
vo can be given as follows:
To linearize the LVDT behavior in Equation (10), the position of the LVDT core at
l =
llin is used as the reference position. The magnitude of the sinh function in Equation (24) is assigned to equal the demodulated signal
vp in Equation (12) with the core position
l =
llin, as follows:
From Equation (25), the terms of 2
kse/(λ
ICRx2) = 1 should be fulfilled, and
ko =
kse is set for the sensitivity of the proposed circuit as the same as the LVDT. Therefore, the voltage signal
vo in Equation (24) is equal to
ksel for the core position
l varied in the maximum range ±
lmax. The relationship of the resistance
Rx2 and the bias current
IC of the OTA
A3 can be stated as follows:
The coefficient
ko in Equation (24) can be set to meet the required sensitivity by tuning the resistance
Ro. The resistance
Ro
can be determined from the required sensitivity
kreq
as follows:
If the sensitivity kreq of the proposed circuit is assigned as 0.1 V/mm/V, then the resistance Ro = 3.46 kΩ is calculated from Equation (27) for IB = 211.88 μA.
The LVDT used for this paper provides sensitivity
kse of 94.5 mV/mm/V a the nonlinear coefficient
knl of 7.75 × 10
−4. The input signal
vp of
Figure 3a is linearly varied in the range ±0.5684 V, which corresponds to the LVDT core linearly varied in the range ±6.2 mm. This input signal is used for the simulation to investigate the transfer characteristic of the proposed circuit via PSPICE analog simulation program. The simulation result for the transfer characteristic of the proposed circuit in
Figure 3a is shown in
Figure 3b, where λ = 0.068,
Rx2 = 5.542 kΩ,
Ro = 3.46 kΩ,
IB = 211.88μA, and
IC = 500 μA. The output signal error
εo is obtained by subtracting the expected value, the linear line in
Figure 3b, from the output signal
vo.
Figure 3c shows the absolute error
εo from the expected value of the output signal
vo. The maximum error
εo is about 0.12 mV, corresponding to 0.12μm at the input signal
vp = ±0.5684 V, corresponding to the core position
l = ±
lmax = ±6.2 mm. It is confirmed that the proposed circuit can accurately extend the linear range of the LVDT, in agreement with the theoretical expectation.
5. Performance Analysis
The performance of the proposed circuit can be disturbed by the nonideal characteristic of the devices used in the scheme. There are three major factors that cause the deviation of the ideal performance. Firstly, the finite resistance
rx2 of the CFOA
A2 in
Figure 3a causes the transfer error
εx in the current signal
iz2. From Equation (22), the current signal
iz2 =
ix2 =
vx2/
Rx2 is obtained for the condition of
Rx2 >>
rx2. However, the relationship between the current signal
iz2 and the voltage signal
vp can be written as follows:
and
If the resistances
Rx2 and
rx2 are set as 5.542 kΩ and 60.62 Ω, respectively, then a transfer error
εx of about 1.08% is predicted. Secondly, the variation of the ambient temperature causes the derivation in the current
iz2 due to the thermal voltage
VT. The percentage error
εz of the current
iz2 can be stated as follows:
If the ambient temperature deviates 10 °C from room temperature at 25 °C, then the percentage error
εz can be predicted as 0.019% for Δ
T = 10 °C,
T = 308 K. It can be seen that the variation of the ambient temperature is insignificant regarding disturbing the proposed circuit performance. Thirdly, the approximation of the LVDT transfer characteristic to the sinh
−1 function exhibits the residual error
εr, which can be expressed in the expansion series as in [
24], as follows:
From Equation (31), the second term in the curly bracket is very small due to the value of (
λllin)
2n << 1 and can be ignored. Then, Equation (30) can be approximately given as follows:
From Equation (32), the residual error εr is about 0.027% for the LVDT used in this paper, which is very small and can be ignored.
It should be noted that the major parameter affecting the accuracy of the proposed circuit is the transfer error εx caused by the intrinsic resistance rx2 of the CFOA A2. This error can be minimized by replacing the resistance Rx2 with the recalculated resistance Rx2new = (Rx2 − rx2) or Rx2new = 5.481 kΩ, where Rx2 = 5.542 kΩ and rx2 = 60.62 Ω. The variable resistor is provided for the recalculated resistance Rx2new and fine-tuned to meet the resistance of 5.481 kΩ.
6. Experimental and Simulation Results
The proposed circuit in
Figure 3a was rearranged as shown in
Figure 4a, where the resistors
Rx2 and
Ro are replaced with the variable resistors for convenient adjustment of the circuit parameters. The resistor
RB is provided for the bias current
IC of the OTA. The circuit in
Figure 4a was constructed using commercial devices to investigate the performance of the proposed circuit. The active devices were AD844 for the CFOAs
A1 and
A2, and CA3280 for the OTA
A3. The prototype board of the circuit in
Figure 4a is shown in
Figure 4b. The small-signal resistance
rx of the CFOA was measured and calculated from Equation (19) using the equivalent circuit of AD844 as 60.62 Ω [
29]. Therefore, the CFOA bias current
IB was calculated from Equation (19) as 211.88 μA for the thermal voltage
VT = 25.68 mV at 25 °C. The power supply voltage
VCC = −
VSS and the bias current
IC of the OTA
A3 were set as 12 V and 500 μA, respectively. The bias current
IC can be achieved by the resistance
RB, which is calculated from the equivalent circuit of the OTA CA3280 in [
32] as follows:
The resistance
RB = 21.6 kΩ for the bias current
IC of 500 μA is calculated from Equation (33). The power consumption of the prototype board can be calculated from the supply current and voltage of the active devices. The supply current of the CFOA and the OTA can be calculated from their equivalent circuits as 0.85 mA and 1.25 mA, respectively [
29,
32]. The power consumption of the CFOA and OTA of about 20.3 mW and 30 mW, respectively, for the power supply voltage
VCC = −
VSS = 12 V. Therefore, the power consumption of the prototype circuit is about 70.6 mW. The LVDT used in this experiment was the commercially available LVDT with the linear range
llin of ±2.54 mm, the full-scale error
εli of 0.5%, and the sensitivity
kse = 94.5 mV/mm/V. The coefficient
knl = 7.75 × 10
−4 was calculated from Equation (5). The scaling factor
λ = 0.068 was calculated from Equation (11). The load resistance
RL of the LVDT was assigned as 100 kΩ. From
Figure 1a, the physical dimensions of the LVDT being used were measured as
La = 44.1 mm and
Lc = 31.7 mm. Therefore, the maximum stroke range
lmax of this LVDT is determined from Equation (7) as ±6.2 mm. The excitation signal
vex was a 2.5 kHz sinusoidal signal with 2 V peak-to-peak amplitude. The LVDT signal
vs was demodulated as the signal
vp using the peak-amplitude finder proposed in the literature [
14]. The resistance
Rx2 is calculated from Equation (25) as 5.542 kΩ. The resistance
Rx2 is recalculated to reduce the effect of the resistance
rx2, therefore, the resistance
Rx2new = (
Rx2 −
rx2) = 5.481 kΩ is achieved to replace the resistance
Rx2 in the proposed circuit. The sensitivity
kreq of the proposed circuit for this experiment is assigned as 0.1 V/mm/V. Therefore, the resistance
Ro is calculated as 3.46 kΩ using Equation (27). The variable resistors were provided for the resistances
Rx2 =
Rx2new,
Ro, and
RB to obtain 5.481 kΩ, 3.46 kΩ, and 21.6 kΩ respectively. The experimental setup and the LVDT used in this experiment are shown in
Figure 4c,d, respectively.
The full-scale error
εfs for this experiment is defined from the maximum of the absolute error and the full stroke range as follows:
The input signal
vp of the proposed circuit in
Figure 4a is linearly varied from −568.45 mV to 568.45 mV corresponding to the maximum stroke range of −6.2 mm to 6.2 mm with
kse = 94.5 mV/mm/V for the LVDT being used. This input signal
vp is applied to the prototype board to investigate the sinh function synthesized by the proposed circuit.
Figure 5 shows the measured result of the transfer characteristic of the proposed circuit. It is evident that the proposed circuit can accurately synthesize the sinh function as expected.
There are two types of the input signal to demonstrate the performance of the proposed circuit, the LVDT synthesized signal and the LVDT demodulated signal. For the LVDT synthesized signal, the LVDT transfer characteristic in Equation (4) is synthesized using the LabVIEW computer program for measurement and control interfaced with analog input/output (NAIO) board from National Instruments (NI-USB-6361). The parameters
kse and
knl are set to the same as the practical LVDT used in this paper.
Figure 6a shows the output signal synthesized by the LabVIEW and the NAIO board.
Figure 6b shows the absolute error
εl of the synthesized signal compared to the practical LVDT signal for the moving core varied from −
lmax to
lmax or −6.2 mm to 6.2 mm. From
Figure 6b, the error at the core positions of ±2.54 mm and ±6.2 mm of the synthesized signal are about 12.6 μm and 184.8 μm or 1.26 mV and 18.48 mV, which correspond to 0.5% and 2.97%, respectively. For the practical LVDT signal, the LVDT was excited by the excitation signal
vex. Figure 6c,d shows the measured characteristic of the LVDT being used and the absolute error
εL from the expected value of
kse ×
l, respectively. The errors of the LVDT signal at the linear range of
l = ±2.54 mm and the maximum range of
l = ±6.2 mm are about 0.5% and 2.98%, respectively. It can be seen that the synthesized signal in
Figure 6a is closed to the LVDT transfer characteristic measured in
Figure 6c. The synthesized signal in
Figure 6a is provided to represent the LVDT demodulated signal
vp of the proposed circuit board. The core of the LVDT can be moved over the linear range of
l = ±
llin to the maximum position of
l =±
lmax. However, the error of the LVDT demodulated signal
vp is, practically, increased from 0.5% to 2.98%. This error is too high for precision measurement systems. The wide stroke range of the LVDT requires a large size for the LVDT structure, which is unsuitable for the small or compact configuration of the measurement systems. The linear range extension of the LVDT used in this paper is expected to the maximum stroke range
lmax as ±6.2 mm, which corresponds to the output voltage
vo of ±0.62 V for the sensitivity
kreq = 0.1 V/mm/V. The synthesized signal from the NAIO board is applied as the input signal
vp for the prototype board to demonstrate the circuit performance. The LVDT synthesized signal varied from −568.45 mV to 568.45 mV and is represented as the LVDT core continuously moving from −6.2 mm to 6.2 mm.
Figure 7a shows the measured results of the output signal
vo of the prototype board for the demodulated signal
vp varied from −568.45 mV to 568.45 mV and corresponding to the LVDT core varied from −6.2 mm to 6.2 mm. The absolute error
εnab for the LVDT core varied in the range ±6.2 mm is exhibited in
Figure 7b. In
Figure 7b, the maximum error of about 1.6 mV at 568.45 mV or
lmax = 6.2 mm corresponds to the position error of 16 μm. Therefore, the full-scale error
εfs is obtained as 0.258% at the maximum stroke range. The LVDT is excited by the excitation signal
vex and the LVDT demodulated signal
vdm from the peak-amplitude finder on the left of the prototype board is applied to the input signal
vp on the right of the prototype board in
Figure 4b. The input signal
vp from the LVDT demodulated signal
vdm corresponds to the LVDT core varied from −6.2 mm to 6.2 mm with 50 μm increments.
Figure 7c,d shows the measured results for the LVDT core varied in the maximum range ±
lmax and the absolute error
εpab, respectively. It can be seen that the maximum absolute error at the core position of 6.2 mm is about 1.83 mV or 18.3 μm corresponding to the full-scale error
εfs of 0.295%. This error can be further minimized by fine-tuning the resistance
Rx2 to compensate for the intrinsic resistance of the CFOA
A2 in the implementation procedure. Finally, the proposed technique can extend the linear measuring range of the LVDT from its narrow specific range to the maximum range of its physical dimensions.
The previous works proposed in the literature [
22,
23,
26,
27,
28] are referenced for comparison with the implemented proposed technique in terms of percentage error, type of signal processing, complexity of implementation, production cost, and power consumption. It should be noted that the percentage errors of the previous works [
26,
27] are achieved only from simulation results and their power consumption is dependent on the computer system and interface board being used.
Table 2 shows the comparisons between the proposed technique and those of the previous works. From
Table 2, the percentage error of the proposed technique exhibits higher than that of the previous works [
22,
23]. This is a minor consideration compared to the remaining condition. This error can be further minimized, as mentioned in this section. The proposed circuit demonstrates its advantages in convenient implementation, low cost, low power consumption, and small error. It is evident that the proposed technique provides good performance at an attractive cost.