A Wide Dynamic Range Sigma-Delta Modulator for EEG Acquisition Using Randomized DWA and Dynamic-Modulated Scaling-Down Techniques
Abstract
:1. Introduction
2. System Design
2.1. Overview of System Architecture
2.2. Analysis of Circuit Non-Ideality
3. Circuit Analysis and Implementation
3.1. The Proposed Dynamic-Modulated Scaling-Down (DM-SD) Module
3.2. Low Parasitic Capacitor Integrator
3.3. The Randomized Data Weighted Averaging (RnDWA)
3.4. Theoretical Analysis and Implementation of the Voltage Domain Module Technology
4. Results
5. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Acknowledgments
Conflicts of Interest
Abbreviations
ADC | Analog to Digital Converter |
AFE | Analog Front End |
BCI | Brain Computer Interface |
CT | Continue Time |
CMFB | Common Mode Feedback |
CMOS | Complementary Metal-Oxide-Semiconductor Transistor |
DAC | Digital to Analog Converter |
DEM | Dynamic Element Match |
RnDWA | Randomized Data Weighted Averaging |
DM-SD | Dynamic-Modulated Scaling-Down |
DR | Dynamic Range |
DT | Discrete Time |
EEG | electroencephalogram |
ENOB | Effective Number of Bits |
FFMC | Feed-Forward Miller Compensation |
OSR | Over-Sampling Ratio |
OTA | Operational Transconductance Amplifier |
PVT | Power, Voltage, and Temperature |
SNR | Signal-to-Noise Ratio |
SNDR | Signal-to-Noise plus Distortion Ratio |
SAR | Successive Approximation Register |
STF | Signal Transfer Function |
SR | Slew Rate |
THD | Total Harmonic Distortion |
UGB | Unity Gain bandwidth |
VDT | Voltage Domain Technology |
References
- Gu, X.; Cao, Z.; Jolfaei, A.; Xu, P.; Wu, D.; Jung, T.P.; Lin, C.T. EEG-based brain-computer interfaces (BCIs): A survey of recent studies on signal sensing technologies and computational intelligence approaches and their applications. IEEE/ACM Trans. Comput. Biol. Bioinform. 2021, 18, 1645–1666. [Google Scholar] [CrossRef] [PubMed]
- Zeng, H.; Yang, C.; Dai, G.; Qin, F.; Zhang, J.; Kong, W. EEG classification of driver mental states by deep learning. Cogn. Neurodyn. 2018, 12, 597–606. [Google Scholar] [CrossRef]
- McKay, J.H.; Feyissa, A.M.; Sener, U.; D’Souza, C.; Smelick, C.; Spaulding, A.; Yelvington, K.; Tatum, W.O. Time is brain: The use of EEG electrode caps to rapidly diagnose nonconvulsive status epilepticus. J. Clin. Neurophysiol. 2019, 36, 460–466. [Google Scholar] [CrossRef] [PubMed]
- Lin, C.T.; Chuang, C.H.; Huang, C.S.; Tsai, S.F.; Lu, S.W.; Chen, Y.H.; Ko, L.W. Wireless and Wearable EEG System for Evaluating Driver Vigilance. IEEE Trans. Biomed. Circuits Syst. 2014, 8, 165–176. [Google Scholar] [CrossRef] [PubMed]
- Vaid, S.; Singh, P.; Kaur, C. EEG Signal Analysis for BCI Interface: A Review. In Proceedings of the 2015 Fifth International Conference on Advanced Computing Communication Technologies, Rohtak, India, 21–22 February 2015; pp. 143–147. [Google Scholar] [CrossRef]
- Tohidi, M.; Madsen, J.K.; Moradi, F. Low-power high-input-impedance EEG signal acquisition SoC with fully integrated IA and signal-specific ADC for wearable applications. IEEE Trans. Biomed. Circuits Syst. 2019, 13, 1437–1450. [Google Scholar] [CrossRef] [PubMed]
- Huang, J.; Mercier, P.P. A 112-dB SFDR 89-dB SNDR VCO-Based Sensor Front-End Enabled by Background-Calibrated Differential Pulse Code Modulation. IEEE J. Solid-State Circuits 2021, 56, 1046–1057. [Google Scholar] [CrossRef]
- Ibrahim, O.; Hesham, R.; Soltan, A. A 26.24uW 9.26-ENOB Dynamic RAM Based SAR ADC for Biomedical Applications. In Proceedings of the 2020 32nd International Conference on Microelectronics (ICM), Aqaba, Jordan, 14–17 December 2020; pp. 1–4. [Google Scholar] [CrossRef]
- Verma, D.; Rikan, B.S.; Shehzad, K.; Kim, S.J.; Khan, D.; Kommangunta, V.; Shah, S.A.A.; Pu, Y.; Yoo, S.S.; Hwang, K.C.; et al. A Design of 44.1 fJ/Conv-Step 12-Bit 80 ms/s Time Interleaved Hybrid Type SAR ADC With Redundancy Capacitor and On-Chip Time-Skew Calibration. IEEE Access 2021, 9, 133143–133155. [Google Scholar] [CrossRef]
- Yang, X.; Zhao, M.; Dong, Y.; Wu, X. A 14.9μW analog front-end with capacitively-coupled instrumentation amplifier and 14-bit SAR ADC for epilepsy diagnosis system. In Proceedings of the 2016 IEEE Biomedical Circuits and Systems Conference (BioCAS), Shanghai, China, 17–19 October 2016; pp. 268–271. [Google Scholar] [CrossRef]
- Wang, S.H.; Hung, C.C. A 0.3V 10b 3MS/s SAR ADC With Comparator Calibration and Kickback Noise Reduction for Biomedical Applications. IEEE Trans. Biomed. Circuits Syst. 2020, 14, 558–569. [Google Scholar] [CrossRef]
- Shu, Y.S.; Kuo, L.T.; Lo, T.Y. An Oversampling SAR ADC With DAC Mismatch Error Shaping Achieving 105 dB SFDR and 101 dB SNDR Over 1 kHz BW in 55 nm CMOS. IEEE J. Solid-State Circuits 2016, 51, 2928–2940. [Google Scholar] [CrossRef]
- Gerfers, F.; Ortmanns, M.; Manoli, Y. A 1.5-V 12-bit power-efficient continuous-time third-order ΔΣ modulator. IEEE J. Solid-State Circuits 2003, 38, 1343–1352. [Google Scholar] [CrossRef]
- Bang, J.S.; Jeon, H.; Je, M.; Cho, G.H. 6.5µW 92.3DB-DR Biopotential-Recording Front-End with 360MVPP Linear Input Range. In Proceedings of the 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, 18–22 June 2018; pp. 239–240. [Google Scholar] [CrossRef]
- Song, S.; Kim, J.; Roh, J. 100.5 dB SNDR Analog Front-End With a Resistor-Based Discrete-Time Delta-Sigma Modulator for Eliminating Switching Noise and Harmonics. IEEE Access 2021, 9, 39852–39863. [Google Scholar] [CrossRef]
- Ahn, W.; Shim, J.; Cho, J.; Shin, M.; Koo, K.; Kim, J. Analysis of power/ground noise effect on performance degradation of analog-to-digital converter. In Proceedings of the 2009 11th Electronics Packaging Technology Conference, Singapore, 9–11 December 2009; pp. 687–691. [Google Scholar]
- Bae, B.; Shim, Y.; Koo, K.; Cho, J.; Pak, J.S.; Kim, J. Modeling and measurement of power supply noise effects on an analog-to-digital converter based on a chip-PCB hierarchical power distribution network analysis. IEEE Trans. Electromagn. Compat. 2013, 55, 1260–1270. [Google Scholar] [CrossRef]
- Schreier, R.; Silva, J.; Steensgaard, J.; Temes, G.C. Design-oriented estimation of thermal noise in switched-capacitor circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 2005, 52, 2358–2368. [Google Scholar] [CrossRef]
- Huang, L.; Shen, J.; Ma, Q.; Wang, H.; Tsang, W.M.; Tang, F.; Wang, M. A Low-Noise and Monolithic Array Tactile Sensor Based on Incremental Delta-Sigma Analog-to-Digital Converters. Electronics 2022, 11, 1206. [Google Scholar] [CrossRef]
- Del Rio, R.; Medeiro, F.; Pérez-Verdú, B.; Rodríguez-Vázquez, A. Reliable analysis of settling errors in SC integrators: Application to [Sigma][Delta] modulators. Electron. Lett. 2000, 36, 1. [Google Scholar] [CrossRef]
- De la Rosa, J.M.; del Río, R. Circuits and Errors: Systematic Analysis and Practical Design Issues. In CMOS Sigma-Delta Converters; John Wiley & Sons, Ltd.: Hoboken, NJ, USA, 2013. [Google Scholar] [CrossRef]
- Lee, H.S.; Gealow, J.; Yoon, D.Y. Power-efficient amplifier frequency compensation for continuous-time delta-sigma modulators. In Proceedings of the 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS), Columbus, OH, USA, 4–7 August 2013; pp. 562–565. [Google Scholar]
- Chen, K.; Chen, M.; Cheng, L.; Qi, L.; Wang, G.; Lian, Y. A 124 dB dynamic range sigma-delta modulator applied to non-invasive EEG acquisition using chopper-modulated input-scaling-down technique. Sci. China Inf. Sci. 2022, 65, 1–15. [Google Scholar] [CrossRef]
- Kim, Y.G.; Cho, M.H.; Kim, K.D.; Kwon, J.K.; Kim, J. A 105.55 dB, 0.49 mm 2 Audio ΣΔ modulator using chopper stabilization and fully randomized DWA. In Proceedings of the 2008 IEEE Custom Integrated Circuits Conference, San Jose, CA, USA, 21–24 September 2008; pp. 503–506. [Google Scholar]
- Vadipour, M. Techniques for preventing tonal behavior of data weighted averaging algorithm in/spl Sigma/-/spl Delta/modulators. IEEE Trans. Circuits Syst. II Analog Digit. Signal Process. 2000, 47, 1137–1144. [Google Scholar] [CrossRef]
- Brederlow, R.; Prakash, R.; Paulus, C.; Thewes, R. A low-power true random number generator using random telegraph noise of single oxide-traps. In Proceedings of the 2006 IEEE International Solid State Circuits Conference, San Francisco, CA, USA, 6–9 February 2006; pp. 1666–1675. [Google Scholar] [CrossRef]
- Figliolia, T.; Julian, P.; Tognetti, G.; Andreou, A.G. A true Random Number Generator using RTN noise and a sigma delta converter. In Proceedings of the 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal, QC, Canada, 22–25 May 2016; pp. 17–20. [Google Scholar] [CrossRef]
- Petrie, C.; Connelly, J. A noise-based IC random number generator for applications in cryptography. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 2000, 47, 615–621. [Google Scholar] [CrossRef]
- Hua Zhou, S.; Zhang, W.; Wu, N.J. An ultra-low power CMOS random number generator. Solid-State Electron. 2008, 52, 233–238. [Google Scholar] [CrossRef]
- Nuzzo, P.; De Bernardinis, F.; Terreni, P.; Van der Plas, G. Noise analysis of regenerative comparators for reconfigurable ADC architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 2008, 55, 1441–1454. [Google Scholar] [CrossRef]
- Lv, R.; Chen, W.; Yin, L.; Fu, Q.; Liu, X.; Yan, J. A closed-loopΣΔmodulator for micromechanical capacitive sensors. IEICE Electron. Express 2018, 15, 20171112. [Google Scholar] [CrossRef] [Green Version]
- Chen, X.; Wang, Z.G.; Li, F. A 3rd-order 1-bit Σ-Δ modulator with a 2-tap FIR filter embedded. IEICE Electron Express 2019, 16, 20190365. [Google Scholar] [CrossRef] [Green Version]
- Han, J.H.; Cho, K.I.; Kim, H.J.; Boo, J.H.; Kim, J.S.; Ahn, G.C. A 96dB Dynamic Range 2kHz Bandwidth 2nd Order Delta-Sigma Modulator Using Modified Feed-Forward Architecture With Delayed Feedback. IEEE Trans. Circuits Syst. II Express Briefs 2021, 68, 1645–1649. [Google Scholar] [CrossRef]
Non-ideality | Design Specifications | Unit |
---|---|---|
Finite Gain | ≥60 | dB |
KT/C noise | ≥4 | pF |
UGB | ≥2 | MHz |
Slew rate | ≥0.5 | MV/s |
Specification | This work | [31] IEICE Electron. Expr. | [15] IEEE Access | [32] IEICE Electron. Expr. | [23] Sci. China Inf. Sci. | [33] IEEE T CIRCUITS-II |
---|---|---|---|---|---|---|
Year | 2022 | 2018 | 2021 | 2019 | 2022 | 2021 |
Architecture | DT | DT | RB DT | DT | DT | DT |
Tech (m) | 0.18 | 0.35 | 0.18 | 0.04 | 0.18 | 0.11 |
Supply (V) | 5&1.8 | 5 | 1.8 | 0.9 | 5 | 1.5 |
Power (W) | 1600 | 12,600 | 2200 | 790 | 2750 | 62.43 |
BW (Hz) | 1500 | 1200 | 25,000 | 100,000 | 125 | 2000 |
SNDR (dB) | 118.1 | 105.2 | 106.1 | 87.3 | 110 | 93.9 |
DR (dB) | 126 | 113.7 | - | 88.1 | 124 | 96.3 |
(MHz) | 1.024 | - | 12.8 | 25.6 | 1.024 | 60 |
(dB) 1 | 177.8 | 163.4 | 176.5 | 168 | 170.6 | 172 |
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Han, Y.; Liu, W.; Zhang, X.; Wang, X.; Liu, X.; Liu, Y. A Wide Dynamic Range Sigma-Delta Modulator for EEG Acquisition Using Randomized DWA and Dynamic-Modulated Scaling-Down Techniques. Sensors 2023, 23, 201. https://doi.org/10.3390/s23010201
Han Y, Liu W, Zhang X, Wang X, Liu X, Liu Y. A Wide Dynamic Range Sigma-Delta Modulator for EEG Acquisition Using Randomized DWA and Dynamic-Modulated Scaling-Down Techniques. Sensors. 2023; 23(1):201. https://doi.org/10.3390/s23010201
Chicago/Turabian StyleHan, Yongchun, Wenhao Liu, Xiangwei Zhang, Xiaosong Wang, Xin Liu, and Yu Liu. 2023. "A Wide Dynamic Range Sigma-Delta Modulator for EEG Acquisition Using Randomized DWA and Dynamic-Modulated Scaling-Down Techniques" Sensors 23, no. 1: 201. https://doi.org/10.3390/s23010201