A Compact and Efficient Boost Converter in a 28 nm CMOS with 90 mV Self-Startup and Maximum Output Voltage Tracking ZCS for Thermoelectric Energy Harvesting

Abstract

There are increasing demands for the Internet of Things (IoT), wearable electronics, and medical implants. Wearable devices provide various important daily applications by monitoring real-life human activities. They demand low-cost autonomous operation in a miniaturized form factor, which is challenging to realize using a rechargeable battery. One promising energy source is thermoelectric generators (TEGs), considered the only way to generate a small amount of electric power for the autonomous operation of wearable devices. In this work, we propose a compact and efficient converter system for energy harvesting from TEGs. The system consists of an 83.7% efficient boost converter and a 90 mV self-startup, sharing a single inductor. Innovated techniques are applied to adaptive maximum power point tracking (A-MPPT) and indirect zero current switching (I-ZCS) controllers for efficient operation. The startup circuit is realized using a gain-boosted tri-state buffer, which achieves 69.8% improved gain at the input V_IN = 200 mV compared to the conventional approach. To extract the maximum power, we use an A-MPPT controller based on a simple capacitive divider, achieving 95.2% tracking efficiency. To address the challenge of realizing accurate voltage or current sensors, we propose an I-ZCS controller based on a new concept of maximum output voltage tracking (MOVT). The integrated circuit (IC) is fabricated using a 28 nm CMOS in a compact chip area of 0.03 mm². The compact size, which has not been obtained with previous designs, is suitable for wearable device applications. Measured results show successful startup operation at an ultralow input, V_IN = 90 mV. A peak conversion efficiency of 85.9% is achieved for the output of 1.07 mW.

1. Introduction

Recent interest in renewable energy sources is significantly increasing with rising environmental pollution and energy costs. Extensive research has been conducted to explore new methods to conserve power and harvest clean energy. Because of the increasing number of low-power devices such as the Internet of Things (IoT), wearable electronics, and medical implants, energy harvesting from renewable sources is an urgent research topic [1]. Among them, wearable devices provide important daily applications by monitoring various human activities. Diverse examples of wearable devices have been proposed, which include electronic skin, wristbands, watches, smart clothing, virtual reality (VR) headsets, and artificial intelligence (AI) hearing aids [2]. These devices demand low-cost autonomous operation with miniaturized form factors; the demands are challenging to satisfy using a rechargeable batteries. One promising energy source for wearable electronics is thermoelectric generators (TEGs), which convert an omnipresent temperature gradient into electrical energy via the Seebeck effect [3,4]. It is considered that TEGs are the only way to generate a small amount of electric power for the autonomous operation of wearable devices. Because energy conversion can be performed using a solid-state material without moving elements, TEGs are suitable for long-term operation. Under a relatively small temperature gradient, however, TEG generates a low source voltage (V_S), which cannot be used to supply the devices directly. For example, commercially available TEGs generate V_S between 10 mV and 30 mV for a 1 °C temperature difference [5]. Therefore, a DC-DC converter is required to boost the input to a suitable output.

Various techniques have been explored to realize efficient DC-DC converters using maximum power point tracking (MPPT) methods [6,7,8,9]. The authors of [6] configure the switching frequency based on the internal resistor (R_S) of the TEG and the inductor value. However, the frequency of the on-chip clock generator can fluctuate due to process, voltage, and temperature (PVT) variations. This necessitates an adaptive MPPT controller based on a voltage-controlled oscillator (VCO) to tune the switching frequency [7]. The work conducted in [8] utilizes a hill-climbing MPPT controller that senses the output current of the converter, which charges algorithm capacitors to track V_S for handling the input range from 5 μW to 10 mW. The work conducted in [9] uses transformer-based methods for a dual-stage boost converter to increase conversion efficiency to 81.5%.

The switched capacitor (SC)-based approach offers the advantage of on-chip integration and low-voltage operation [10,11,12]. The gate-boosted charge pump operates with an input voltage of 100 mV [10]. Another work [11] utilized a voltage doubler as a negative charge pump to reduce the on-resistance of the load-side switch. Additionally, a fully integrated SC converter used a 220 mV input to generate a 1.9 V output [12]. However, previous works have the drawback of large system sizes; for example, the algorithm capacitor in [8] requires a 7.6 mm² silicon area. Other works have bulky implementations, such as a transformer of 1.8 mm² size [9], a sizeable on-chip capacitor of 2.31 mm² [10], and three inductors [13]. The SC-based converter shows relatively low efficiencies, for example, 33% [10], 52% [11], and 37.4% [12].

Because V_S can be smaller than the threshold voltage (V_TH) of transistors, a self-startup method is required for the initial step-up of the supply voltage. The startup temporarily provides power for the main converter until it can be self-sustained. Various methods have been investigated. These methods include using a mechanical switch to initiate the converter [6], utilizing an off-chip transformer [9], using on-chip inductors [10], and pre-charging the output capacitor using an external battery [14]. However, these techniques often demand bulky implementations, which can be impractical for low-cost sensor nodes and IoT applications. The works [15,16] use the switched branches for inductor sharing between the startup and main converter; however, the switching increases the system complexity.

The discontinuous conduction mode (DCM), commonly used for low-power DC-DC converters, should suppress the reverse current through the inductor. The high-side switch is opened when the inductor current I_IND is close to zero for zero current switching (ZCS). One method to implement ZCS is using a diode [17]; however, this approach is unsuitable for low-voltage design due to diode voltage drop. For efficiency reasons, a transistor switch is typically used with a ZCS controller. A previous work on a ZCS controller used a comparator to detect the voltage [18]. Another approach is to use digital circuits to detect current zero crossing indirectly using the inductor voltage [19]. The digital quantization of inductor voltage needs to select fine pulse width for the ZCS operation. However, the linear scaling used to modulate the pulse width becomes inefficient for low V_IN. To handle the issue, a fine delay stage is used [20], which sets the pulse width suitable to open the high-side switch; however, the ZCS controller uses an external supply to realize fine delay. In addition, appropriate measurement delay is not addressed [21].

To overcome the issues mentioned above, we propose a compact and efficient DC-DC converter system realized in the 28 nm CMOS technology. The integrated system consists of an 85.9% efficient boost converter and a 90 mV self-startup, sharing a single inductor. Innovated techniques are applied to adaptive MPPT (A-MPPT) and indirect ZCS (I-ZCS) controllers for efficient operation. The startup circuit is realized using a ring-oscillator-based charge pump, which enhances gain using a tri-state buffer for ultralow voltage operation. The tri-state buffer achieves a 69.8% gain improvement over a single buffer at V_IN = 200 mV. To extract the maximum power, we use an A-MPPT controller based on a simple capacitive divider for fractional open circuit voltage (FOCV) operation. To address the challenges of realizing accurate voltage or current sensors, we propose an I-ZCS controller based on maximum output voltage tracking (MOVT). The fabricated integrated circuit (IC) is realized in a compact chip area of 0.03 mm². The compact size, which has not been obtained with previous designs, is suitable for wearable device applications. The measured results show a peak tracking efficiency of 95.2% and a conversion efficiency of 85.9%. The end-to-end efficiency of 83.7% is achieved using R_S = 8 Ω and V_S = 280 mV.

This paper is organized as follows. Section 2 describes the system design. Section 3 presents the circuit implementation. Section 4 presents the measured results, and Section 5 draws the conclusion.

2. System Design

2.1. Proposed System

Figure 1 shows the block diagram of the proposed system. It mainly consists of a boost converter and a self-startup circuit. The boost converter includes an A-MPPT controller, an I-ZCS controller, a voltage detector (VD), an oscillator, and four power switches (M_N1, M_N2, M_P1, and M_P2). M_N1, used for self-startup, is a low threshold voltage (LVT) transistor. High threshold voltage (HVT) transistors are used for the switches of the boost converter (M_N2, M_P1, and M_P2), which reduces the leakage current compared to the standard threshold voltage (SVT) transistor. Super-low threshold voltage (SLVT) transistors are used for the startup circuit to reduce the minimum input V_IN to the system. The oscillator consists of a ramp generator, pulse generator, biasing resistor R_OSC, and capacitor C_OSC. The ramp voltage V_RAMP is compared with a reference V_REF to generate the clock signal Φ_OSC for the A-MPPT controller. The TEG is modeled using V_S and R_S. An input capacitor C_IN is used to buffer the converter’s input V_IN. A single inductor L = 100 μH is shared between the startup and boost converter without extra switches.

Figure 2 shows the waveform of the converter. When V_IN is supplied to the startup circuit, it generates an output pulse Φ_S,OUT (=Φ_N1) for M_N1. During the on-time of M_N1, L is charged when V_IN is as low as 90 mV. During the off-time of M_N1, stored energy in L keeps charging the storage capacitor C_DD through M_P1. During the startup, the supply voltage V_DD gradually increases to 700 mV. The VD monitors V_DD. When V_DD reaches 700 mV, it generates the disable signal V_DIS, which stops the oscillation of the startup circuit and enables the boost converter. The boost converter raises the tens of mV generated by the TEG to the output V_OUT level required to power IoT devices. To extract the maximum power from the TEG, the A-MPPT controller continuously adjusts the on-time of the pulse Φ_N2 for M_N2. Then, the input impedance R_IN is adjusted to match R_S, and the maximum power point (MPP) voltage V_MPP tracks half of V_S. The I-ZCS controller provides the pulse Φ_P2 to control the on-time of M_P2 when L discharges. The M_P2 is turned off at a suitable time to prevent the current backflow from V_OUT.

2.2. Self-Startup Circuit

Ring oscillators are widely used to generate the clock for the startup circuit; however, the operation is limited mainly by two reasons. Firstly, when V_DD reduces, it is difficult to sustain the oscillation with the decreased gain of the inverter. Secondly, the output swing needed to drive the subsequent stage is reduced. These limitations can significantly impede the low-voltage startup [22].

Figure 3 shows the proposed self-startup circuit using a gain-boosted tri-state buffer. It consists of six stages, in which the output of the fifth stage is feedback to the first stage. The inset shows the schematic of the unit stage. It comprises two inverters, INV1 (transistors N₁ and P₁) and INV2 (transistors N₂ and P₂). They are realized using SLVT transistors to reduce the startup voltage further. The INV2 works as a tri-state buffer, which provides additional gain to reduce the input for the startup. V_EN is enabled by the input, and the startup circuit generates Φ_S,OUT. When disabled, it keeps a high impedance state. The voltage gain A_V1 of a single inverter can be expressed [22] as

$$A_{\mathrm{V}1}\cong \frac{g_{\mathrm{m},\mathrm{eff}1}}{g_{\mathrm{ds},\mathrm{N}1}+g_{\mathrm{ds},\mathrm{P}1}}=\frac{g_{\mathrm{m},\mathrm{N}1 }+g_{\mathrm{m},\mathrm{P}1 }}{g_{\mathrm{ds},\mathrm{N}1}+g_{\mathrm{ds},\mathrm{P}1}}$$

(1)

where the effective transconductance g_m,eff1 is the transconductance sum of N₁ and P₁. The g_ds,N1 and g_ds,P1 are the output conductance of N₁ and P₁, respectively. In the proposed gain-boosted buffer, the input V_Buf,in is fed to the gate of the two inverters. The buffer output V_Buf,out is taken from the output of INV2. The output of INV1 is connected to the source of the P₂, which is amplified by the gain (A_V1V_IN) of INV1. Then, it is increased to (1 + A_V1)V_IN. Because A_V1 > 1, V_Buf,in is amplified by the effective transconductance g_m,eff2 of the tri-state buffer, which can be written as

$$g_{\mathrm{m},\mathrm{eff}2}\cong (1+A_{\mathrm{V}1})g_{\mathrm{m},\mathrm{P}2}+g_{\mathrm{m},\mathrm{N}2}$$

(2)

where g_m,P2, and g_m,N2 are the transconductance of P₂ and N₂, respectively. Using a similar method to that used to derive Equation (1), we obtain the gain A_V2 of the gain-boosted buffer as

$$A_{\mathrm{V}2}\cong \frac{g_{\mathrm{m},\mathrm{eff}2 }}{g_{\mathrm{ds},\mathrm{P}2}+g_{\mathrm{ds},\mathrm{N}2}}=\frac{(1+A_{\mathrm{V}1})g_{\mathrm{m},\mathrm{P}2 }+g_{\mathrm{m},\mathrm{N}2 }}{g_{\mathrm{ds},\mathrm{P}2}+g_{\mathrm{ds},\mathrm{N}2}}$$

(3)

where g_ds,N2, and g_ds,P2 are the output conductance of N₂ and P₂, respectively. The result shows an enhanced gain of the tri-state buffer.

Figure 4a shows the transfer characteristics of the single- and tri-state buffers for three V_IN. The tri-state buffer shows steeper slopes, indicating increased gain. The gain is calculated by taking the derivative of V_Buf,out. Figure 4b shows the gain comparison using V_IN = 100 mV. The result indicates that the tri-state buffer achieves a 21.2% gain improvement. Figure 4c,d show the gain comparison using V_IN = 150 mV and V_IN = 200 mV, respectively. The results show that the tri-state buffer increases the gain by 41.1% and 69.8%, making it an attractive approach for low-voltage startups.

2.3. Loss Analysis for Startup

Figure 5 shows the equivalent circuit of the startup for loss analysis. The resistive power loss P_R,startup of the startup circuit can be expressed as

$$P_{\mathrm{R},\mathrm{startup}}\cong \frac{R_0{V}_{\mathrm{IN}}^2}{{(R_{\mathrm{IN}}+R_0)}^2}=\frac{(R_{\mathrm{IND}}+R_{\mathrm{N}1})V_{\mathrm{IN}}^2}{{(R_{\mathrm{IN}}+R_{\mathrm{IND}}+R_{\mathrm{N}1})}^2}$$

(4)

where R₀ consists of the inductor parasitic resistance R_IND (= 120 mΩ) and the resistance R_N1 of M_N1. The switching loss P_SW,startup can be expressed as

$$P_{\mathrm{SW},\mathrm{startup}}\cong \frac{1}{2}{C}_{\mathrm{G},\mathrm{N}1}{V}_{\mathrm{G},\mathrm{N}1}^2{f}_{\mathrm{St}}$$

(5)

where f_St is the switching frequency of the startup circuit. V_G,N1 and C_G,N1 are the gate voltage and capacitance of M_N1, respectively. The power consumption P_Q,startup of the startup circuit is 60 nW using V_S = 150 mV and R_S = 18 Ω. The total loss P_T,startup is the sum of P_R,startup, P_SW,startup, and P_Q,startup. Using the input power P_IN, we obtain the efficiency η_startup of the startup circuit as

$${\eta }_{\mathrm{startup}}=\frac{P_{\mathrm{IN}}-P_{\mathrm{T},\mathrm{startup}}}{P_{\mathrm{IN}}}$$

(6)

Figure 6a shows the calculated loss of the startup circuit as a function of V_IN. P_R,startup increases with V_IN, and P_SW,startup is negligible compared to P_R,startup with a relatively low f_St ≈ 40 kHz. Figure 6b shows that η_startup decreases when V_IN increases for a given R_IN. Figure 6c shows that P_R,startup decreases slightly with R_IN, which is mainly determined by V_IN. Figure 6d shows that η_startup increases with R_IN while decreasing with V_IN, which is attributed to increased P_R,startup. In summary, increasing V_IN leads to elevated P_R,startup and reduced η_startup. Increasing R_IN results in reduced P_R,startup and improved η_startup.

2.4. Loss Analysis for Boost Converter

Figure 7 shows the equivalent circuit of the converter for loss analysis. The resistive power loss P_R,boost of the boost converter can be written as

$$P_{\mathrm{R},\mathrm{boost}}={\left(\overline{I_{\mathrm{CHA}}}\right)}^2(R_{\mathrm{IND}}+R_{\mathrm{N}2})+{\left(\overline{I_{\mathrm{DIS}}}\right)}^2(R_{\mathrm{IND}}+R_{\mathrm{P}2})$$

(7)

where $\overline{I_{\mathrm{C}\mathrm{H}\mathrm{A}}}$ is the average inductor charging current when M_N2 is on, and $\overline{I_{\mathrm{D}\mathrm{I}\mathrm{S}}}$ is the average discharging current when M_P2 is on (M_N2 is off). R_N2 and R_P2 are the on-resistances of M_N2 and M_P2, respectively. In the typical boost converter, we can neglect the loss of M_P2 with the condition of ($\overline{I_{\mathrm{C}\mathrm{H}\mathrm{A}}}$ ≫ $\overline{I_{\mathrm{D}\mathrm{I}\mathrm{S}}}$). The switching loss P_SW,boost can be expressed as

$$P_{\mathrm{SW},\mathrm{boost}}=\frac{1}{2}\left[(C_{\mathrm{G},\mathrm{N}2}+C_{\mathrm{PAR}})V_{\mathrm{DD}}^2+C_{\mathrm{G},\mathrm{P}2}{(V_{\mathrm{OUT}}-V_{\mathrm{TH},\mathrm{P}2})}^2\right]f_{\mathrm{S}}\cong \frac{1}{2}\left(C_{\mathrm{G},\mathrm{N}2}+C_{\mathrm{G},\mathrm{P}2}+C_{\mathrm{PAR}}\right)V_{\mathrm{DD}}^2{f}_{\mathrm{S}}$$

(8)

where f_S is the switching frequency, and we use the approximated relationship of V_DD ≈ (V_OUT – V_TH,P2). Here, V_TH,P2 = 0.52 V is the threshold voltage of M_P2. C_G,N2 and C_G,P2 are the gate capacitance of M_N2 and M_P2, respectively. C_PAR = 21 pF is the parasitic capacitance. We obtain P_SW,boost = 200 nW using f_S = 8 kHz, and V_DD = 0.9 V. The quiescent power P_Q,boost of the boost converter is 420 nW. The total power loss P_T,boost of the boost converter is the sum of P_R,boost, P_SW,boost, and P_Q,boost. The synchronization and leakage losses are neglected to simplify the analysis. Then, we obtain the end-to-end efficiency η_EE of the boost converter as

$${\eta }_{\mathrm{EE}}=\frac{P_{\mathrm{OUT}}}{P_{\mathrm{Max}}}=\frac{P_{\mathrm{Max}}-P_{\mathrm{T},\mathrm{boost}}}{P_{\mathrm{Max}}}$$

(9)

where P_Max = (V_S)²/(4R_S) is the maximum available power from the source, and P_OUT = (V_OUT)²/R_L is the output power with the load resistance R_L.

Figure 8 shows the calculated η_EE as a function of R_S for different V_S using the switch parameters shown in

Table 1. Parameters of the power switches.

Power Switch	On-Resistance	Gate Capacitance	Size (W/L)
MN1	RN1 = 0.40 Ω	CG,N1 = 45.2 pF	2048 μm/35 nm
MN2	RN2 = 0.18 Ω	CG,N2 = 15.4 pF	2048 μm/35 nm
MP2	RP2 = 0.45 Ω	CG,P2 = 9.1 pF	4096 μm/35 nm

. When R_S is reduced, increased $\overline{I_{\mathrm{C}\mathrm{H}\mathrm{A}}}$ and P_R,boost reduces η_EE. The η_EE improves with increasing R_S for a given V_S. For R_S = 8 Ω and V_S = 300 mV, η_EE increases to 89.3%. Beyond the maximum point, increasing R_S reduces η_EE by the decreased P_Max.

3. Implementation

3.1. Adaptive MPPT Controller

Figure 9a shows the schematic of the A-MPPT controller. It consists of a capacitor-based FOCV sampler, a comparator CM1, a counter, a programmable delay controller (PDC), and logic gates. In the FOCV technique, V_MPP ≈ (α_MPPV_OC) is obtained using the sampled open-circuit voltage V_OC (≈V_S) and a source-dependent coefficient α_MPP, where α_MPP = 0.5 is used for the TEG. The capacitive divider (C_M1 and C_M2) generates V_MPP. When Φ₁ is high (Φ₂ is low), switch M_M1 is turned on, and V_OC is stored in C_M2. When Φ₂ is high (Φ₁ is low), switch M_M2 is turned on. The stored charge in C_M2 is shared with C_M1. Then, the voltage V_MPP across C_M2 becomes half of V_OC. CM1 compares V_IN against V_MPP, which decides the direction of the up/down counter. The counter output sets the delay of the PDC, and the on-time t_N2 of Φ_N2 is adjusted by the capacitor array in the PDC.

The R_IN of the DCM operation can be expressed [9] as

$$R_{\mathrm{IN}}=\frac{2L}{t_{\mathrm{N}2}^2{f}_{\mathrm{S}}}$$

(10)

where we vary t_N2 to adjust R_IN while keeping f_S constant. To facilitate the MPPT operation, the oscillator frequency f_OSC, which is higher than f_S, is used to update t_N2. This method is different from a previous approach [23], which adjusts t_N2 after evaluating V_MPP rather than choosing between different V_MPP values. Figure 9b shows the simulated waveforms of the MPPT operation. In the beginning, V_IN increases to V_OC by the sampling operation. Using the output of CM1, the A-MPPT controller adjusts t_N2 to vary R_IN for tracking the V_IN changes occurring between two consecutive V_MPP values. The A-MPPT controller consumes 430 nW at V_DD = 900 mV.

Figure 10 shows the flowchart further explaining the MPPT operation. The operation is based on the approximately linear relationship between V_OC and V_MPP. By leveraging this relationship, t_N2 is adjusted to control R_IN and V_IN. In the case of (V_IN < V_MPP), t_N2 is decreased to increase R_IN and V_IN. Conversely, t_N2 increases to reduce R_IN. The proposed approach is simple since it requires measurements of only V_OC, even during temperature variations. Figure 11 shows the schematic of CM1. It is based on a PMOS differential input pair and is biased, using I_BIAS = 5 nA. The power consumption of CM1 is 40 nW at V_DD = 0.9 V.

3.2. Indirect ZCS Controller

Figure 12a shows the schematic of the I-ZCS controller. It comprises a comparator CM2, a counter, a PDC, sampling capacitors (C_1,2,3), and logic gates. The CM2 compares the current average output V_OUT,AVG(n) against the previous output V_OUT,AVG(n−1), which is obtained via the low pass filter (R_Z, C_Z). The CM2 outputs the up/down signal Φ_U/D for the counter, followed by the PDC that generates the adjustable delay Φ_P2 for M_P2. Using the 6-b output Φ_6b, PDC either increases or decreases the on-time t_P2 of Φ_P2. The PDC used for the I-ZCS controller has a similar structure to the one used in the A-MPPT controller. The Φ_N2 is input to the PDC to set the starting reference for Φ_P2 since the on-time of Φ_N2 is used for inductor charging, while the on-time of Φ_P2 is used for inductor discharging. At the end of discharging, the ZCS operation is performed.

Using the waveform of I_IND, we can derive the expression for the change Δt_P in terms of output change ΔV_OUT = [V_OUT,AVG(n) − V_OUT,AVG(n−1)] as

$$\left|\Delta t_{\mathrm{P}2}\right|\cong \left(\frac{L}{t_{\mathrm{N}2}{R}_{\mathrm{OUT}}{f}_{\mathrm{S}}}\right)\frac{\left|\Delta V_{\mathrm{OUT}}\right|}{V_{\mathrm{OUT}}}$$

(11)

where Δt_P2 is the difference between the current t_P2(n) and the previous t_P2(n − 1). The derivation of the above relation is shown in Appendix A. The nomenclature used for the acronyms and symbols of this paper are listed in Appendix B. The working principle of the I-ZCS controller is based on MOVT. V_OUT is maximized when optimal t_P2 is set for ZCS. In either case, when I_IND falls to zero before or after M_P2 is switched off, the non-optimal ZCS operation reduces V_OUT; when there is perfect inductor zero crossing, V_OUT is maximized. One advantage of an I-ZCS operation is that no I_IND sensor is needed. The t_N2 of Φ_N2 is determined by the A-MPPT controller, depending on the source impedance R_S. The t_N2 does not have a direct effect on the I-ZCS controller since it is independently determined before the ZCS operation.

Waveforms for explaining I-ZCS operation are also shown. When V_OUT,AVG(n) is greater than V_OUT,AVG(n−1), the positive difference (ΔV_OUT > 0) performs down-counting with low Φ_U/D. The PDC reduces the number of active delay capacitance, decreasing the pulse width of t_P2. Conversely, the opposite condition (ΔV_OUT < 0) performs up-counting to increase t_P2. Then, Φ_U/D switches between high and low until it reaches the steady state, when V_OUT is maximized by optimal ZCS operation. One drawback of this approach is that V_OUT is not fully regulated, which can be handled using additional regulators commonly used for various power supplies.

Figure 12b shows the logic operation to generate V_OUT,AVG(n − 1). After Φ_N2 is turned off, Φ_P2 turns on M_P2. The output Φ_Q is kept high until Φ_P2 becomes high. With a high transition of Φ_P2, the output Φ_Q of the J/K flip-flop becomes low. When Φ_P2 becomes low, Φ_NOR becomes high, which allows C₂ to be charged from C₁. When Φ_NOR changes to low due to the rising Φ_P2, the voltage V_C2 across C₂ is transferred to C₃, generating V_OUT,AVG(n − 1). Figure 13 shows the simulated results of the I-ZCS controller. During the on-time of Φ_N2, I_IND increases. When Φ_N2 turns off and Φ_P2 turns on, I_IND decreases. The result shows that Φ_P2 accurately switches off when the zero crossing of I_IND occurs. When I_IND reaches zero, M_P2 turns off, initiating the DCM period indicated by T_DCM. The result shows the successful operation of the proposed I-ZCS controller.

4. Measured Results

Figure 14a shows the micrograph of the converter IC fabricated using a 28 nm CMOS process in an area of 0.03 mm². The IC is mounted on a test board using the chip-on-board (COB) technique. Figure 14b shows the experimental setup for the converter characterization. A digital meter (DMM6500) is used for measuring the current. The DC power supply emulates the TEG source from 0.1 V to 0.4 V. The commercial TEG source is also used for testing [24].

Figure 15 shows the measured waveform of the oscillator. When V_RAMP is higher than V_REF = 600 mV, Φ_OSC is triggered high. The measured frequency of Φ_OSC is 44.4 kHz. Figure 16a shows the measured transient result of the self-startup. Using V_IN = 250 mV and R_S = 20 Ω, V_DD is increased to 700 mV, which is enough to enable the boost converter. The steady state is reached after 2 sec. Using the commercial TEG having V_IN = 200 mV, V_DD is increased to 600 mV, and the steady state is reached after 5 sec. These results demonstrate the successful operation of the self-startup. We further characterize the startup circuit using reduced V_IN. Figure 16b shows the measured result, in which V_IN = 90 mV is increased to V_DD = 650 mV. The result shows that the gain-boosted tri-state buffer effectively reduces the minimum startup voltage.

Figure 17 shows the measured waveforms of the converter. The experiment is performed using V_IN = 250 mV and R_S = 20 Ω. When Φ_N2 is high, L is charged. When Φ_N2 is triggered to low, the energy stored in L is transferred to the output. When V_IND reaches the ground, Φ_P2 becomes high to turn off M_P2 via the I-ZCS controller. The ringing is caused by the LC resonance when M_P2 is turned off. Overall capacitance, including C_L, forms resonance with L, and the amplitude is decayed by the path loss.

Figure 18a shows the measured tracking efficiency η_MPPT = (P_IN/P_Max) as a function of V_S. The results show that η_MPPT > 93% is achieved in the V_S range from 135 mV to 300 mV, with the peak η_MPPT of 95.2%. Figure 18b shows the measured conversion efficiency η_CONV = (P_OUT/P_IN) as a function of P_OUT. P_OUT is changed from 77 μW to 1.28 mW by varying R_L. The peak η_CONV = 85.9% is achieved for P_OUT = 1.07 mW. Figure 19 shows the measured η_EE = (P_OUT/P_Max) of the converter as a function of V_S for different R_S. Because P_Max is reduced, η_EE decreases with increasing R_S. The result shows that peak η_EE = 83.7% is achieved using R_S = 8 Ω and V_S = 280 mV.

Table 2. Performance comparison.

	[25]	[26]	[27]	[28]	[29]	[30]	[31]	[32]	This Work
Process	65 nm	180 nm	180 nm	180 nm	180 nm	180 nm	28 nm	28 nm	28 nm
Energy source	TEG	TEG, PV	TEG	TEG, PZ	TEG	PV	TEG, PV, BFC, Battery	TEG, RF	TEG
Type	Boost	Buck-Boost	Boost	Boost	Boost	Boost	Buck-Boost	Boost	Boost
Startup technique	OSC + CP	Ring OSC + CP	CP	−	Ring OSC + CP	CP	Battery	LC OSC	Tri-state buffer, Ring OSC
Minimum startup voltage	210 mV	370 mV	500 mV	100 mV	129 mV	80 mV	−	110 mV	90 mV
ZCS technique	Dynamic comp.	gate comparators	One shot pulse gen.	Latched comp.	D- F/F	Comparator, D-F/F	Digital calibration	−	* MOVT
MPPT technique	FOCV	FOCV	† AIR	†† DPR	OCV	††† SRFG	FOCV	†††† ASF	FOCV
ηCONV	74.5% @ POUT = 229 μW	−	−	75.0% @ POUT = 450 μW	−	89.0% @ POUT = 0.12 mW	89.0% @ POUT = 20 mW	25.0% @ POUT = 0.52 mW	85.9% @ POUT = 1.07 mW
ηEE	71.5% @ VIN = 240 mV	82.1% @ VIN = 600 mV	82.0% @ VIN = 600 mV	−	84.0% @ VIN = 260 mV	86.0% @ VIN = 260 mV	−	10.0% @ N/A	83.7% @ VIN = 280 mV
VOUT	0.86–1.4 V	1.2 V	1–1.2 V	3–4 V	0.8 V	1.2 V	0.4–1.4 V	−	1.4 V
Area (mm2)	4.57	1.23	1.1	1.5	1.62	1.5	0.5	0.46	0.03

* Maximum output voltage tracking; ^† Adaptive input ripple; ^†† Double pile-up resonance; ^††† Self-controlled resonant frequency generator; ^†††† Adaptive switching frequency.

shows the comparison with previous works using the boost converter for energy harvesting [25,26,27,28,29,30,31,32]. Our approach introduces a novel technique for self-startup using the tri-state buffer, distinguishing it from the studies conducted in [26,29], which relied on a single buffer. Notably, the proposed self-startup circuit achieves a minimum startup voltage of 90 mV, outperforming all the works except [30]. Furthermore, our proposed A-MPPT and I-ZCS controllers achieve a relatively high conversion efficiency of 85.9%. In comparison, the efficiencies observed in [25,28,32] are 74.5%, 75.0%, and 25.0%, respectively. In addition, our compact design has the smallest chip area (0.03 mm²) among the works, including ICs implemented using the same technology node of a 28 nm CMOS [31,32]. The result shows that our work effectively handles the previous issue of bulky implementations. Consequently, our research provides practical and efficient solutions for low-cost wearable electronics and IoT applications.

5. Conclusions

In this paper, we propose a compact and efficient boost converter in a 28 nm CMOS for thermoelectric energy harvesting. For self-startup, we use a gain-boosted tri-state buffer in a ring oscillator to achieve a 90 mV minimum startup. A comparison with the single inverter shows that the proposed tri-state buffer achieves a 69.8% improvement in the DC gain. To extract the maximum power from the TEG, we use a FOCV-based A-MPPT controller. To remove the current sensor required by the conventional approach, we propose an I-ZCS controller to achieve an efficient DCM operation. The converter is fabricated in a 28 nm COMS process realized in a compact area of 0.03 mm². The measured data show a successful I-ZCS operation using the proposed MOVT technique. Using the A-MPPT controller, the converter achieves a peak tracking efficiency of 95.2%. The converter delivers the output power of 1.07 mW with a peak conversion efficiency of 85.9%. Using the proposed techniques, TEG energy harvesting can be realized in a compact system. These characteristics are suitable for various applications, including wearable electronics, medical implants, and IoT devices.