Constant-Frequency Model Predictive Direct Power Control for Fault-Tolerant Bidirectional Voltage-Source Converter with Balanced Capacitor Voltage

Abstract

This paper proposes a constant-frequency model predictive direct power control (CF-MPDPC) method for a fault-tolerant bidirectional voltage-source converter (BVSC). The method can enhance the reliability and fault-tolerant operation capability of BVSCs in the condition of bridge-arm fault. Through the analysis of a fault-tolerant three-phase four-switch (TPFS) structure and the voltage vectors in the αβ stationary frame, the predictive power model and DC-link midpoint voltage offset suppression are established. According to model-predictive theory, fault-tolerant TPFS, and multivector control, the CF-MPDPC method for fault-tolerant BVSC is presented. The method realizes direct power control based on three output vectors with constant frequency, which can track the optimal vector more accurately and reduce current harmonics. Furthermore, the balanced control of DC-link capacitor voltages is also achieved by adding the term of DC-link midpoint voltage offset into the cost function. The balanced capacitor voltages protect the converter against the second faults caused by over-voltage operation of electrolytic capacitor. The simulation and experimental results prove that the fault-tolerant BVSC controlled by proposed method can maintain the continuous operation when the switching devices have fault. Low current harmonic content and stable output power exhibit good reliability and dynamic performance of the proposed CF-MPDPC for a fault-tolerant BVSC with a phase fault.

1. Introduction

Due to environment pollution and fossil-energy reduction, clean energy such as solar and wind energy have quickly been promoted in many developed and developing countries. As the key equipment of grid integration of renewable-energy generation, the bidirectional voltage-source converter (BVSC) can realize AC/DC bidirectional power conversion with high efficiency [1,2,3,4,5]. Furthermore, many other energy conversion examples, such as distributed generation and electric vehicles, also depend on the reliable operation of BVSC. However, due to surges and spikes caused by high voltage, the switching devices of BVSC are prone to have faults, which leads to discontinuous operation and degrades power quality. Therefore, it’s necessary and significant to research the fault-tolerant BVSC and improve reliability in a condition of switching device faults.

When the switching devices of the traditional three-phase six-switch (TPSS) converter have an open-circuit fault, the faulty phase is usually connected to the midpoint of DC-link capacitors to form a three-phase four-switch (TPFS) fault-tolerant structure to keep working. Since the topology structure is changed, the control method should be adjusted for a TPFS fault-tolerant structure [6,7,8,9,10,11,12]. For TPFS shunt active power filters, a three-level hysteresis current-control (HCC) strategy is proposed to enables access to the zero level of the input voltage to reduce switching frequency. Furthermore, the imbalance of capacitor voltages is eliminated by adding a feedback term to the current control [6]. Due to the fact that a TPFS converter usually operates at half the DC input voltage, TPFS topology based on single-ended primary-inductance converter (SEPIC) is proposed to improve the utilization factor of the input DC supply, and integral sliding-mode control is used to optimize dynamic performance [7]. Three space-vector pulse-width modulation methods using different equivalent zero vectors are proposed for the TPFS pulse width modulation (PWM) rectifier to reduce current ripples. Furthermore, the control-oriented model is built to eliminate capacitor voltage deviation [12]. TPFS topology is also used in the motor drive for cost-effective low-power applications. For an induction motor (IM) driven by TPFS inverter, a fuzzy-logic controller (FLC) is proposed with more robust and better dynamic responses than the traditional proportional-integral (PI) controller [10]. The fault-tolerant operation against DC faults for a multiterminal high-voltage direct current (HVDC) transmission system was also studied by researchers. Due to that the DC fault of a modular multilevel converter (MMC) constrains its application in HVDC transmission systems, a new hybrid-cascaded MMC is proposed to improve its DC fault ride-through capability. The main power stage based on a half-bridge cell generates the fundamental voltages, while the cascade full-bridge (FB) cells attenuate the harmonics [13]. In order to deal with the DC line faults, a new protection scheme consisting of a main protection and a backup protection is presented for multiterminal HVDC based on VSCs [14]. Since the VSCs are vulnerable against DC-side faults, three different configurations of solid-state DC circuit breakers (CB) for protection purposes and a new control method to interrupt the DC fault current for multiterminal HVDC are studied to protect the VSCs [15]. The TPFS fault-tolerant control method based on space-vector pulse width modulation requires complex coordinating transformation, a phase-locked loop (PLL), and a PI controller, which is influenced by personal experience. In addition, bidirectional power conversion for TPFS fault-tolerant control needs further study.

Recently, the model predictive control (MPC) has drawn researchers’ attention due to its advantages of simplicity and flexibility. Through a flexible cost function composed by different control targets, the MPC can realize multiobjective control with good dynamic performance and robustness [16,17,18,19,20,21,22,23,24,25]. To reduce the common-mode voltage of three-phase voltage source inverters, MPC is used with only nonzero voltage vectors to track the reference current. Without using zero vectors, the method can reduce common-mode voltage as well as control the load currents with satisfactory performance [18]. The MPC framework is adopted to realize seamless transition between islanded and grid-connected operations for distributed-generation (DG) systems [19]; a hierarchical and decentralized model predictive control scheme is proposed for the HVDC system to quickly track active and reactive power references. Multiple targets, such as improving power quality, providing voltage support, and stabilizing the grid, can be achieved [21]. To achieve robustness against uncertain parameters and simplify the predictive model, the MPC based on a disturbance observer (DOB) is proposed for three-phase inverters with an LC filter [23]. The MPC method is also applied in offshore wind farms and flywheel energy-storage systems. An enhanced voltage-control strategy (EVCS) based on MPC is proposed for offshore wind farms to keep voltages within feasible range and reduce system power losses [24]. An optimal nonlinear controller based on MPC is proposed for flywheel energy-storage systems to control the systems in the presence of uncertainties [25]. Many researchers apply MPC to TPSS converters without considering faulty conditions. In fact, when the switching devices have a fault, the conventional MPC should be modified and further researched to adapt to the fault-tolerant TPFS topology.

Due to the limited voltage vectors of BVSC, conventional MPC selects only one voltage vector that minimize cost function at the next sampling period, which fails to reduce power ripples and current harmonics to minimal values [26,27,28,29,30,31,32,33,34,35]. Recently, MPC with duty-cycle control has been used to further lower power ripples for PWM rectifiers. During the control period, a nonzero vector and a zero vector are applied based on their duration time to minimize power errors [27]. To reduce computational requirements in duty-cycle calculation, the negative conjugate of complex power is chosen as control target based on the double-vector approach [29]. To improve the steady-state performance of induction motor drives, a generalized two-vector-based model-predictive torque control is put forward with two arbitrary voltage vectors [32]. The extended switching vectors and time-optimized control are used in MPC with more freedoms and precise tracking possibility for active front-end power converters to reduce ripples [34]. In order to obtain optimal duty cycles, the cost function based on the desired control performance is adopted for three-phase active-front-end rectifiers [35]. However, the MPC-optimized control is usually applied in normal-operation converters, which ignores the occurrence of switching device faults. In addition, the bidirectional power-conversion control of BVSC and seamless transition between inverter and rectifier mode still need more research.

Traditional MPC selects only one vector in a sampling period, which leads to variable switching frequency and power ripples. Considering the fault of switching devices, the fault-tolerant operation and voltage vectors of TPFS topology are analyzed. This paper proposes a constant-frequency model predictive direct power control (CF-MPDPC) for fault-tolerant BVSC based on three vectors with a fixed operation sequence in each sector. There are two nonzero vectors of a sector and a synthetic zero vector for applying in one sampling period. To reduce the calculation burden, the synthesizing vector is obtained by the three vectors with their durations before bringing them into the final cost function. Due to the unbalanced midpoint of capacitor voltage for TPFS converters, the DC-link voltage offset is analyzed and added into the cost function to make the voltages of the two capacitors equal, which avoids second faults with electrolytic capacitors for overvoltage operations. In consideration of digital implementation and application delay, two-step prediction is adopted in CF-MPDPC for delay compensation. The simulation and experiments with the proposed method are presented and compared with the conventional MPDPC for TPSS converter and MPDPC for fault-tolerant TPFS converter. The results show the effectiveness and superiority of the proposed CF-MPDPC method, with lower current harmonics and smaller power ripples in both inverter and rectifier modes. Furthermore, the seamless transition of the two modes and DC-link voltage offset suppression are verified by the simulation and experiments.

2. Model of Fault-Tolerant BVSC

2.1. Fault-Tolerant Operation Analysis

The reliability of switching devices has serious influence on the normal operation of a BVSC. Due to surges and spikes caused by high voltage and high switching-frequency transition, switching devices tend to have faults. As shown in Figure 1a, there are fast-fuse devices (F₁–F₆) for every switching device (S₁–S₆) and bidirectional switches for each phase. When a switching device has a fault, the corresponding fuse device is disconnected and the bidirectional switch of the fault phase is closed to the central point of the two series capacitors in parallel with the DC power; then, the TPFS structure is formed, as shown in Figure 1b, with a Phase A leg fault.

The fault-tolerant structure of BVSC is shown in Figure 1a. When the switching device of Phase A has a fault, the corresponding switch is closed and Phase A is connected to the central point of the DC-link capacitors, which are reconstructed into a TPFS structure, as shown in Figure 1b. Then, four switching devices are left, and the switching states are defined as S_i (i = b, c):

$$S_i=\{\begin{array}{c}1\\ 0\end{array}\begin{array}{cc}& \mathrm{upper} \mathrm{bridge} \mathrm{of} i \mathrm{phase} \mathrm{is} \mathrm{on} \mathrm{and} \mathrm{lower} \mathrm{bridge} \mathrm{is} \mathrm{off}\\ & \mathrm{upper} \mathrm{bridge} \mathrm{of} i \mathrm{phase} \mathrm{is} \mathrm{off} \mathrm{and} \mathrm{lower} \mathrm{bridge} \mathrm{is} \mathrm{on}\end{array}$$

(1)

The relationship between u_bN, u_cN and switching states is:

$$\{\begin{array}{c}{u}_{bN}=S_b{v}_{c1}+\left(S_b-1\right)v_{c2}\\ u_{bN}=S_c{v}_{c1}+\left(S_c-1\right)v_{dc2}\end{array}$$

(2)

Then, output voltages be expressed by switching states as:

$$\{\begin{array}{c}{u}_{an}=\frac{v_{c1}}{3}\left(-S_b-S_c\right)+\frac{v_{c2}}{3}\left(2-S_b-S_c\right)\\ u_{bn}=\frac{v_{c1}}{3}\left(2S_b-S_c\right)+\frac{v_{c2}}{3}\left(2S_b-S_c-1\right)\\ u_{cn}=\frac{v_{c1}}{3}\left(2S_c-S_b\right)+\frac{v_{c2}}{3}\left(2S_c-S_b-1\right)\end{array}$$

(3)

where v_c1 and v_c2 are voltages of capacitor C₁ and C₂, respectively.

Then, the output voltage in the αβ stationary frame when Phase A has a fault under four switching states is obtained in

Table 1. Voltage vectors when switching device of Phase A has a fault.

Voltage Vector	Switching State (Sb, Sc)	uα	uβ
V1	(0, 0)	2vc2/3	0
V2	(0, 1)	(vc2−vc1)/3	$-(v_{c1}+v_{c2})/\sqrt{3}$
V3	(1, 0)	(vc2−vc1)/3	$(v_{c1}+v_{c2})/\sqrt{3}$
V4	(1, 1)	−2vc2/3	0

, and the corresponding graphs of voltage vectors are shown in Figure 2 under the conditions of v_c1 = v_c2, v_c1 < v_c2 and v_c1 > v_c2.

2.2. Predictive Power Model

From the fault-tolerant structure of BVSC in Figure 1, according to the Kirchhoff law, the following state equation in an abc coordinate frame can be obtained [36,37]:

$$L\frac{d}{dt}\left[\begin{array}{c}{i}_a\\ i_b\\ i_c\end{array}\right]+R\left[\begin{array}{c}{i}_a\\ i_b\\ i_c\end{array}\right]=\left[\begin{array}{c}{u}_{an}-e_a\\ u_{bn}-e_b\\ u_{cn}-e_c\end{array}\right]$$

(4)

where L and R are the filter inductor and line resistance, respectively; i_a, i_b and i_c are currents of Phase A, B, C; u_an, u_bn and u_cn are output voltages of the fault-tolerant BVSC; and e_a, e_b, and e_c are grid voltages.

The relationship between output voltages of a TPFS converter and switching states is:

$$\left[\begin{array}{l}{u}_{an}\\ u_{bn}\\ u_{cn}\end{array}\right]=\frac{v_{dc}}{3}\left[\begin{array}{ccc}2& -1& -1\\ -1& 2& -1\\ -1& -1& 2\end{array}\right]\left[\begin{array}{l}1/2\\ Sb\\ S_c\end{array}\right]$$

(5)

After Clark coordinate transformation, Equations (4) and (5) can be converted to the αβ stationary frame as:

$$L\frac{d}{dt}\left[\begin{array}{c}{i}_{\alpha }\\ i_{\beta }\end{array}\right]+R\left[\begin{array}{c}{i}_{\alpha }\\ i_{\beta }\end{array}\right]=\left[\begin{array}{c}{e}_{\alpha }\\ e_{\beta }\end{array}\right]-\left[\begin{array}{c}{u}_{\alpha }\\ u_{\beta }\end{array}\right]$$

(6)

Then, the predictive currents of BVSC at t_k+1 instant can be obtained by discretizing Equation (6):

$$\left[\begin{array}{c}{i}_{\alpha }(k+1)\\ i_{\beta }(k+1)\end{array}\right]=\frac{T_s}{L}\left[\begin{array}{c}{u}_{\alpha }(k)-e_{\alpha }(k)\\ u_{\beta }(k)-e_{\beta }(k)\end{array}\right]+\left(1-\frac{R{T}_s}{L}\right)\left[\begin{array}{c}{i}_{\alpha }(k)\\ i_{\beta }(k)\end{array}\right]$$

(7)

where T_S is the sampling period; i_α(k+1), i_β(k+1) are predictive currents at t_k+1 instant; u_α(k), u_β(k), i_α(k), i_β(k), e_α(k), e_β(k) are the actual sampling output voltages, currents, and grid voltages in the αβ stationary frame at the t_k instant.

According to instantaneous power theory, the predictive power model at the t_k+1 instant is then shown as the following:

$$\left[\begin{array}{c}P(k+1)\\ Q(k+1)\end{array}\right]=\frac{3T_S}{2L}\left[\begin{array}{cc}{e}_{\alpha }(k)& e_{\beta }(k)\\ e_{\beta }(k)& -e_{\alpha }(k)\end{array}\right]\left[\begin{array}{c}{u}_{\alpha }(k)-e_{\alpha }(k)-R{i}_{\alpha }(k)\\ u_{\beta }(k)-e_{\beta }(k)-R{i}_{\beta }(k)\end{array}\right]+\left[\begin{array}{c}P(k)\\ Q(k)\end{array}\right]$$

(8)

where P(k) and Q(k) are the active power and reactive power at the t_k instant, respectively, and P(k+1) and Q(k+1) are the active power and reactive power at the next instant.

2.3. DC-Link Midpoint Voltage-Offset Suppression

When switching devices have a fault, the fault phase is connected to the center point of two series capacitors to form a TPFS structure. However, the voltages of the two capacitors are not equal, which leads to DC-link voltage offset and current harmonics. If the capacitor voltage is over-rated in value, the life of the capacitor would decrease and a secondary BVSC failure would be generated. Therefore, it’s necessary to restrain the DC-link midpoint voltage offset. As shown in Figure 1b, the relationship of two capacitor currents with a Phase A fault can be expressed as follows:

$$\{\begin{array}{c}C\frac{d{v}_{c1}}{dt}=i_{c1}\\ C\frac{d{v}_{c2}}{dt}=i_{c2}\end{array}$$

(9)

The relationship between the capacitor current and switching states is:

$$\{\begin{array}{c}{i}_{c1}=i_{dc}-i_b\cdot S_b-i_c\cdot S_c\\ i_{c2}=i_{dc}+i_b\cdot (1-S_b)+i_c\cdot (1-S_c)\end{array}$$

(10)

The voltage offset between two capacitors is obtained as:

$$C\frac{d\Delta v_{dc}}{dt}=C\frac{d\left(v_{c1}-v_{c2}\right)}{dt}=i_{c1}-i_{c2}=i_a$$

(11)

Then, the difference of two capacitor voltages can be expressed as:

$$\mathsf{\Delta }{v}_{dc}=\frac{1}{\mathrm{C}}{\displaystyle {\int }_k^{k+1}{i}_a}+(v_{c1}(k)-v_{c2}(k))$$

(12)

After discretizing Equation (12), the predictive DC voltage-offset model at the t_k+1 instant is shown as:

$$\Delta v_{dc}\left(k+1\right)=\Delta v_{dc}\left(k\right)+\frac{T_S}{C}{i}_a\left(k\right)$$

(13)

where T_S and C are the sampling period and capacitor value, respectively, and Δv_dc(k) is the sampling DC voltage offset at the t_k instant. In order to achieve DC-link voltage-offset suppression, the predictive DC voltage offset should be added to the MPC cost function to be minimum.

3. Control Method for a Fault-Tolerant BVSC

3.1. Theoretical Analysis of the Constant-Frequency MPC (CF-MPC) Method

MPC has been used in the control of power electronics as a moving optimization strategy, which has the advantage of convenient modeling and good robust characteristics. The main target is keeping the output value close to reference value x*. As shown in Figure 3, the predictive value at the t_k+1 instant is obtained according to sampling value x(t_k) and various switching states (S₁–S_n). Then, cost function is used to compare the predictive value and the reference. Finally, the switching state minimizing the cost function is applied as the optimal choice at next moment. Therefore, the S₃ state is used at the t_k+1 instant and (Figure 3) since predictive value x₃(t_k+1) is closest to reference value x*. However, the traditional MPC for a BVSC is applicable in normal operation conditions, which is not considering fault-tolerant operations. Only one voltage vector is applied during a sampling period, which can not track the optimal vector, and it leads to errors between the reference and output values. Since the switching order of the voltage vector at each sampling time is not certain, the switching frequency of power devices is unfixed, which causes unfixed harmonic frequency of the current. Therefore, it’s hard to design a proper filter to eliminate current harmonics.

In this paper, CF-MPC is proposed for fault-tolerant BVSC with three voltage vectors in a sampling period to form a fixed switching frequency. The method can improve predictive accuracy closer to the optimal vector and make the current harmonic center on a high frequency, which is easier to be filtered and helpful for filter designing. As shown in Figure 2, the four voltage sectors are formed by voltage vectors V₁(0, 0), V₂(0, 1), V₃(1, 0), V₄(1, 1) of a fault-tolerant BVSC with a Phase A fault. In order to minimize output errors, there are three voltage vectors (two nonzero vectors and one synthetic zero vector) adopted in one sampling period to track the optimal vector, which makes up for the shortage of one vector and reduces the predictive error. In addition to two adjacent nonzero vectors in each sector, one zero vector is synthesized by V₁ and V₄ (each vector lasts over t₀/2 time) to improve prediction accuracy. As shown in Figure 4, the duration and sequence diagram of voltage vectors under each sector are various. The vectors are allocated symmetrically and the signal pulses of switching devices are produced by triangular carrier comparison with duty control. In Sector I and II, the vector-composition sequence is V₁(0, 0)-V₃(1, 0)-V₄(1, 1)-V₃(1, 0)-V₁(0, 0), while in Sector III and IV the vector sequence is V₁(0, 0)-V₂(0, 1)-V₄(1, 1)-V₂(0, 1)-V₁(0, 0). By this working mode, the simultaneous motion of multiple switching devices is avoided to decrease power loss. The arranged vector sequence generates high frequency of current harmonics, which is favorable for filter design. The upper and lower lines show the switching state of phase B and C, respectively, in one sampling period, which is divided into three parts in Figure 4. The horizontal axis represents the duration for three vectors. Take Sector I for example: t₁ and t₃ represent the duration of two nonzero vectors V₁ and V₃, while t₀ shows the operation time of the synthetic zero vector (V₁ and V₄).

3.2. CF-MPC Method for Fault-Tolerant BVSC

To determine the operation time of three vectors in a sampling time, the subcost function for each vector should be calculated to measure the error of one vector. For example, if Phase A has a fault and the voltage vector is in Sector I, the subcost functions under two nonzero vectors (V₁, V₃) and one zero vector (synthesized by V₁ and V₄) can be expressed as follows:

$$\{\begin{array}{c}{g}_1=\left|P_{ref}-P_1(k+1)\right|+\left|Q_{ref}-Q_1(k+1)\right|\\ g_3=\left|P_{ref}-P_3(k+1)\right|+\left|Q_{ref}-Q_3(k+1)\right|\\ g_0=\left|P_{ref}-P_0(k+1)\right|+\left|Q_{ref}-Q_0(k+1)\right|\end{array}$$

(14)

where g₁, g₃, and g₀ are the subcost function of three vectors; P_ref and Q_ref are reference active and reactive power; P₁(k+1), P₃(k+1), P₀(k+1), Q₁(k+1), Q₃(k+1), Q₀(k+1) are predictive active powerand reactive power of three vectors at the t_k+1 instant by Equation (16).

The subcost function in Equation (14) shows the predictive error under each vector. The evaluation criterion is that the smaller the cost function is, the better the predictive effect is. Therefore, the last vector time with a smaller cost function should be longer. To achieve this working mode, the inverse ratio of a subcost function is used as the operation time of three vectors:

$$\{\begin{array}{c}{t}_1=T_s(\frac{1}{g_1})/((\frac{1}{g_1})+(\frac{1}{g_3})+(\frac{1}{g_0}))\\ t_3=T_s(\frac{1}{g_3})/((\frac{1}{g_1})+(\frac{1}{g_3})+(\frac{1}{g_0}))\\ t_0=T_s(\frac{1}{g_0})/((\frac{1}{g_1})+(\frac{1}{g_3})+(\frac{1}{g_0}))\end{array}$$

(15)

where T_S is the sampling period; t₁, t₃, and t₀ are the operation time of three vectors.

According to the duration and operation sequence diagram of Sector I in Figure 4, the corresponding duty cycles for switching states S_b and S_c are:

$$\{\begin{array}{c}{d}_b=\frac{t_3}{T_s}+\frac{t_0/2}{T_s}\\ d_c=\frac{t_0/2}{T_s}\end{array}$$

(16)

After obtaining the duration of each vector, the voltage in the αβ stationary frame of the synthesizing vector is shown as:

$$\{\begin{array}{c}{u}_{\alpha }=(u_{\alpha 1}*t_1+u_{\alpha 3}*t_3+u_{\alpha 0}*t_0)/T_s\\ u_{\beta }=(u_{\beta 1}*t_1+u_{\beta 3}*t_3+u_{\beta 0}*t_0)/T_s\end{array}$$

(17)

where u_α and u_β are the αβ components of synthesizing vector; u_α1, u_β1, u_α3, u_β3, u_α0, and u_β0 are αβ components of three applied vectors.

Substituting Equation (17) to the predictive power model Equation (8), the predictive power of the synthesizing vector at the t_k+1 instant is obtained as P(k+1), Q(k+1). Cost function is used to evaluate the predictive values based on control targets. To achieve direct power control, the absolute values between predictive power and reference power are used as power control terms in the cost function. Furthermore, considering the unbalance of DC-side midpoint voltage, the absolute value of predictive DC voltage offset is adopted as a DC capacitor voltage control term in the cost function. In addition, in consideration of digital implementation and application delay, two-step delay prediction is usually adopted in MPC. Therefore, cost function can be expressed as:

$$g=\left|P_{ref}-P(k+2)\right|+\left|Q_{ref}-Q(k+2)\right|+\lambda \left|\Delta v_{dc}\left(k+2\right)\right|$$

(18)

where λ is the weighting coefficient to regulate the DC midpoint voltage, the first two terms are used to control active and reactive power, the last term is to balance DC-side midpoint voltage, P(k+2) and Q(k+2) are predictive active power and reactive power, respectively, at the t_k+2 instant, and Δv_dc(k+2) is DC voltage offset at the t_k+2 instant, which can be obtained by following equations:

$$\left[\begin{array}{c}P(k+2)\\ Q(k+2)\end{array}\right]=\frac{3T}{2L}\left[\begin{array}{cc}{e}_{\alpha }(k+1)& e_{\beta }(k+1)\\ e_{\beta }(k+1)& -e_{\alpha }(k+1)\end{array}\right]\left[\begin{array}{c}{u}_{\alpha }(k+1)-e_{\alpha }(k+1)-R{i}_{\alpha }(k+1)\\ u_{\beta }(k+1)-e_{\beta }(k+1)-R{i}_{\beta }(k+1)\end{array}\right]+\left[\begin{array}{c}P(k+1)\\ Q(k+1)\end{array}\right]$$

(19)

$$\Delta v_{dc}\left(k+2\right)=\Delta v_{dc}\left(k+1\right)+\frac{T_s}{C}{i}_a\left(k+1\right)$$

(20)

Based on the above CF-MPC predictive model, the flow diagram to select the optimal vector and the control structure for a fault-tolerant BVSC is shown in Figure 5 and Figure 6, respectively. First, the voltage of two capacitors, grid voltage and current, is sampled to prepare for calculating predictive power and DC-link midpoint voltage offset. In order to confirm the optimal vector sector, the four sectors should be tested in turn. Then, the operation time of three vectors in each sector is calculated according to Equations (14) and (15) before ensuring the synthesizing vector. After that, the predictive values at the t_k+2 instant are obtained with Equations (19) and (20) and substituted into final cost Equation (18). Lastly, the sector that can minimize cost function is applied and the corresponding three vectors are executed according to their operation time.

Conventional MPC only outputs one uncertain vector in a sampling period, which leads to unfixed frequency and power ripples. The proposed CF-MPDPC generates three vectors based on the selected sector to form fixed switching frequency, which lower the power ripples and reduce current harmonics. The two adjacent vectors and one synthetic zero vector in each sector are used to track the optimal vector. To determine the duration of three vectors in a sampling time, the sub-cost function of each vector is calculated to measure the error and then the duration is the inverse ratio of sub-cost function. Based on the duration of vectors, the corresponding duty cycles for switching states and the synthesizing vector for three vectors can be obtained. According to the synthesizing vector and predictive model, the cost function is calculated to evaluate the predictive values. The sector which minimizes the cost function is the selected sector and the corresponding duty cycle is applied at next sampling time.

4. Simulation and Experiment Results

4.1. Simulation Results for Fault-Tolerant BVSC

The simulation models are built by modules in MATLAB Simulink 2014b (The MathWorks, Inc, Natick, MA, USA) with the parameters shown in

Table 2. Simulation and experiment parameters.

Symbol	System Parameters	Value
vdc	DC voltage	400 V
C1, C2	Capacitance	1000 μF
L	Filter inductance	10 mH
R	Line resistance	0.2 Ω
e	AC line voltage	110 V
f	Grid frequency	50 Hz
λ	Weighting factor	1000
fs	Sampling frequency	20 kHz

. To verify the effectiveness and superiority of proposed method, three control methods (MPDPC for TPSS converter, MPDPC for TPFS fault-tolerant BVSC and proposed CF-MPDPC for TPFS fault-tolerant BVSC) are simulated under the same condition for comparison. The steady state simulations of fault-tolerant BVSC with switch open-circuit fault of Phase A occurred in inverter mode and rectifier mode are implemented. Besides, the dynamic simulation and balanced capacitor voltages are achieved to further validate the feasibility and advantage of proposed method.

Figure 7 shows the simulation results for BVSC with a Phase A fault in inverter mode. The reference active power and reactive power are 1000 W and 0 Var, respectively. To compare output power and current for a TPFS fault-tolerant control, the DC-link voltage offset is added to the cost function for both the MPDPC and proposed CF-MPDPC methods. The weighting coefficient of DC-link voltage offset λ is 1000, which is determined by multiple tests. The total harmonic distortion (THD) of a current under the traditional MPDPC for TPSS was 44.47%, and output power fluctuated wildly, as shown in Figure 7a. The reason is that traditional MPDPC based on six vectors for BVSC don’t take fault-tolerant operations into account. Therefore, once the phase fault occurs, Phase A is disconnected and output vectors change with the fault phase. The current of the fault phase is zero, which leads to an unsustainable operation. The output current and power under MPDPC for a fault-tolerant BVSC is much improved, as shown in Figure 7b, with balanced capacitor voltage. The THD of the current was 5.23%, and output power remained basically stable with small ripples. That’s because the fault-tolerant BVSC can link the fault phase to the center point of DC-side capacitors and the MPDPC is operated under four vectors, which keep the BVSC controllable with phase faults. DC-link voltage is restricted to balance due to the DC-link voltage-offset term in cost function. When the cost function is minimum, voltage difference between two capacitors is minimized. However, since only one uncertain vector is adopted in one sampling time, the MPDPC method can’t precisely track the optimal output vector, and the unfixed switching frequency leads to various low-frequency harmonics. The current THD is 2.32% under the control of the proposed CF-MPDPC, as shown in Figure 7c, which decreases 2.91% compared to MPDPC for a fault-tolerant BVSC. The output power of the converter is smoother with lower ripples, which is better than the other two methods. The voltages of the two capacitors are balanced due to the restriction of the DC-link voltage offset. Since there were three vectors executed according to their operation times, the actual output vector was closer to the optimal vector, which forms better and smoother output power. The fixed switching frequency makes the current harmonics center on high frequency, which can be more easily filtered. Therefore, the steady performance of fault-tolerant BVSC controlled by proposed CF-MPDPC are improved in inverter mode.

Figure 8 shows the BVSC simulation in the rectifier mode. The bridge arm of Phase A has an open-circuit fault. The given reference active power is –1000 W and the reference reactive power is 0 Var. DC-link voltage offset is restricted by cost function, and the weighting coefficient is 1000. The current THD under traditional MPDPC for a TPSS converter is 32.18%, with active power fluctuation from –1000 W to 0 W as shown in Figure 8a, whereas reactive power varies between –1500 Var and 500 Var. Poor waves indicate that the converter can’t work normally under a phase fault. For a fault-tolerant BVSC, the MPDPC under four vectors can maintain output power, tracking reference values, the current THD drops to 5.06%, and the two capacitor voltages are balanced as shown in Figure 8b, which proves that the fault-tolerant TPFS structure can keep the operation under a condition of a phase fault. Furthermore, the waves with the proposed CF-MPDPC for a fault-tolerant BVSC are better, and the current THD is 2.62% with balanced capacitor voltage. Most current harmonics focus on 10,000 Hz and 20,000 Hz, while low-frequency content is very small. The simulation results verify the effectiveness of the proposed method in a rectifier mode with a Phase A fault.

To verify the dynamic performance, the given reference active power changes from 1000 W to –1000 W, and reference reactive power is 0 Var. Figure 9 shows the simulation of switching between inverter and rectifier mode with the proposed CF-MPDPC. There is no serious distortion and overcurrent in the process of power change, and output power changes smoothly and stably tracks the reference value, which exhibits good dynamic control performance of the proposed method for step-changed power. Since the model predictive control is related to the parameters, various inductance values are used to verify the robustness of MPDPC and the proposed CF-MPDPC for a fault-tolerant TPFS converter. The given reference active power and reactive power are 1000 W and 0 Var. Current THD comparison is shown in Figure 10, and detailed THD values are displayed in

Table 3. Current THD comparison for a fault-tolerant BVSC.

Inductance	6mH	8mH	10mH	12mH	14mH
MPDPC	10.5%	7.7%	5.23%	3.98%	3.23%
CF-MPDPC	4%	2.88%	2.32%	2%	1.85%

. Current THD has small changes. with various inductance values under CF-MPDPC control. From the comparison, it can be seen that the proposed CF-MPDPC has stronger robustness than MPDPC. To verify the effect of changing sampling frequency on the results, sampling frequency is decreased from 20 kHz to 10 kHz. The reference active power and reactive power are 1000 W and 0 Var, respectively. The current THD of the MPDPC method increases from 5.23% to 9.7%. In contrast, the current THD for a fault-tolerant BVSC controlled by the proposed CF-MPDPC method rises from 2.32% to 3.1%, which shows good robustness.

4.2. Experiment Results for Fault-Tolerant BVSC

The experimental setup shown in Figure 11 is established to test the performance of the proposed CF-MPDPC strategy for a fault-tolerant BVSC. The main devices contain adjustable DC power source APL-II (Myway, Kanagawa, Japan), AC-programmable power AMETEK MX-30 (AMETEK Programmable Power, Inc., San Diego, CA, USA), and a BVSC hardware testbed based on PE-PRO, which is controlled by TI TMS320F28335 (Texas Instruments, Inc., Dallas, TX, USA). Experimental parameters are the same with the simulation parameters shown in Table 2.

Figure 12 and Figure 13 exhibit the experimental results of BVSC with a Phase A fault in inverter mode and rectifier mode under three different control methods. The given reference active power in Figure 13 and Figure 14 is 1000 W and –1000 W, respectively. Reference reactive power is 0 Var in both inverter and rectifier mode. DC-link voltage offset is restricted by cost function in both MPDPC and CF-MPDPC for a fault-tolerant BVSC, and weighting coefficient λ is 1000. Current THD under traditional MPDPC for BVSC is 50.57% in inverter mode and 27.04% in rectifier mode. The current of the fault phase is zero because of the open circuit of the faulty bridge arm, and the other two currents have serious distortion, which can’t satisfy grid-connection requirements. The overfluctuation of output active power and reactive power show that the converter is not working properly, as shown in Figure 12a and Figure 13a. The waves under MPDPC for a fault-tolerant BVSC are improved by establishing a fault-tolerant structure and voltage vectors. The currents of three phases are sinusoidal with 5.26% THD in inverter mode and 5.53% THD in rectifier mode, with small fluctuations of output power, shown in Figure 12b and Figure 13b. By using the MPDPC based on three output vectors to approach the optimal vector and constant frequency on account of a fixed switching sequence for each sector, the current THD under the proposed CF-MPDPC for a fault-tolerant BVSC is 3.29% in inverter mode and 3.21% in rectifier mode, as shown in Figure 12c and Figure 13c, which are the best current waveforms of the three methods. The output active power and reactive power can track the reference values and remain more stable than MPDPC. The harmonic contents of the three methods are presented in

Table 4. Experimental comparison of current THD.

Working Mode	Control Method	THD
Inverter mode	MPDPC for BVSC	50.57%
	MPDPC for TPFS converter	5.26%
	CF-MPDPC for TPFS converter	3.29%
Rectifier mode	MPDPC for BVSC	27.04%
	MPDPC for TPFS converter	5.53%
	CF-MPDPC for TPFS converter	3.21%

. The low-frequency harmonics of the proposed CF-MPDPC for a fault-tolerant BVSC are reduced, and the high frequency of the current harmonics makes the filtering design easier. Furthermore, the voltages of the two capacitors are balanced in both MPDPC and CF-MPDPC for a fault-tolerant BVSC due to the term of DC-link voltage offset in the cost function. Steady experimental results verify the effectiveness of the proposed method in both inverter and rectifier modes.

To test the performance of the proposed CF-MPDPC for a fault-tolerant TPFS converter with a dynamic power process, the reference active power changes from 1000 W to –1000 W, and the reactive power keeps at 0 Var to realize unit power factor grid-connected control. The bridge arm of Phase A has a fault, and the corresponding bidirectional switch is closed to connect the fault phase to the center point of the DC-link capacitors to form a TPFS fault-tolerant structure. As shown in Figure 14, the sinusoidal three-phase current waveforms can rapidly and stably follow the power without current shocks and increased harmonics. The output power can accurately track the reference values with good dynamic characteristics, which exhibits good performance of the proposed method.

As shown in Figure 15, the center point of DC-link voltage for a fault-tolerant BVSC is unbalanced when weighting coefficient λ = 0, which represents that DC voltage-offset Δv_dc isn’t restricted. Voltage v_c1 fluctuates around 270 V, while voltage v_c2 near 130 V, which threatens the long-term safe operation of capacitors. When the term of DC-link voltage offset is added to the cost function and weighting coefficient λ = 1000, the output power of BVSC can quickly remain stable and the balance center point of DC-link voltage is achieved with the voltages of two capacitors close to 200 V, which is half of the DC-link voltage. Weighting coefficient is obtained by repeated experiments, and the optimal coefficient is selected as the final value, which realizes the minimum power ripples and fast balance of the DC-link midpoint voltage.

From the simulation and experimental results, the proposed CF-MPDPC for TPFS converter has lower harmonics and smaller power ripples than traditional MPDPC for BVSC and MPDPC for a TPFS converter, which shows good static and dynamic performance with a switching device fault. Furthermore, the dynamic experimental results of switching between inverter and rectifier mode exhibit good dynamic response when reference power is changed. Finally, the experiment of DC-link midpoint voltage-offset suppression indicates that the proposed strategy can balance the voltages of two capacitors, which is beneficial to the safe and reliable operation for BVSC in the condition of a phase fault.

5. Conclusions

This paper proposes a constant-frequency model predictive direct power control method for fault-tolerant BVSC, which improves the performance of a BVSC with a phase fault. The following conclusions can be obtained through theoretical modeling, establishment of a control strategy, and simulation and experimental results.

• Through fault-tolerant operation analysis of a TPFS structure, the output voltages in an αβ stationary frame and the corresponding voltage vectors with a phase fault were established. Then, the predictive power model and DC-link voltage offset were obtained to prepare for the control strategy.
• The CF-MPDPC method was proposed to realize direct power control based on three output vectors with constant frequency, which can more accurately track the optimal vector and reduce current harmonics. Furthermore, the balance control of DC-link capacitor voltages was also achieved to protect the converter against second faults with an electrolytic capacitor for overvoltage operations by adding the term of a DC-link center-point voltage offset into the cost function.
• From the simulation and experimental results, it can be seen that the proposed CF-MPDPC for a fault-tolerant TPFS converter outperforms the traditional MPDPC for BVSC and MPDPC for a fault-tolerant TPFS converter in both inverter mode and rectifier mode, with lower harmonics and power ripples. In addition, good performance when the reference power dynamically changed and DC-link midpoint voltage-offset suppression occurred makes the proposed CF-MPDPC strategy more applicable to fault-tolerant BVSC control with a phase fault.
• The proposed CF-MPDPC for a fault-tolerant BVSC can maintain continuous operation with low harmonic content current and stable output power in the condition of a bridge-arm fault, which enhances the reliability and fault-tolerant operation capability of BVSC.