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Article

Application of Ordinal Optimization to Reactive Volt-Ampere Sources Planning Problems

1
Department of Computer Science & Information Engineering, Yuan Ze University, Taoyuan City 32003, Taiwan
2
Department of Computer Science & Information Engineering, Chaoyang University of Technology, Taichung City 41349, Taiwan
*
Author to whom correspondence should be addressed.
Energies 2019, 12(14), 2746; https://doi.org/10.3390/en12142746
Submission received: 2 July 2019 / Revised: 15 July 2019 / Accepted: 16 July 2019 / Published: 17 July 2019
(This article belongs to the Special Issue Electric Power Systems Research 2019)

Abstract

:
Reactive volt-ampere sources planning is an effort to determine the most effective investment plan for new reactive sources at given load buses while ensuring appropriate voltage profile and satisfying operational constraints. Optimization of reactive volt-ampere sources planning is not only a difficult problem in power systems, but also a large-dimension constrained optimization problem. In this paper, an ordinal optimization-based approach containing upper and lower level is developed to solve this problem efficiently. In the upper level, an ordinal search (OS) algorithm is utilized to select excellent designs from a candidate-design set according to the system’s structural information exploited from the simulations executed in the lower level. There are five stages in the ordinal search algorithm, which gradually narrow the design space to search for a good capacitor placement pattern. The IEEE 118-bus and IEEE 244-bus systems with four load cases are employed as the test examples. The proposed approach is compared with two competing methods; the genetic algorithm and Tabu search, and a commercial numerical libraries (NL) mixed integer programming tool; IMSL Numerical Libraries. Experimental results illustrate that the proposed approach yields an outstanding design with a higher quality and efficiency for solving reactive volt-ampere sources planning problem.

1. Introduction

Reactive volt-ampere sources planning is an effort to determine the most effective investment plan for new reactive sources at given load buses while ensuring appropriate voltage profile and satisfying operational constraints [1,2]. Reactive volt-ampere source planning has been studied without paying much consideration to the time-varying characteristic of reactive power. In general, resource and transmission planners adopt a classical power factor band for the reactive power flow at grid interface points and focus on future active power demand using conventional load forecasts. Optimization of reactive volt-ampere sources planning involves optimizing the sizes of the switchable capacitors and allocation optimization. The goal of this problem is decreasing the system real losses, improving the voltage profile, and achieving the reactive power demand when the system expands. Common objective functions include the cost of the installed reactive power sources and overall system’s real losses. The switchable capacitor bank plays a crucial role in the reactive power demand, since it adjusts the reactive power injection for maintaining the local voltage profile under different loading conditions. Most power networks are public facilities, and their investment budgets need approval from the Congress. However, unavoidable budget cuts occur frequently. The reactive power installation cost is served as the objective value, and it is also regarded as an investment constraint to extract the whole available budget. Thus, the goal is to minimize the weighted sum of system losses for different loading cases subject to the following four constraints: (i) switchable capacitor constraints, (ii) investment constraints on reactive power sources of switchable capacitor banks, (iii) security constraints of all load cases, and (iv) power flow balance equations.
The considered problem is difficult to solve because the allocation and sizes of the capacitor placement are integer and discrete values, respectively. A variety of methods have been successfully employed for solving this kind of problem [3,4,5,6,7,8]. In most existing methods, the exact form does not consider the integer and discrete variables simultaneously. With the advancements in computational technologies, optimization methods including the meta-heuristic [9], swarm intelligence [10] and direct search method [11], which was developed for solving the recent reactive volt-ampere sources planning problems. Although these methods are able to handle integer, discrete and continuous variables, they are often time-consuming. Simulation optimization technique is an alternative to solve the considered problem. Simulation optimization is frequently used for searching the optimal input setting to optimize the output performance of a simulated system [12,13]. Zhu et al. proposed a mixed-integer particle swarm optimization algorithm on optimal placement of battery energy storage systems to improve power system oscillation damping, in which the New England 39-bus system and the Nordic test system were used as test examples [14]. Abdelaziz and Moradzadeh presented a parallelized implementation of NSGA-II using OpenCL to solve the multi-objective renewable DG planning problem, where the IEEE 32-bus test system and two real distribution test systems were used as test examples [15]. Roberts et al. proposed a probabilistic simulation-based multi-objective optimization approach for dimensioning robust renewable based Hybrid Power Systems, where a rural community of the Amazonian region of Brazil was used as a test example [16]. Ebrahimzadeh et al. presented a multi-objective optimization procedure based on the genetic algorithm to decide optimum design of power converter current controllers in power electronics-based systems, where a 400-MW wind farm with 100-MW aggregated strings was used as a test example [17].
We adopt the framework of simulation optimization to the reactive volt-ampere sources planning problem by two mappings: (i) the pattern of capacitor placement is regarded as an input setting; and (ii) the weighted sum of system losses for various load cases is regarded as the output performance. The framework of the proposed ordinal optimization-based approach is shown in Figure 1. The performance of a real system can be approximated as an output of the computer simulation by solving an optimal power flow (OPF)-like problem. However, the considered problem with both continues, and discrete variables belong to a type of NP-complete optimization problems due to the huge design space of the discrete control variables setting. Accordingly, it is much more difficult to solve the mixed continuous and discrete control variables optimization problems within a reasonable computation time. In addition, solving a large-scale OPF-like problem is very time-consuming because a lengthy simulation is used to evaluate the performance of a design. To overcome this drawback, an ordinal optimization-based approach containing upper and lower level is proposed for solving the reactive volt-ampere sources planning problems. An ordinal search (OS) algorithm is adopted as an optimization technique in the upper level, and a dual-type method [18,19,20] is used as the simulation tool in the lower level to solve the large-scale OPF-like problems.
There are five stages in the proposed OS algorithm, whose basic idea is to perform ranking and selection at each stage. A design vector contains all bus complex voltages, real and reactive power generations, load demands and the transformer tap ratios of all load cases. A feasible design vector must satisfy the following four constraints: switchable capacitor constraints, investment constraints on reactive power sources of switchable capacitor banks, security constraints of all load cases, and power flow balance equations. Efficiently ranking the designs in the candidate-design set at every stage is based on a model constructed by the system’s structural information exploited from the simulations. The selected excellent designs will construct the reduced candidate-design set for next stage. The OS algorithm is adopted to solve for a superior design at the last stage. The advantage of the proposed method is to reduce the required simulation time dramatically by concentrating on finding good enough designs instead of insisting on picking the best design. However, obtaining a good enough subset of designs may not be very satisfactory in some cases. The disadvantage of the proposed method is that it does not offer an absolute guarantee of the global optimality.
The first contribution of this research is to develop a simulation model for reactive volt-ampere sources planning problems, which is mapping to an optimal power flow (OPF)-like problem. The second contribution is to propose an ordinal optimization-based approach for solving the OPF-like problem, in order to determine an outstanding design in a short computational time. The third contribution is to employ the proposed approach for three network configurations with one outage, two outages and three outages in heavily load cases.
The organization of this paper is as follows. Section 2 introduces the considered problem and describes the mathematical formulation of the reactive volt-ampere sources planning with multiple load cases. Section 3 presents the OS five stages approach. In Section 4, the IEEE 118-bus and IEEE 244-bus systems are used as the examples to test the proposed ordinal optimization-based approach. We also compare the computational performance and the design quality with two competing algorithms, genetic algorithm (GA) and Tabu search (TS), and a commercial numerical libraries (NL) mixed integer programming routine, IMSL Numerical Libraries. Finally, Section 5 draws a brief conclusion.

2. Mathematical Formulation

The reactive volt-ampere sources planning problem belongs to a class of constrained multi-objective optimization problems. Objective functions utilized in this problem are usually due to the overall system’s real losses, the cost of the installed reactive power sources, or both [21,22]. In most countries, the power network is a public facility whose investment budget needs approval from the Congress. Most of the time, the overall investment budget is within a certain limit. Supposing that the cost of reactive volt-ampere sources placements is minimized; the installation cost will exceed the investment budget. Therefore, the sum of weighted system losses of various loading profiles is treated as an objective function. Meanwhile, the installation cost is treated as an investment constraint so as to exploit the entire available budget. Hence, the reactive volt-ampere sources planning problem can be formulated as follows.
min i = 1 N α i P L i subject   to   g ( x i , δ J T C J , i ) = 0 , i = 1 , , N , h ( x i ) 0 , i = 1 , , N , 0 δ w C w , i δ w C ¯ w , w J , i = 1 , , N , w J δ w ( q o w + q w C ¯ w ) M
where N is amount of load cases; x i denotes the design vector, which can be variable vector of all bus complex voltages, real and reactive power generations, load demands and the transformer tap ratios of the ith load case and are of the continuous variables; α i and P L i represent the weighting factor and overall system losses of the ith load case, respectively; g ( x i , δ J T C J , i ) = 0 represents the flow balance equations of the ith load case; h ( x i ) 0 is the security constraints on real and reactive power generations, voltage magnitude, and real power line flow; J denotes the set of candidate buses to install switchable capacitors banks; C ¯ w is the switchable capacitor banks installing at bus w, C ¯ J = ( C ¯ w , w J ) , C ¯ J ^ = ( C ¯ w , w J ^ ) ; C w , i is the part of bus w’s in load case i , C J , i = ( C w , i , w J ) , C J ^ , i = ( C w , i , w J ^ ) ; δ J = ( δ w , w J ) , if bus w is installed, then δ w = 1 , else, δ w = 0 ; qw is the cost per MVAR capacitance; qow is the installation cost at bus w; and M is the overall investment budget. The considered problem is difficult to solve because C J , i and C ¯ J belong to discrete variables while δ J = ( δ w , w J ) belong to integer variables.

3. Simulation Optimization

The key idea of the proposed OS algorithm is based on the ordinal optimization (OO) theory [23,24]. OO is not intended to replace the other optimization approaches. Instead, it is utilized to assist other optimization approaches. OO theory uses the term “order” rather than “value” to resolve the computing complexity, and provides a high probability guarantee to an outstanding design. In OO theory, a good enough or outstanding solution is defined as a solution that is among the top 3.5% of all solutions with a high probability of 0.95 [23]. This does not mean that a good enough solution is within 3.5% of the optimal cost. For many problems, a fairly large number of solutions perform close to the true optimum. In these cases, the qualitative difference among good enough polices is small and more than offset by the expense of trying to find the best solution. OO theory has been used extensively and successfully in some hard optimization problems, including network-type production line [25], flow line system [26], assemble-to-order systems [27] and pull-type production system [28].

3.1. Five Stages in the OS Algorithm

The five stages in the OS algorithm are stated below.
Stage (i): apply sensitivity theory for searching the effective locations to place capacitors.
The sensitivity theory is adopted to search for the effective locations among J to place capacitors and decide δ w , w J . Firstly, every candidate bus in J is installed with a settled 1-bank capacitor, and all components of δ J in the flow balance equations are equal to 1. Note that the purpose of this fictitious assumption is to extract the structural information of the system to assist decision about the effective locations for placing capacitors. Thus, the investment constraint and the switchable capacitors constraint in (1) can be ignored, and problem (1) can be simplified as follows.
min i = 1 N α i P L i subject   to   g ( x i , C J o ) = 0 , i = 1 , , N , h ( x i ) 0 , i = 1 , , N
where C J o denotes the capacitance vector of 1-bank capacitor at all buses w J . Thus, problem (2) can be solved by the lower level in Figure 1 so as to extract the structural information for the upper level, then the OS algorithm is used to select the effective locations. In addition, the dual-type method [18] is adopted as the simulation tool for solving (2).
Based on the sensitivity theory [29], the sensitivity of deviation for objective value of (2) caused by the increase on the capacitance C w o , w J is computed by i = 1 N g ( x i , C J o ) C w λ i , where λ i denotes the optimal Lagrange multiplier vector of load case i . If the value of i = 1 N g ( x i , C J o ) C w λ i is negative and large, then increasing C w o will decrease the overall system losses. It means that bus w has a stronger effect on lowering the objective function. Accordingly, sensitivity of cost reduction along with each candidate bus resulted from solving (2) will be provided to the upper level to rank the candidate buses in J. Details of the process are stated as follows.
First, all candidate buses w J are ranked according to the sensitivity values, i.e., i = 1 N g ( x i , C J o ) C w λ i . The smaller the sensitivity value, the higher the order. Let b 1 , , b | J | denote the ranked indices of w , w J , where | ( ) | denotes the amount of buses in (·). Thus, the bus b 1 is the highest order candidate bus. Starting from b 1 , we subtract the corresponding q o w and q w C w o from the M ,. This subtraction is proceeded until all of the investment budget is exhausted. If the subtraction is terminated at the candidate buses b l , where l | J | , then { b 1 , , b l } construct the effective buses that allocate the switchable capacitors. Furthermore, { b 1 , , b l } can be partitioned into J ^ o sets of effective candidate buses.
Stage (ii): search the refined locations through simulation and obtain the optimal continuous value of the capacitance.
In Stage (i), the sensitivity approach just roughly estimates the performance of locations for placing capacitors. In Stage (ii), a simulation approach is used to decide the refined ones from the candidate buses obtained in Stage (i). The value of δ w , w J ^ o for the refined locations is still one, while the remaining values are zero.
To achieve this target, the ready to place capacitors are assumed to be continuous values. Since there are many iterative processes between the upper level and lower level, we let J ^ : = J ^ o in the beginning. J ^ is defined as the set of the refined candidate buses to install switchable capacitor banks obtained from Stage (ii). We then set δ w = 1 , w J ^ in the flow balance equations. After subtracting q o w candidate buses in J ^ from M , problem (1) can be reformulated as follows:
min i = 1 N α i P L i subject   to g ( x i , C J ^ , i ) = 0 , i = 1 , , N , h ( x i ) 0 , i = 1 , , N , 0 C w , i C ¯ w , w J ^ , i = 1 , , N , w J ^ q w C ¯ w M r
where C J ^ , i and C ¯ J ^ are assumed to be continuous, and M r = M w J ^ q o w .
Since problem (3) belongs to the simulation level, the dual-type method [18,19,20] is utilized for solving it. Once this issue has been resolved, the obtained optimal continuous values of C ¯ J ^ are used to update J ^ and M r in the upper level. A small value of one-bank optimal continuous capacitance represents that it is ineffective to locate this capacitor. If there is any optimal continuous C ¯ w , w J , which is less than the capacitance of one bank, this set of buses, say W ’s, from J ^ will be discarded. Therefore, we can compute J ^ : = J ^ / W in (3) in the upper level. We can also calculate the value of M r in (3) by M r = M w J ^ q o w using the updated J ^ . This iterative process is repeated until the optimal value of capacitance in each bus is greater than or equal to 1-bank. The last J ^ represents the refined buses determined by Stage (ii). The value of δ w , w J ^ J ^ o , is still one, while the remaining values are zero. The obtained optimal continuous design of C ¯ J ^ and C J ^ , i , for (3) with the most updated J ^ and M r , are denoted by C ¯ J ^ c and C J ^ , i c , i = 1 , , N , respectively, and the corresponding optimal x i , i = 1 , , N are denoted as x i c , i = 1 , , N . We denote x i c and λ i c as the optimal x i and vector of optimal Lagrange multiplier for the flow balance equations of the i th load case in the continuous version of optimal capacitance value determination problem (3), respectively.
Stage (iii): choose the s excellent discrete capacitors placement patterns using a rough model of (1).
Although the values of optimal C ¯ J ^ c and C J ^ , i c resulted from Stage (ii) are continuous, their adjacent discrete values may be viewed as good discrete designs. However, there are totally 2 | J ^ | combinations of the adjacent discrete patterns for placing switchable capacitors. Let C ¯ J ^ d ( l ) represent the l th discrete pattern vector, l = 1 , , 2 | J ^ | , where C ¯ J ^ d ( l ) = ( C ¯ w d ( l ) , w J ^ ) , so that C ¯ w d ( l ) = C ¯ w c ⎤ or C ¯ w c , w J ^ . However, merely the discrete patterns C ¯ J ^ d ( l ) satisfying the investment constraint are feasible. Assuming there are K ( 2 | J ^ | ) feasible patterns satisfying the investment constraint, these K patterns are denoted as C ¯ J ^ d ( l j ) , l j = 1 , , K . What needs to be further clarified is the part of C ¯ w d ( l j ) utilized in load case i , which will influence the value of α i P L i . To assess the performance of a discrete pattern C ¯ J ^ d ( l j ) , we have to consider all the possible selections of switchable capacitors C J ^ , i d , i = 1 , , N corresponding to that pattern and determine the one that can achieve the optimal objective value, which will be taken as the performance of the given C ¯ J ^ d ( l ) . However, choosing the best C J ^ , i d , i = 1 , , N is another combinatorial problem. Thus, we will determine an exceptional choice instead of the best as addressed in [20]. First, we evaluate the exceptional selections of C J ^ , i d , i = 1 , , N for a given C ¯ J ^ d . Next, we calculate the minimal deviation concerning the objective value caused by the deviations of C ¯ J ^ d and C J ^ , i d , i = 1 , , N from the optimal continuous values of C ¯ J ^ c and C J ^ , i c , i = 1 , , N for (3). The detail processes are stated as follows.
(1) Evaluate the exceptional selections within C J ^ , i d , i = 1 , , N for a given C ¯ J ^ d ( l j )
Firstly, the discrete values for closest left and right side of C w , i c are denoted as C w , i c and C w , i c , respectively. Consider a discrete capacitor placement pattern, C ¯ J ^ d ( l j ) , load case i has at most 2 | J ^ | exceptional selections of the adjacent discrete values of C J ^ , i c . We let G i ( l j ) represent the number of acceptable exceptional selections of C J ^ , i d for load case i such that G i ( l j ) 2 | J ^ | . Then, the total amount of exceptional selections of C J ^ , i d , i = 1 , , N is G 1 ( l j ) × × G N ( l j ) . We let C J ^ , i d ( m ) , i = 1 , , N represent the m th choice of C J ^ , i d , i = 1 , , N , where 1 m G 1 ( l j ) × × G N ( l j ) . We define Δ C ( l j , m ) = ( Δ C J ^ , 1 ( m ) , , Δ C J ^ , N ( m ) ) as the deviation of the m th discrete capacitor ( C J ^ , 1 d ( m ) , , C J ^ , N d ( m ) ) from the optimal continuous ( C J ^ , 1 c , , C J ^ , N c ) , where Δ C J ^ , i ( m ) = C J ^ , i d ( m ) C J ^ , i c , i = 1 , , N . Details of the minimal deviations concerning the objective values of (3) caused by the total deviation Δ C ( l j , m ) for a given C ¯ J ^ d ( l j ) are stated below.
(2) Compute the minimal deviations concerning the objective value caused by all deviations Δ C ( l j , m ) , m = 1 , , G 1 ( l j ) × × G N ( l j ) .
Consider a given C ¯ J ^ d ( l j ) , the deviation concerning the objective value caused by all deviations of capacitance values Δ C ( l j , m ) , denoted by i = 1 N α i Δ P L i | Δ C ( l j , m ) , is calculated by the sensitivity theory.
i = 1 N α i Δ P L i | Δ C ( l j , m ) i = 1 N λ i c T [ g ( x i , C J ^ , i c ) C J ^ , i Δ C J ^ , i ( m ) ] .
The minimization problem concerning the deviations i = 1 N α i Δ P L i | Δ C ( l j , m ) caused by the Δ C ( l j , m ) is formulated as follows.
min m i = 1 N α i Δ P L i | Δ C ( l j , m ) .
We define m ( l j ) = arg { min m i = 1 N α i Δ P L i | Δ C ( l j , m ) } and denote the minimum objective value of (5) by i = 1 N α i Δ P L i | Δ C ( l j , m ( l j ) ) .
Since no discrete pattern can achieve a better objective value than the optimal values of C ¯ J ^ c and C J ^ , i c , i = 1 , , N , thus i = 1 N α i Δ P L i | Δ C ( l j , m ( l j ) ) 0 for any deviation Δ C ( l j , m ( l j ) ) . In fact, the smaller the i = 1 N α i Δ P L i | Δ C ( l j , m ( l j ) ) is, the better the discrete pattern ( C ¯ J ^ d , C J ^ , i d ( m ( l j ) ) , i = 1 , , N ) will be. Thus, by the aid of i = 1 N α i Δ P L i | Δ C ( l j , m ( l j ) ) , we are ready to choose the top s patterns.
(3) Choosing the top s patterns.
The K feasible patterns C ¯ J ^ d ( l j ) , j = 1 , , K are ranked based on the i = 1 N α i Δ P L i | Δ C ( l j , m ( l j ) ) from the smallest to the largest. The former s ( C ¯ J ^ d ( l j ) ) patterns are selected as the excellent discrete capacitor placement patterns, which are denoted as C ¯ J ^ d ( l r ) , l r = 1 , , s . The corresponding switchable capacitors for load case i , are denoted as C J ^ , i d ( m ( l r ) ) .
Stage (iv): determine the top k from the s patterns using a quadratic approximation model of (1).
Suppose each candidate bus may install 1 to p banks, the original candidate-design set will consist of p | J | patterns. Provided that p = 3 and |J|=20, then p | J | 3 × 10 9 . This means the size of the candidate-design set has reduced from 3 × 10 9 to s ( = 35 ) up to present stage. However, evaluating these s patterns using an accurate model of (1) is still time-consuming. According to [20], a quadratic approximation model of (1) is used to assess these s patterns, and the top k , say 3, patterns would contain the superior design. Because the s discrete patterns, C ¯ J ^ d ( l r ) , l r = 1 , , s , and the corresponding C J ^ , 1 d ( m ( l r ) ) , , C J ^ , N d ( m ( l r ) ) , l r = 1 , , s , resulted from Stage (iii) have satisfied the investment and switchable capacitors constraints, the following quadratic approximation model of (1) is adopted to assess the s patterns.
min i = 1 N α i [ Δ x i T 2 P L i x i 2 | x i = x i c Δ x i + P L i x i | x i = x i c Δ x i ] subject   to   g ( x i , C J ^ , i d ( m ( l r ) ) ) + g x i | x i = x i c Δ x i = 0 , i = 1 , , N , h ( x i ) + h x i | x i = x i c Δ x i 0 , i = 1 , , N
where the switchable capacitors and ready to place capacitors for all load cases in (1) are settled at C ¯ J ^ d ( l r ) and ( C J ^ , 1 d ( m ( l r ) ) , , C J ^ , N d ( m ( l r ) ) ) , and the quadratic approximation is assessed at x c = ( x 1 c , , x N c ) . The dual-type method proposed in [18,19,20] is used for solving (6), since the quadratic approximation model in (6) is a quadratic programming problem. Let Δ x * ( l r ) represent the optimal design of (6), then x ^ ( l r ) = x c + Δ x * ( l r ) is an approximate design of (1) under the given C ¯ J ^ d ( l r ) and the corresponding ( C J ^ , 1 d ( m ( l r ) ) , , C J ^ , N d ( m ( l r ) ) ) . Furthermore, i = 1 N α i P L i ( x ^ ( l r ) ) denotes the corresponding approximate objective value. The top k ( C ¯ J ^ d ( l r ) ) patterns with smaller approximate objective values i = 1 N α i P L i ( x ^ ( l r ) ) , l r = 1 , , s are selected for next stage.
Stage (v): employ the accurate model to assess the k patterns resulted from Stage (iv) and determine the superior design of (1).
The top k capacitors placement patterns selected in Stage (iv) are denoted as C ¯ J ^ d ( l n ) , l n = 1 , , k , whose switchable capacitors for load case i are denoted as C J ^ , i d ( m ( l n ) ) . Because the top k discrete patterns C ¯ J ^ d ( l n ) and the corresponding ( C J ^ , 1 d ( m ( l n ) ) , , C J ^ , N d ( m ( l n ) ) ) have satisfied the investment and switchable capacitors constraints, the following accurate model of (1) is adopted to assess the k patterns.
min i = 1 N α i P L i subject   to   g ( x i , C J ^ , i d ( m ( l n ) ) = 0 , i = 1 , , N , h ( x i ) 0 , i = 1 , , N .
The dual-type method is employed for solving the OPF of multiple load cases shown in (7).
Let min i = 1 N α i P L i * ( l n ) represent the optimal objective value of (7) for C ¯ J ^ d ( l n ) and ( C J ^ , 1 d ( m ( l n ) ) , , C J ^ , N d ( m ( l n ) ) ) . Let l n * = arg { min l n i = 1 N α i P L i * ( l n ) } , thus C ¯ J ^ d ( l n * ) is the superior capacitor placement pattern, and C J ^ , i d ( m ( l n * ) ) is the superior part of discrete switchable capacitors for load case i .

3.2. Flow Diagram of the Ordinal Search (OS) Algorithm

The flow diagram of the OS algorithm is displayed in Figure 2. In the lower level, the simulation tool utilized to solve (2) in Stage (i), solving (3) in Stage (ii), solving (6) in Stage (iv) and solving (7) in Stage (v) is the dual-type method [18].

4. Experiment Results

4.1. Test Examples and Results

The IEEE 118-bus and IEEE 244-bus systems with four load cases are employed as the test examples. The size of a bank was 14.4 MVAR. The upper limit of capacitor banks for capacitors was 3, which can be coded using two bits. The cost of installation and switchable capacitor bank were $1000 and $900 USD, respectively. There are five cases of investment budget, which are M = $40,000, $50,000, $60,000, $70,000 and $80,000 USD. The weighting factor α i was equal to 1 for load cases i = 1 , , 4 . The values of s and k in Stages (iii) and (iv) were set to be 35 and 3, respectively. The simulation experiment was coded in C++ in Microsoft Visual Studio 2013 and implemented on an Intel Core i7, 4.6 GHz CPU, 8 GB RAM desktop computer.
Table 1 and Table 2 show the simulation results of the superior capacitor placement patterns for five investment cases. Column 2 presents the actual amount of investment (installation costs). Columns 3 and 4 display the system losses and the consumed CPU time, respectively. Column 5 displays the number of candidate buses in J ^ resulted from Stage (ii) of the proposed approach. Figure 3 and Figure 4 display the objective value corresponding to the investment budget for five investment cases. The more the investment budget, the lower the real power loss. The reactive volt-ampere sources installing to the system not only compensate the reactive power, but also reduce the power losses. Test results of reactive volt-ampere locations and size on the IEEE 118-bus [30] and 244-bus systems [31] are shown in Table 3 and Table 4, respectively.
Test results further demonstrate that the proposed approach gradually narrows the design space to search for a good capacitor placement pattern. In addition, the random selection is used to select the candidate location on the same test system, whose results are also shown in Table 5 and Table 6. Test result without capacitors are also shown in Table 5 and Table 6. Column 4 shows the power loss reduced rates, and it reveals that the proposed approach yields a good capacitor placement pattern.

4.2. Comparison with the Competing Methods

To demonstrate the computing efficiency of the proposed method, two heuristic methods, GA and TS methods were utilized to solve the IEEE 118-bus system under the same five investment cases.
In the GA, a binary coding scheme was used to express the feasible capacitors placement patterns and the related switchable capacitors used in all load cases. The population size was 30. Roulette wheel selection was employed to select parents from mating pool for crossover. A two-point crossover with a crossover rate 0.7 was utilized, and the generated offspring will replace the parents in the mating pool. A mutation with rate 0.02 was performed on each resulted individual in the mating pool [32]. The fitness of each individual was evaluated by the dual-type method for solving the continuous OPF of multiple load cases. The points marked by “Δ” in Figure 5 represent the progression of the best-so-far objective values versus the consumed CPU time for the GA applied to the investment case 1. The point marked by “∗” represents the objective value and the consumed CPU times resulted from the proposed approach. GA consumed about 150 times of the CPU time consumed by the proposed approach, whose corresponding best-so-far objective value was 21% more than our approach. In Figure 5, the points marked by “□” represent the progression of the best-so-far objective value versus the consumed CPU time for the TS. When the TS consumed about 150 times of the CPU time consumed by the proposed approach, its best-so-far objective value is still 32% more than our approach.
The remainder of the four investment cases were also tested using both methods with the dual-type method. They were terminated when they consumed around 150 times of the CPU time consumed by the proposed approach. Experiment results are shown in Table 7 and Table 8, respectively. The percentages of objective value reduction are shown in columns 4 of Table 7 and Table 8. Accordingly, the computational efficiency and objective reduction are significance of the proposed method with respect to the two heuristic methods, GA and TS, which were utilized to solve the IEEE 118-bus system under the same five investment cases.
Finally, with an existing benchmark commercial NL mixed integer programming tool, we compared the International Mathematics and Statistics Library (IMSL) Numerical Libraries [33]. The IMSL C Numerical Library 2016.1 was utilized to solve the same investment cases on the seven IEEE systems, which are the IEEE 6-bus, 9-bus, 11-bus, 30-bus, 57-bus, 118-bus and 244-bus systems. Test results are shown in Table 9. No result is obtained with the IMSL for the IEEE 118-bus and 244-bus system because of the large memory requirement. The proposed approach is 84.21 times faster than IMSL for the IEEE 57-bus system and experiences an exponential growth of speed-up ratio when the system size is increased.

4.3. Multiplicity of Configurations

To test the performance due to outages, the proposed ordinal optimization-based approach was applied for different network configurations of the IEEE 118-bus system. Firstly, we calculated the power flows of all transmission lines in heavily load cases and selected the top four lines (Lines 14-15, 23-32, 62-66 and 101-102) with large power flows, as indicated in Table 10. Secondly, we applied the proposed approach for three network configurations with one outage, two outages and three outages in heavily load cases. The obtained objective values for three different network configurations are shown in Table 10, Table 11 and Table 12. Column 2 of Table 10, Table 11 and Table 12 show the objective values without outage. Columns 3 to 6 in Table 10, Table 11 and Table 12 show the objective values of four cases with one outage, two outages and three outages, respectively. Test results show that the objective values of new network configurations slightly increase for all cases. Actually, the proposed ordinal optimization-based approach for solving (1) can work properly for different network configurations, except for the incremental objective values.

4.4. Discussion About System Losses and Actual Investment

The classical objective function is formulated as
min { System Losses + ( 1 / K e ) × Actual Investment }
where Ke denotes energy cost per unit ($/Kwh) and actual investment is of the installation costs.
Based on the consideration of the investment budget shown in Table 1, Figure 6 shows the relationship between the system losses and the installation costs (actual investment) of various budget examples of investment on the IEEE 118-bus system. From Figure 6, the system losses are dropping by way of linearity with the increase of the installation costs. More simulations are run for various budgets from M = $30,000 to $150,000. Test results are shown in Figure 7. When the installation costs rise to a certain degree, system losses will not drop continually.
As Ke is large, the optimal design of the classical objective function is located in the turning point of Figure 7, which is the objective value of system losses with the budget M = $80,000. When energy is shortage and the price of electricity is very high, we can disregard the installation costs. Details of the analyses and test results (~M = $90,000) are shown in Table 13, in which “∗” represents the optimal design of classical goal function under constant Ke and different Ke corresponds to different installation costs in the optimal designs of classical objective function. From the above discussions, this work not only obtains the optimal budget efficiently, but also provides the decision maker integrated and circumspect suggestion.

5. Conclusions

Reactive volt-ampere sources planning problems is difficult to solve due to involving integer variables concerning the placement locations and discrete variables on the number of capacitors banks to be installed. An ordinal optimization-based approach is developed to solve the sources planning problem in this work. The proposed approach is efficient in the algorithmic aspects and has some special features: (i) simulation model is from very crude to accurate one within the five ordinal search (OS) stages; (ii) each simulation model is mapping to a continuous-variable OPF; and (iii) the system’s structural information exploited from lower level assists the upper level to determine excellent designs from the candidate-design set. The IEEE 118-bus and IEEE 244-bus systems are adopted as the examples to test the proposed approach. To compare the computational performance and the design quality, the proposed approach is compared with GA, TS and IMSL Numerical Libraries. Experiment results reveal the high computational efficiency and the solid quality of the obtained superior design. However, the disadvantage of the proposed method is that it does not offer an absolute guarantee of the global optimality. The ordinal optimization-based approach is not limited to the two test examples. Indeed, it can apply to extremely complex and very large-scale network systems. In the future works, the parallel processing technique within asynchronous computing can be used to solve the extremely complex and very large-scale network systems. Based on the characteristics of timesharing and partitioned processing, each area has its own load conditions and the corresponding networks for different time period.

Author Contributions

W.-T.L. designed the experiments and performed the simulations; S.-C.H. developed the methodology and wrote the paper; C.-F.L. contributed to the writing and editing of this manuscript.

Funding

This research work is supported in part by the Ministry of Science and Technology in Taiwan, R.O.C., under Grant MOST108-2221-E-324-018.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. The framework of the ordinal optimization-based approach.
Figure 1. The framework of the ordinal optimization-based approach.
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Figure 2. Flow diagram of the ordinal search algorithm.
Figure 2. Flow diagram of the ordinal search algorithm.
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Figure 3. The objective values vs. budget on the IEEE 118-bus system for each of these investment examples.
Figure 3. The objective values vs. budget on the IEEE 118-bus system for each of these investment examples.
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Figure 4. The objective values vs. budget on the IEEE 244-bus system for each of these investment examples.
Figure 4. The objective values vs. budget on the IEEE 244-bus system for each of these investment examples.
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Figure 5. The progressions of the best-so-far objective values versus the consumed CPU time.
Figure 5. The progressions of the best-so-far objective values versus the consumed CPU time.
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Figure 6. Relationship between the system losses and installation costs of various budget examples of investment on the IEEE 118-bus system.
Figure 6. Relationship between the system losses and installation costs of various budget examples of investment on the IEEE 118-bus system.
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Figure 7. Relationship between the system losses and various budget examples of investment on the IEEE 118-bus system.
Figure 7. Relationship between the system losses and various budget examples of investment on the IEEE 118-bus system.
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Table 1. Results of the proposed approach on the IEEE 118-bus system.
Table 1. Results of the proposed approach on the IEEE 118-bus system.
Budget M ($)Actual Investment ($)Objective Values O1 (MW)CPU Time (seconds) | J ^ |
40,00037,10066.12281.6511
50,00048,20058.88671.6814
60,00059,30052.96941.7817
70,00064,90049.55241.7919
80,00076,00048.12051.8222
Table 2. Results of the proposed approach on the IEEE 244-bus system.
Table 2. Results of the proposed approach on the IEEE 244-bus system.
Budget M ($)Actual Investment ($)Objective Values O1 (MW)CPU Time (seconds) | J ^ |
40,00039,800138.33247.5611
50,00048,100124.72317.7413
60,00059,200114.95308.2216
70,00069,500109.07378.3020
80,00079,600107.18018.4522
Table 3. Reactive volt-ampere locations and installed banks of the IEEE 118-Bus system.
Table 3. Reactive volt-ampere locations and installed banks of the IEEE 118-Bus system.
Budget M ($)40,00050,00060,00070,00080,000
Location no.Bus no.Installed BanksBus no.Installed BanksBus no.Installed BanksBus no.Installed BanksBus no.Installed Banks
1113113113113113
2192192193193193
3232233233233233
4273273273273273
5373373373373373
6563563563563563
7622622622622623
8773773773773773
9923923923923923
10962963963963963
1110631063106310631063
1252525253
13642643643643
14883883883883
15702702703
16683683683
17105210521052
18122122
19512512
20482
21752
221102
Table 4. Reactive volt-ampere locations and installed banks of the IEEE 244-Bus system.
Table 4. Reactive volt-ampere locations and installed banks of the IEEE 244-Bus system.
Budget M ($)40,00050,00060,00070,00080,000
Location no.Bus no.Installed BanksBus no.Installed BanksBus no.Installed BanksBus no.Installed BanksBus no.Installed Banks
1303303303303303
2513513513513513
3613613613613613
4773773773773773
5913913913913913
6923923923923923
711131113111311131113
816621663166316631663
921632163216321632163
1022532253225322532253
1122732273227322732273
12793793793793
132362236323632363
14131313
15102310231023
16106310631063
1718921893
1822412243
19532533
2017321733
211302
222092
Table 5. Results for each candidate matter of M = 80,000 case on the IEEE 118-bus system.
Table 5. Results for each candidate matter of M = 80,000 case on the IEEE 118-bus system.
MethodsObjective Values O1 (MW)Actual Investment ($)Power Loss Reduced Rate
Without capacitors113.78120
Random selection72.830076,00035.99%
Proposed approach48.120576,00057.71%
Table 6. Results for each candidate matter of M = 80,000 case on the IEEE 244-bus system.
Table 6. Results for each candidate matter of M = 80,000 case on the IEEE 244-bus system.
MethodsObjective Values O1 (MW)Actual Investment ($)Power Loss Reduced Rate
Without capacitors227.02010
Random selection150.627879,60033.65%
Porposed approach107.180179,60052.79%
Table 7. Results on the IEEE 118-bus system using the GA.
Table 7. Results on the IEEE 118-bus system using the GA.
Budget M ($)Actual Investment ($)Objective Value OG (MW)Object. Value red. O G O I O I × 100 % CPU Time (Sec.)
40,00025,20080.015921.01%232.73
50,00028,20080.192436.18%209.50
60,00031,00078.334247.89%258.92
70,00034,60075.488052.34%250.65
80,00033,80077.913561.91%255.84
Table 8. Results on the IEEE 118-bus system using the TS.
Table 8. Results on the IEEE 118-bus system using the TS.
Budget M ($)Actual Investment ($)Objective Value OT (MW)Object. Value red. O T O I O I × 100 % CPU Time (Sec.)
40,0001860087.415232.20%209.00
50,0001120096.667364.16%206.06
60,000940099.784988.38%237.86
70,0007500101.2972104.42%202.18
80,0007500100.0942109.69%239.31
Table 9. Comparisons of the proposed approach with the IMSL numerical libraries for various IEEE systems.
Table 9. Comparisons of the proposed approach with the IMSL numerical libraries for various IEEE systems.
IEEE SystemsBudget M ($) | J ^ | Final Obj. Value (MW)CPU Time (Sec.)Speed-up Ratio (II/I)
Our App.IMSLOur App. (I)IMSL (II)
6-bus5000241.9541.950.040.133.25
9-bus7000233.6533.650.110.393.54
11-bus7000227.3227.320.121.139.41
30-bus11,000322.9722.970.248.2134.21
57-bus20,000637.0437.040.2823.5884.21
118-bus40,0001166.12-0.83--
244-bus40,00011138.33-3.78--
Table 10. Results for one outage on the IEEE 118-bus system.
Table 10. Results for one outage on the IEEE 118-bus system.
Budget
M ($)
Objective Values
O1 (MW)
Case 1
Line 14-15
Case 2
Line 23-32
Case 3
Line 62-66
Case 4
Line 101-102
40,00066.122867.302666.491866.243967.8421
50,00058.886760.723558.983160.209060.4789
60,00052.969454.584253.035955.524954.7753
Table 11. Results for two outages on the IEEE 118-bus system.
Table 11. Results for two outages on the IEEE 118-bus system.
Budget
M ($)
Objective Values
O1 (MW)
Case 1
Line 14-15
Line 23-32
Case 2
Line 23-32
Line 62-66
Case 3
Line 62-66
Line 101-102
Case 4
Line 101-102
Line 14-15
40,00066.122866.484266.112367.822068.3532
50,00058.886759.730158.949061.698562.8257
60,00052.969454.544853.324954.727156.2231
Table 12. Results for three outages on the IEEE 118-bus system.
Table 12. Results for three outages on the IEEE 118-bus system.
Budget M ($)Objective Values
O1 (MW)
Case 1
Line 14-15
Line 23-32
Line 62-66
Case 2
Line 23-32
Line 62-66
Line 101-102
Case 3
Line 14-15
Line 62-66
Line 101-102
Case 4
Line 14-15
Line 23-32
Line 101-102
40,00066.122866.675168.031268.097668.5908
50,00058.886760.329860.832362.699663.0502
60,00052.969454.379554.323856.179455.2237
Table 13. Transform the test results into the classical objective values on the IEEE 118-bus system.
Table 13. Transform the test results into the classical objective values on the IEEE 118-bus system.
Budget MActual InvestmentObjective Values (System Losses)The Classical Objective Values
(System Losses + (1/Ke) ×Actual Investment)
Ke = 10,000Ke = 2500Ke = 1667Ke = 1250Ke = 833Ke = 625
00113.7812113.7812113.7812113.7812113.7812113.7812* 113.7812
30,00029,60073.7576.7185.5991.5197.43* 109.27121.11
40,00037,10066.122869.832880.962888.3828* 95.8028110.6428125.4828
50,00048,20058.886763.706778.1667* 87.806797.4467116.7267136.0067
60,00059,30052.969458.899476.689488.5494100.4094124.1294147.8494
70,00064,90049.552456.0424* 75.512488.4924101.4724127.4324153.3924
80,00076,00048.1205* 55.720578.520593.7205108.9205139.3205169.7205
90,00076,00048.1205* 55.720578.520593.7205108.9205139.3205169.7205
“*” represents the optimal design of classical goal function.

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Lee, W.-T.; Horng, S.-C.; Lin, C.-F. Application of Ordinal Optimization to Reactive Volt-Ampere Sources Planning Problems. Energies 2019, 12, 2746. https://doi.org/10.3390/en12142746

AMA Style

Lee W-T, Horng S-C, Lin C-F. Application of Ordinal Optimization to Reactive Volt-Ampere Sources Planning Problems. Energies. 2019; 12(14):2746. https://doi.org/10.3390/en12142746

Chicago/Turabian Style

Lee, Wen-Tung, Shih-Cheng Horng, and Chi-Fang Lin. 2019. "Application of Ordinal Optimization to Reactive Volt-Ampere Sources Planning Problems" Energies 12, no. 14: 2746. https://doi.org/10.3390/en12142746

APA Style

Lee, W. -T., Horng, S. -C., & Lin, C. -F. (2019). Application of Ordinal Optimization to Reactive Volt-Ampere Sources Planning Problems. Energies, 12(14), 2746. https://doi.org/10.3390/en12142746

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