Figure 1 shows the process of designing and manufacturing a conventional power conversion system. First, the circuit design is started as shown in
Figure 1, and then the system is completed through the PCB design and fabrication. As mentioned in
Section 1, GaN devices have unwanted high frequency noise due to the GaN properties and the stray inductance components in the circuit. This increases switching losses, resulting in lower system efficiency.
To solve this, you can compensate by adding a filter. However, simply just applying a filter that removes high frequency noise without considering the characteristics of the system will not only achieve the desired results, but also slow down the dynamics of the system. This causes problems such as phase delay. It also causes faulty turn-on problem in other power conversion systems (especially, complementary output devices). Therefore, in order to solve these problems, we proposed a method for compensating the above problems in domestic papers. However, this method was not a perfect compensation method after all.
Therefore, as shown in
Figure 2, we propose a modeling method with a theoretical and mathematical using circuit analysis technique (CAT). In addition, we propose a method to improve the characteristics of power conversion system using GaN devices by analyzing the frequency response of the system and designing the filters using the results. First, separate the converter’s topology into two circuits. To do this, the capacitors coupled to input and output are separated using Miller’s theorem, and we model it as a dependent current source to reflect the operation at the gate stage as the drain stage. After that, the voltage-current relationship was derived by using the operation mode in each circuit, and the transfer function of the system was derived. The derived transfer function obtains the frequency response using an analysis tool such as MATLAB, and uses this information to design appropriate filters and predict the results. Thus we can design optimized filters and add it to the actual circuit, effectively removing high frequency noise, reducing switching losses, and increasing system efficiency. Therefore, as compared with the conventional compensation method, it is possible to ensure quick response characteristics with little phase delay of the signals.
2.1. System Modeling
Figure 3 shows a step-down converter, the most basic power conversion topology. Here, GaNFETs are modeled as FETs with stray inductance and parasitic capacitance as highlighted in blue. The sensing and control parts are not considered in this study. The gate driver can be configured with various types of drives, such as totem-pole, bootstrap, transformer-coupled, and direct drive, as shown in
Figure 3, depending on the needs and design of the circuits. However, this diversity and design freedom make up the unwanted RLC resonant circuit in the system, which may cause the unsuspected operation and noise. In
Figure 3, in order to theoretically analyze the frequency response, the parasitic capacitance are separated by the Miller effect and divided into two parts to reflect the operating characteristics. A simple concept circuit for this was shown in
Figure 4.
Conceptually, this is similar to conventional MOSFET small-signal equivalent circuits, but in contrast to finding AC components, this study separated the circuit into two parts, taking into account the circuit’s operating characteristics and the Miller effect. Therefore, we propose a method of analyzing both small and large signals at the same time and obtaining a transfer function for analyzing the frequency response. The GaN FET has fast electron moving speed and wide band gap, which is advantageous for high speed operation compared to existing FETs, and has the advantage of operating at high temperature without heat radiation design. However, compared to MOSFETs the switching is unstable due to relatively small parasitic capacitance components and low threshold voltages. These can be further exacerbated when high frequency noise components have frequencies near the resonance point in the system. Therefore, through the analysis and method proposed in this study, the frequency response analysis and filter design can be approached more theoretically and practically to ensure stable operation of the system.
Next, the circuit of a GaN FET system was modeled in two parts: the gate-source and the drain-source, from which a mathematical differential equation was derived, thereby deriving the transfer function. The frequency response of the system was analyzed using the derived transfer function, and the filter that removes the section where unnecessary response characteristics are displayed was designed. Then, the system’s response after the filter was applied was then analyzed.
To analyze the characteristics of the power conversion system using the GaN FET, the system of the step-down converter using a GaN FET was firstly modeled. As described in the introduction, the system is characterized by being unstable in a transient state due to their low turn-on threshold voltage and low parasitic capacitance. Considering this, the power conversion circuit was modeled and divided into gate and drain sources [
9,
10,
11].
Figure 5 shows how the drain source circuit was modeled as a circuit device. The operation was divided by time according to the switching operation order (from Mode 0 to 3).
Here
and
is forward transfer conductance, it is for reflecting to drain-source that the gate voltage resonated by the LC at the gate stage. Here, we used information about the current flowing, Δ
ig is defined by the component due to the voltage variation of the gate stage with the transfer conductance.
k is an adjustment gain constant, and is a proportional constant that adjusts to reflect the change of the voltage at the gate and drain stages. In
Figure 5, because the circuit was modeled the drain-source operation, the source and the components (
Vgs, Cgs, Lg and
Rg) at the gate stage are short-circuited. However, the operation due to the voltage variation of the gate stage is considered in the drain-source stage by
k·Δ
ig. In
Figure 6, a gate-source modeling circuit, uses Miller’s theorem to isolate
Cgd capacitance while bringing it to the gate stage. Here
Cds can be omitted:
Equations (1)–(4) present the differential equations by which voltage-current equations are derived for the modeled circuit upon being switched on. Please refer
Appendix A for the mathematical development process to derive the relational and transfer function equations at the time of switching off.
Appendix A will be useful for deriving the transfer function for your system by adding or removing parameters to your system that are different from those proposed in this paper. Through the above defined equation and
Appendix A, the final transfer function of the drain-source stage is defined as Equation (5):
Figure 6 shows the gate-source circuit represented as an equivalent circuit. Through this figure, the transfer function can be calculated via Equations (6)–(8) equivalently by the transfer function expansion process between the drain and the source, as calculated above. Please see
Appendix A for further details of the mathematical process. We can derive the system transfer function of gate-source circuit as Equation (9) using Equations (6)–(8) and
Appendix A:
2.2. System Response Characteristic
The system’s frequency response characteristics were calculated using the transfer function obtained in
Section 2.1. These transfer functions are Equation (5) and Equation (9). The all factors (
k1~k5 and
m1~m4) in Equation (5) and Equation (9) are derived from
Table 1 and
Appendix A.
Figure 7 shows the frequency response of the system as the
Lg changes with
Ld fixed. It can be seen that the resonance occurs at about 2.08 MHz by the currently designed
Lg. As can be seen from the table in
Figure 7, the smaller
Lg was, the larger the resonant frequency was, and the larger
Lg was, the smaller the resonant frequency was. The maximum gain on the system is the largest at 78.6 dB at about 658 kHz. Afterwards, whether
Lg is large or small, the maximum gain is reduced. Because parasitic capacitance is not controllable, it is not considered. Capacitance can be added externally, but, since this has the effect of increasing the capacitance component, the resonance frequency band is substantially lowered to the left of the graph. This results in a state where the switching becomes extremely unstable.
Figure 8 shows the frequency response characteristics of the system as the
Ld changes with
Lg fixed. In the present state,
Ld causes resonance at about 105 MHz, but the gain is –84.2 dB, which does not affect the system significantly. In particular, since it is a far away from the switching frequency band, it means that the state of
Ld does not need to be considered much. However, if the
Ld value becomes larger according to the design, the resonant frequency band of the drain-source stage is also lowered.
We can confirm this again in
Figure 7 and
Figure 8. The PCB design causes resonance due to the stray inductance component of the gate and drain stages. The smaller the stray inductance was, the more stable the system becomes. Δ
Fr_Lg and Δ
Fr_Ld in
Figure 7 and
Figure 8 represent the range of variation of the resonant frequency that can vary depending on the PCB design. Therefore, based on this result, we can also choose the method of reducing inductance, referring to
Appendix B. If this is not possible, there is a need for a way to attenuate the gain of a particular frequency band. In this paper, the band-stop filter (BSF) and low-pass filter (LPF) are used to improve the response characteristics of the system (please note that this study does not intend to discuss the characteristics of the filter, but to show that it is possible to improve the characteristics of a power conversion device utilizing GaN devices by applying the filter).
The square wave pulse width modulation (PWM) signal contains the high-frequency component. Both ideal PWM signals and PWM signals that contain noise include the high-frequency component, which will contain the signals in the frequency, the gains of which increase suddenly around the resonance point in the system. This causes system instability or large signal fluctuation upon switching. Consequently, it is necessary to lower or limit the response to this frequency component. Thus, the system’s response characteristics can be improved by combining a band-stop filter and a low-pass filter that removed the specific frequency component.
2.3. Filter Design and Response Results
The frequency response analysis results have been demonstrated that the center frequency of the resonance point was approximately 2.08 MHz. The most profound effect on switching performance is exhibited by the gate-source inductance. There are two sources for parasitic source inductance in a typical circuit, one is the bond wire neatly integrated into the FET package and another is the printed circuit board wiring inductance. Furthermore, the inductor and the parasitic capacitor form a resonant RLC circuit as we know. The resonant circuit is excited by the steep edges of the gate drive voltage waveform and it is the fundamental reason for the oscillatory spikes observed in most gate drive circuits. This resonance can be damped by series resistive components of the loop, which include the driver output impedance, the external gate resistor, and the internal gate resistor, but a reduction of the overall gain is inevitable, so effectively, to remove the resonance frequency and high-frequency signals, a band-stop filter and a low-pass filter were designed. The frequency responses are shown in
Figure 9. This figure shows the filter and system’s frequency response curve, in which the band-stop, low-pass filters and converter system, respectively.
In
Figure 10, the gain of the BSF is set to −55 dB to attenuate 52.1 dB at the 2.08 MHz frequency, and the attenuating frequency band is defined as
Fcp.
Fcp band is 1.5–2.8 MHz, about 1.3 MHz.
Fcp can be changed and adjusted according to the filter’s corner frequency, number of poles and the type of filter. The results has been showed that the gain was raised suddenly at approximately 2.08 MHz in
Figure 9 was attenuated to under 0 dB by the band-stop filter, as verified in
Figure 10.
After the system’s cut-off frequency, it was reached the response was rolled off to –20 dB/decade and then attenuated to a –120 dB/decade slope around the resonance point. Thus, an optimized filter was designed and applied to the system using the frequency response analyzed through the system modeling to improve the system’s response characteristics [
12]. The switching characteristics can be improved by reducing the switching loss of the FET.
Figure 11 shows the circuit of the designed filter and power conversion part. It is the circuit that was an active second-order band-stop filter for preventing a 2.08 MHz frequency signal, and then a low-pass filter for attenuating a response of higher frequency signal. The filter circuit may be located before and after the gate. However, based on the experimental results, it is better that it be located in front of the gate driver in terms of energy efficiency and effect (however, this is an experimental result and was not accurately analyzed).