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Article

Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter

1
College of Electrical & Information Engineering, Hunan University of Technology, Zhuzhou 412007, China
2
College of Electrical & Information Engineering, Hunan University, Changsha 410082, China
3
School of Automation, Central South University, Changsha 410083, China
*
Author to whom correspondence should be addressed.
Energies 2020, 13(15), 3884; https://doi.org/10.3390/en13153884
Submission received: 14 May 2020 / Revised: 19 June 2020 / Accepted: 19 June 2020 / Published: 30 July 2020

Abstract

:
Aiming at the problem of large magnitude and high frequency of common-mode voltage (CMV) when space vector pulse width modulation (SVPWM) is used in a three-phase motor fed by a two-level voltage source inverter, a common-mode reduction SVPWM (CMRSVPWM) is studied. In this method, six new sectors are obtained by rotating six sectors of conventional SVPWM by 30°. In odd-numbered sectors, only three non-zero vectors with odd subscripts are used for synthesis, while in even-numbered sectors, only three non-zero vectors with even subscripts are used for synthesis. The actuation durations of three non-zero vectors in each switching period in each sector are given. Simulation and experimental results show that, compared with the conventional SVPWM, the CMV magnitude of CMRSVPWM is reduced by 66.67% and the CMV frequency of CMRSVPWM is reduced from the original switching frequency to the triple fundamental frequency. At the same time, the current, torque and speed of the motor are still good.

1. Introduction

It is well known that the use of AC drives can achieve high efficiency and energy saving [1]. In AC drives, a three-phase motor fed by a two-level voltage source inverter has found widespread application [2]. At present, the dominant control strategy of the voltage source inverter is pulse width modulation (PWM) strategy. Among all the PWM methods, the space vector PWM (SVPWM) method is an advanced method due to its superior performance characteristics [3]. However, the conventional SVPWM has the problem of large magnitude and high frequency of common-mode voltage (CMV) [4]. The CMV magnitude is equal to Udc/2 (Udc is the DC bus voltage value of the inverter), and the CMV frequency is equal to the switching frequency of the inverter, from several kHz to tens of kHz [5]. The CMV with large magnitude and high frequency brings adverse effects on the drive system, such as winding insulation deterioration, shaft voltage, leakage current, electromagnetic interference, etc., and therefore in high-performance AC drives it is necessary to reduce the CMV [6,7,8].
The methods for reducing the CMV focus on hardware and software: the hardware methods are mainly to add a filter or an inverter leg, and the software methods are mainly to adopt improved modulation strategy [9,10,11,12]. The software methods do not increase the cost from hardware, and can reduce the burden of the filter. Therefore, they have excellent price performance, and are widely concerned in academia and industry [13,14]. In the software methods, it is an important research idea to improve the conventional SVPWM, which has been studied by some scholars [15,16,17]. For example, a previous paper [15] presents an “active zero state PWM (AZSPWM)” method on the basis of the conventional SVPWM. In this method, null vectors are no longer used, but some equivalent null vectors are used instead of those original null vectors. Two non-zero vectors in the opposite direction are used for synthesis, and the synthetic result is a zero vector, which is called an equivalent null vector or an active zero vector. The method introduced in a previous paper [16] is the “near state PWM (NSPWM)” method. In this method, null vectors are not used either. In each sector, in addition to using two non-zero vectors located in the sector, a non-zero vector located in the left adjacent sector or the right adjacent sector is also used to participate in synthesis. Therefore, the feature of the method is that three non-zero vectors closest to a reference vector are used for synthesis, and the synthetic result can track the reference vector. In the paper [17], a “virtual space vector modulation (VSVM)” method is presented. In each sector, two virtual non-zero vectors and two real non-zero vectors are used for synthesis. The feature of the method is that four non-zero vectors closest to the reference vector are used for synthesis. In the above SVPWM methods, the CMV magnitude can be reduced from the original Udc/2 to Udc/6, that is, reduced by 66.67%. However, the CMV frequency has not been reduced and is still equal to or close to the switching frequency of the inverter. What is more, some harmonic components of the CMV increase slightly [18]. If the frequency of these harmonic components is close to the common-mode resonance frequency of the system, the corresponding common-mode current will be significantly amplified, which is dangerous for system reliability.
Aiming at the shortcomings of the above SVPWM methods, this paper studies a common-mode reduction SVPWM (CMRSVPWM), which can not only reduce the CMV magnitude, but also reduce the CMV frequency. The correctness and validity of the method are verified by simulations and experiments.

2. Common-Mode Reduction SVPWM

2.1. Common-Mode Voltage Values of Eight Basic Vectors

The system of a three-phase motor fed by a two-level voltage source inverter is shown in Figure 1. The motor may be an asynchronous motor or a synchronous motor, therefore, only the stator winding is shown in Figure 1 while the asynchronous rotor or synchronous rotor is not. This does not affect our research, because the SVPWM is applicable to both the asynchronous motor and the synchronous motor.
The voltage umg between the star point m of the stator winding and the neutral point g of the inverter DC bus is the CMV, which can be calculated by the following formula [19].
u mg = 1 3 ( u Ag + u Bg + u Cg )
where uAg refers to the voltage between the midpoint A of the inverter A-phase leg and the neutral point g of the inverter DC bus, and the meanings of uBg and uCg are similar to uAg.
Because the waveforms of uAg, uBg and uCg are PWM waveforms, the CMV waveform consists of many pulses. The shapes of these pulses are not exactly the same. The CMV magnitude refers to the maximum absolute value of these pulses, and the CMV frequency refers to the pulse-repetition frequency of these pulses, that is, the number of pulses per second.
The inverter has eight switching states, corresponding to eight basic vectors, which are labeled V0 to V7 in Figure 2a where V0 and V7 are null vectors and the other six are non-zero vectors. According to (1), the CMV umg of these eight basic vectors can be calculated. The values have −Udc/2, −Udc/6, Udc/6, Udc/2 four species, as shown in Table 1. It can be seen from Table 1 that the CMV magnitude of the null vector V0 or V7 is the largest, thus null vectors should be avoided in order to reduce the CMV magnitude.

2.2. SVPWM by Only Using Three Non-Zero Vectors

In the conventional SVPWM, the α-β plane is divided into six sectors with six non-zero vectors as boundary, which are labeled S1 to S6 in Figure 2a [20]. In each sector, three vectors are used for voltage-second synthesis: the non-zero vector located at the beginning boundary of the sector, the non-zero vector located at the end boundary of the sector, and the null vectors V0 or V7. Due to the use of null vectors, the CMV magnitude is up to Udc/2. In comparison, in the AZSPWM, NSPWM, and VSVM, the null vectors are no longer used, therefore the CMV magnitude is reduced to Udc/6. However, although the CMV magnitude decreases, the CMV frequency does not decrease which is still almost as high as the switching frequency of the inverter.
It can be seen from Table 1 that the CMV values of V1, V3 and V5 are all −Udc/6. Therefore, if only these three non-zero vectors are used for synthesis, the CMV values will remain −Udc/6 unchanged and the CMV frequency will naturally reduce to zero. This is the so-called SVPWM by only using three non-zero vectors. With V1, V3 and V5 as the boundary, the α-β plane is divided into three sectors, which are labeled S1′ to S3′ in Figure 2b. Since the three sectors have the same shape, in each sector the voltage-second synthesis is similar. Taking in the sector S1′ as an example, in a switching period Ts, the first actuation vector is the non-zero vector V1 located at the beginning boundary of the sector S1′, the second actuation vector is the vector V3 located at the end boundary of the sector S1′, and the third actuation vector is the remaining vector V5. The activation durations T1, T3 and T5 of these three vectors are calculated by the following voltage-second balance equation [19].
{ T 1 V 1 + T 3 V 3 + T 5 V 5 = T s V ref T 1 + T 3 + T 5 = T s
where Vref is the reference vector.
By solving (2), we get the following formula [19].
{ T 1 = ( 1 3 + 2 3 V ref V cos θ ) T s T 3 = ( 1 3 + 2 3 V ref V cos ( θ 120 ) ) T s T 5 = T s T 1 T 2
where Vref is the magnitude of the reference vector; θ is the position of the reference vector, i.e., the angle between the reference vector and the beginning boundary of the sector, 0° ≤ θ ≤ 120°; V is the magnitude of the non-zero vector.
Similarly, only three non-zero vectors, V2, V4 and V6, can be used for synthesis. In this case, the CMV values remain Udc/6 unchanged and the CMV frequency is zero.

2.3. Common-Mode Reduction SVPWM

The above SVPWM by only using three non-zero vectors can reduce the CMV magnitude to Udc/6 and the CMV frequency to zero, but the maximum linear output voltage is very small, which is equal to the incircle radius r of the regular triangle in Figure 2b. While the maximum linear output voltage of the conventional SVPWM is equal to the incircle radius R of the regular hexagon in Figure 2a. After calculation, r = 0.57735 R.
In order to increase the maximum linear output voltage, the SVPWM by only using V1, V3, V5 and the SVPWM by only using V2, V4, V6 are combined to form the common-mode reduction SVPWM (CMRSVPWM). The α-β plane is divided into new six sectors, which are labeled S1″ to S6″ in Figure 3a. Comparing the six sectors in Figure 3a with those in Figure 2a, we can see that by turning the six sectors of conventional SVPWM anticlockwise by 30°, new six sectors are get. In odd-numbered sectors S1″, S3″, S5″, three non-zero vectors with odd subscripts V1, V3, V5 are used for synthesis, while in even-numbered sectors S2″, S4″, S6″, three non-zero vectors with even subscripts V2, V4, V6 are used for synthesis. The activation durations of three non-zero vectors in each switching period in each sector are similar to (3).
To better explain this point, we might as well modify (3) a little to make it universal. Let us record the first actuation vector as Vx, the second actuation vector as Vy, and the third actuation vector as Vz. The activation durations of the three vectors Vx, Vy and Vz are respectively Tx, Ty and Tz, and from (3) we get the following formula.
{ T x = ( 1 3 + 2 3 V ref V cos θ ) T s T y = ( 1 3 + 2 3 V ref V cos ( θ 120 ° ) ) T s T z = T s T x T y
where Vref, θ, and V have the same meaning as (3).
When the reference vector Vref is located in different sectors, the non-zero vectors corresponding to the first vector Vx, the second vector Vy and the third vector Vz are shown in Table 2.
The maximum linear output voltage of CMRSVPWM is equal to the inscribed circle radius ρ of the regular hexagram in Figure 3a. After calculation, ρ = 0.6667R, which is 15.47% larger than r. Therefore, the maximum linear output voltage of CMRSVPWM increases by 15.47%.
Figure 3b shows the CMV waveform of CMRSVPWM in a fundamental period (i.e., six sectors S1″ to S6″). The peak value of waveform is Udc/6 and the valley value is −Udc/6, which indicates that the CMV magnitude is Udc/6. The number of pulses in a fundamental period is 3, which indicates that the CMV frequency is equal to the triple fundamental frequency. Therefore, theoretically, both magnitude and frequency of CMV are reduced.

3. Simulations and Experiments

In order to verify the correctness and validity of the CMRSVPWM, we perform simulations and experiments using the CMRSVPWM and the conventional SVPWM and compare their results, taking a three-phase cage induction motor fed by a two-level voltage source inverter as the object.

3.1. Simulation Results

The simulation model of the object is created in MATLAB/Simulink. The simulation parameters are shown in Table 3.
The motor is controlled by using constant Volt/Hz, without considering automatic speed regulator, automatic torque regulator or automatic current regulator, so as to focus on the characteristics of SVPWM algorithm. The simulation process is as follows: the motor is started under no-load at 0 s; a 8.84 N·m load torque is applied at 0.4 s; the simulation stops at 0.8 s. The CMV simulation waveforms and their fast Fourier transform (FFT) analysis in the two methods are shown in Figure 4.
Upon comparison of Figure 4a,b we find that the CMV peak value and CMV valley value in the conventional SVPWM are 270 V and −270 V respectively, while those in the CMRSVPWM are 90 V and −90 V respectively. Therefore, the former has a CMV magnitude of 270 V, i.e., Udc/2, while the latter has a CMV magnitude of 90 V, i.e., Udc/2, which reduces the magnitude by 66.67%. This is because the former uses null vectors while the latter does not. These simulation results are consistent with the theoretical analysis.
In the upper right corner of Figure 4a, a CMV zoom figure is shown. Inspection of the figure indicates that the pulse of CMV waveform recurs once every 100 μs, which indicates the frequency is 10 kHz that equals the switching frequency of the inverter. While from Figure 4b it is apparent that the pulse of CMV waveform recurs once every 11.5 ms, which indicates the frequency is 87 Hz that equals the triple fundamental frequency (the fundamental frequency refers to that of the inverter output voltage, that is, the reference vector rotation frequency), far less than the switching frequency of the inverter.
According to the FFT analysis in Figure 4, both methods have certain third harmonic component in the CMV waveform, but because the star point of stator winding is isolated, the third harmonic current will not be generated. In addition, the conventional SVPWM has larger 10 kHz harmonics and a certain 20 kHz harmonics in the CMV waveform, while the CMRSVPWM has no high frequency harmonics.
The stator A-phase voltage simulation waveforms, their FFT analysis, and their waveforms after low-pass filtering (LPF) in two methods are shown in Figure 5.
Comparing the FFT analysis of Figure 5a,b, we can see that the fundamental (29 Hz) amplitudes of A-phase voltage in the two methods are 180.2 V and 179.7 V respectively, which is consistent with the theoretical value of 180 V. The total harmonic distortion (THD) for A-phase voltage in the CMRSVPWM is higher than that in the conventional SVPWM, which is due to the A-phase voltage waveform symmetry in the CMRSVPWM is slightly lower than that in the conventional SVPWM in each switching period. Comparing the A-phase voltage uAm after LPF of Figure 5a,b, we can see that the waveforms in the two methods are basically the same, both of which are sine waves with an amplitude of 180 V. Therefore, the winding voltages in the two methods are basically the same in the low frequency band, only different in the high frequency band.
Under the supply of the winding voltages, the simulation results of stator flux, stator currents, electromagnetic torque and rotor speed are basically the same in the two methods, as shown in Figure 6. This is because the stator windings are inductive load and the rotors have rotational inertia, even if the winding voltages in the two methods are different in the high frequency band, the responses in the two methods will be identical as long as both the winding voltages are identical in the low frequency band.
The simulation results above show that the CMRSVPWM can effectively reduce the magnitude and frequency of CMV, while other performance indexes have not declined, which is basically the same as the conventional SVPWM.

3.2. Experimental Results

The experiment parameters are the same as the simulation parameters, shown in Table 3. The motor is also controlled by using constant Volt/Hz. The experimental process is similar to the simulation process: the motor is started under no-load at 0 s; a 8.84 N·m load torque is applied at 40 s; the experiment stops at 80 s. The inverter DC bus of the experimental device is composed of two identical capacitors in series, as shown in Figure 1. The voltage between the midpoint g of two series capacitors and the star point m of the stator winding measured by a high-voltage differential probe of the oscilloscope is the CMV. The CMV experimental waveforms and their FFT analysis in the two methods are shown in Figure 7.
Comparing the CMV waveforms of Figure 7a,b, we can see that the peak values and the valley values in the two methods are consistent with the simulation results. Comparison of their FFT analysis show that the CMV in the conventional SVPWM has high-frequency harmonics, of which 10 kHz harmonics root-mean-square (RMS for short in Figure 7) is large; while the CMV in the CMRSVPWM has almost no high-frequency harmonics. Figure 7c shows a horizontal magnification of Figure 7a. The diagram shows that the pulse of CMV waveform recurs once every 100 μs, which means the frequency is 10 kHz. While Figure 7b shows that the pulse of CMV waveform recurs once every 11.5 ms, accordingly, the frequency is 87 Hz that is only three times as much as the reference vector rotation frequency.
The experimental waveforms of stator line voltage after low-pass filtering (LPF), stator phase current, electromagnetic torque and rotor speed in the two methods are basically the same, as shown in Figure 8.
Figure 8a,b show the stator line voltages uAB and uBC after LPF in two methods. They are all sine waves with an amplitude of about 310 V, a frequency of 29 Hz, a phase difference of 120°. There is no low-order harmonic such as 3rd, 5th, 7th. Figure 8c,d show the stator phase current iA and iB in steady state after loading in two methods. They are all sine waves with an amplitude of about 3.8 A, a frequency of 29 Hz, a phase difference of 120°. There is also no low-order harmonic such as 3rd, 5th, 7th. Figure 8e,f show the electromagnetic torque and rotor speed before and after loading in two methods. The transition process is about 150 ms, and the steady state torque and steady state speed are very stable. In addition, due to the open-loop experiments, there is a speed drop, and a speed feedback control can reduce or eliminate the speed drop.
It is worth pointing out that in the speed feedback control system, using SVPWM based on model predictive control (MPC) to reduce the CMV is an important method, which is suitable for both voltage source inverters and current source inverters [12,14,21]. In addition, it is also the important methods for CMV reduction to modify the traditional selected harmonic elimination PWM (SHEPWM) and the traditional sinusoidal PWM (SPWM) [22,23]. Table 4 provides a feature summary of five PWM methods: virtual space vector modulation (VSVM) [17], CMRSVPWM studied in this paper, model prediction control SVPWM (MPC-SVPWM for short in Table 4) [12], modified SHEPWM [22], and modified SPWM [23]. Performance indexes considered include the CMV magnitude, the CMV frequency, the CMV third harmonic, the maximum linear output voltage, the number of switching in a switching period, the stator phase voltage THD, and the algorithm complexity. It can be seen from Table 4 that all five methods can reduce the CMV magnitude to Udc/6. The significant advantage of VSVM is that not only the CMV magnitude is reduced but also the CMV third harmonic is eliminated, which helps to reduce the size and cost of the common mode filter, especially in medium voltage electric drives. Another advantage of VSVM is that the number of switching is the least in the five methods, therefore the switching losses are the lowest. The third advantage of VSVM is its low algorithm complexity. The disadvantages of VSVM are that the maximum linear output voltage decreases and the stator phase voltage THD is higher. The advantage of CMRSVPWM lies in its ability to reduce both the CMV magnitude and the CMV frequency. The CMV frequency in CMRSVPWM is only three times the fundamental frequency, while that in other four methods is close to the switching frequency. The disadvantages of CMRSVPWM are that the CMV third harmonic are not eliminated and the maximum linear output voltage is the lowest. To increase the maximum linear output voltage, overmodulation techniques can be tried. The advantages of MPC-SVPWM are that the maximum linear output voltage is the highest and the stator phase voltage THD is the lowest. Its disadvantages are that the CMV third harmonic are not eliminated and the algorithm complexity is higher. In the modified SHEPWM, although the CMV third harmonic can be eliminated through some specified calculation, the algorithm complexity is the highest in the five methods, and the maximum linear output voltage is the lowest. In the modified SPWM, whether the CMV third harmonic can be eliminated depends on the modulation wave, and both the stator phase voltage THD and the algorithm complexity are high.
The above experimental results show that the CMRSVPWM can reduce the magnitude and frequency of CMV with effect. Meanwhile, the CMRSVPWM can keep as good performance as the conventional SVPWM in line voltage, phase current, electromagnetic torque and rotor speed of the motor. The simulation and experimental results verified the studied CMRSVPWM method.

4. Conclusions

In order to reduce the CMV magnitude and the CMV frequency in the three-phase motor fed by the two-level voltage source inverter, the CMRSVPWM is studied, and the simulations and experiments are carried out in this paper. The main conclusions are as follows:
(1) Compared with the conventional SVPWM, the CMV magnitude in the CMRSVPWM is reduced from the original Udc/2 to Udc/6, that is, reduced by 66.67%, and the CMV frequency is reduced from the original switching frequency to three times the fundamental frequency. Therefore, both the CMV magnitude and the CMV frequency are effectively reduced. While the line voltage, phase current, electromagnetic torque and rotor speed of the motor are still in good performance.
(2) The maximum linear output voltage of the CMRSVPWM is 66.67% of that of the conventional SVPWM, but increases by 15.47% compared with the SVPWM by only using three non-zero vectors. The further research on the CMRSVPWM overmodulation will be carried out to improve the maximum voltage output capability.

Author Contributions

Funding acquisition and conceptualization, K.H.; Methodology, J.Z.; Resources, S.L.; Software, Q.L.; Writing—original draft, M.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by National Natural Science Foundation of China under Project 51777064, 51977072 and National Key Research and Development Program of China under Project 2018YFB0606005.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. The system of a three-phase motor fed by a two-level voltage source inverter.
Figure 1. The system of a three-phase motor fed by a two-level voltage source inverter.
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Figure 2. Conventional SVPWM and SVPWM by only using three non-zero vectors. (a) Conventional SVPWM; (b) SVPWM by only using three non-zero vectors.
Figure 2. Conventional SVPWM and SVPWM by only using three non-zero vectors. (a) Conventional SVPWM; (b) SVPWM by only using three non-zero vectors.
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Figure 3. Common-mode reduction SVPWM and common-mode voltage waveform. (a) Common-mode reduction SVPWM; (b) Common-mode voltage waveform in a fundamental period.
Figure 3. Common-mode reduction SVPWM and common-mode voltage waveform. (a) Common-mode reduction SVPWM; (b) Common-mode voltage waveform in a fundamental period.
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Figure 4. Common-mode voltage simulation waveforms and their FFT analysis in two methods. (a) Conventional SVPWM; (b) CMRSVPWM.
Figure 4. Common-mode voltage simulation waveforms and their FFT analysis in two methods. (a) Conventional SVPWM; (b) CMRSVPWM.
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Figure 5. Stator A-phase voltage simulation waveforms, their FFT analysis, and their waveforms after low-pass filtering (LPF) in two methods. (a) Conventional SVPWM; (b) CMRSVPWM.
Figure 5. Stator A-phase voltage simulation waveforms, their FFT analysis, and their waveforms after low-pass filtering (LPF) in two methods. (a) Conventional SVPWM; (b) CMRSVPWM.
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Figure 6. Simulation waveforms of flux, current, torque and speed in two methods. (a) Stator flux trajectory in conventional SVPWM; (b) Stator flux trajectory in CMRSVPWM; (c) Stator currents in conventional SVPWM; (d) Stator currents in CMRSVPWM; (e) Electromagnetic torque in conventional SVPWM; (f) Electromagnetic torque in CMRSVPWM; (g) Rotor speed in conventional SVPWM; (h) Rotor speed in CMRSVPWM.
Figure 6. Simulation waveforms of flux, current, torque and speed in two methods. (a) Stator flux trajectory in conventional SVPWM; (b) Stator flux trajectory in CMRSVPWM; (c) Stator currents in conventional SVPWM; (d) Stator currents in CMRSVPWM; (e) Electromagnetic torque in conventional SVPWM; (f) Electromagnetic torque in CMRSVPWM; (g) Rotor speed in conventional SVPWM; (h) Rotor speed in CMRSVPWM.
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Figure 7. Common-mode voltage experimental waveforms and their FFT analysis in two methods. (a) Conventional SVPWM; (b) CMRSVPWM; (c) Conventional SVPWM (zoom).
Figure 7. Common-mode voltage experimental waveforms and their FFT analysis in two methods. (a) Conventional SVPWM; (b) CMRSVPWM; (c) Conventional SVPWM (zoom).
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Figure 8. Experimental waveforms of stator line voltage after low-pass filtering (LPF), stator phase current, electromagnetic torque and rotor speed in the two methods. (a) Stator line voltage after LPF in conventional SVPWM; (b) Stator line voltage after LPF in CMRSVPWM; (c) Stator phase current in conventional SVPWM; (d) Stator phase current in CMRSVPWM; (e) Electromagnetic torque and rotor speed in conventional SVPWM; (f) Electromagnetic torque and rotor speed in CMRSVPWM.
Figure 8. Experimental waveforms of stator line voltage after low-pass filtering (LPF), stator phase current, electromagnetic torque and rotor speed in the two methods. (a) Stator line voltage after LPF in conventional SVPWM; (b) Stator line voltage after LPF in CMRSVPWM; (c) Stator phase current in conventional SVPWM; (d) Stator phase current in CMRSVPWM; (e) Electromagnetic torque and rotor speed in conventional SVPWM; (f) Electromagnetic torque and rotor speed in CMRSVPWM.
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Table 1. Common-mode voltage values of eight basic vectors.
Table 1. Common-mode voltage values of eight basic vectors.
V0V1V2V3V4V5V6V7
Udc/2Udc/6Udc/6Udc/6Udc/6Udc/6Udc/6Udc/2
Table 2. Three actuation vectors in each sector.
Table 2. Three actuation vectors in each sector.
SectorsThe First Vector VxThe Second Vector VyThe Third Vector Vz
S1″0° ≤ θ < 30°V5V1V3
30° ≤ θ < 60°V1V3V5
S2″0° ≤ θ < 30°V6V2V4
30° ≤ θ < 60°V2V4V6
S3″0° ≤ θ < 30°V1V3V5
30° ≤ θ < 60°V3V5V1
S4″0° ≤ θ < 30°V2V4V6
30° ≤ θ < 60°V4V6V2
S5″0° ≤ θ < 30°V3V5V1
30° ≤ θ < 60°V5V1V3
S6″0° ≤ θ < 30°V4V6V2
30° ≤ θ < 60°V6V2V4
Table 3. Simulation and experiment parameters.
Table 3. Simulation and experiment parameters.
ParametersValuesParametersValues
Inverter DC bus voltage540 VMotor stator resistance4.26 Ω
Inverter switching frequency10 kHzMotor rotor resistance3.24 Ω
SVPWM reference vector180 V/29 HzMotor stator inductance0.666 H
Motor rated power1.5 kWMotor rotor inductance0.67 H
Motor rated voltage380 V/50 HzMotor mutual inductance0.651 H
Motor moment of inertia0.02 kg·m2Motor number of pole pairs2
Table 4. Features of five PWM methods for common-mode reduction.
Table 4. Features of five PWM methods for common-mode reduction.
Performance IndexesVSVMCMR-SVPWMMPC-SVPWMModified SHEPWMModified SPWM
CMV magnitudeUdc/6Udc/6Udc/6Udc/6Udc/6
CMV frequencyClose to switching frequencyTriple fundament frequencyClose to switching frequencyClose to switching frequencyClose to switching frequency
CMV third harmonicNoYesYesNoYes/No
Maximum linear output voltage0.8667 R0.6667 RR0.6667 R0.8667 R
Number of switching in a switching period68888
Stator phase voltage THDHighHighLowLowHigh
Algorithm complexityLowLowHighHighHigh

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MDPI and ACS Style

Zheng, J.; Lyu, M.; Li, S.; Luo, Q.; Huang, K. Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter. Energies 2020, 13, 3884. https://doi.org/10.3390/en13153884

AMA Style

Zheng J, Lyu M, Li S, Luo Q, Huang K. Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter. Energies. 2020; 13(15):3884. https://doi.org/10.3390/en13153884

Chicago/Turabian Style

Zheng, Jian, Mingcheng Lyu, Shengqing Li, Qiwu Luo, and Keyuan Huang. 2020. "Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter" Energies 13, no. 15: 3884. https://doi.org/10.3390/en13153884

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