Hybrid DC-DC Converter with Low Switching Loss, Low Primary Current and Wide Voltage Operation

Abstract

A full-bridge converter with an additional resonant circuit and variable secondary turns is presented and achieved to have soft-switching operation on active devices, wide voltage input operation and low freewheeling current loss. The resonant tank is linked to the lagging-leg of the full bridge pulse-width modulation converter to realize zero-voltage switching (ZVS) characteristic on the power switches. Therefore, the wide ZVS operation can be accomplished in the presented circuit over the whole input voltage range and output load. To overcome the wide voltage variation on renewable energy applications such as DC wind power and solar power conversion, two winding sets are used on the output-side of the proposed converter to obtain the different voltage gains. Therefore, the wide voltage input from 90 to 450 V (V_in,max = 5V_in,min) is implemented in the presented circuit. To further improve the freewheeling current loss issue in the conventional phase-shift pulse-width modulation converter, an auxiliary DC voltage generated from the resonant circuit is adopted to reduce this freewheeling current loss. Compared to the multi-stage DC converters with wide input voltage range operation, the proposed circuit has a low freewheeling current loss, low switching loss and a simple control algorithm. The studied circuit is tested and the experimental results are demonstrated to testify the performance of the resented circuit.

1. Introduction

For the elimination of the air pollution and emission of greenhouse gases, clean renewable energy sources with power electronic techniques have been investigated and developed for fuel cell [1,2], wind power [3,4], solar power [5,6] and battery storage system [7] applications. Solar power [8,9] is one of the most attractive clean energy sources. However, the problem of the solar panel output voltage is unstable. To solve this problem, DC-DC pulse-width modulation (PWM) converters with wide voltage variation capability were studied and researched. Full-bridge phase-shift pulse-width modulation (PSPWM) converter have been developed in [10] to have 4:1 (18 V–75 V) input voltage range operation. The synchronous rectifiers with the PSPWM scheme are adopted on the secondary side to control load voltage. The disadvantages of this circuit topology are a complicated control scheme and eight active switches. The other problems of this circuit topology are the output power and zero voltage switching (ZVS) range on active devices are related to the input voltage. In [11], the half-bridge PWM converter with multi-winding on the secondary side is proposed to control load voltage and have 2:1 (V_in = 250 V–400 V) voltage operation. Three active devices, four rectified diodes, four secondary windings and two filter inductors are adopted in this converter. The more component counts used in this converter will result in high cost and circuit reliability. In [12], a cascade DC-DC converter with PSPWM modulation is proposed to achieve wide input voltage operation (V_in = 600 V–800 V). However, the voltage range of this circuit topology is limited between 600 V–800 V. The conventional three-level duty cycle control or frequency control converters can achieve the same voltage range operation. In [13], an asymmetric half-bridge resonant circuit with the buck-boost circuit and resonant circuit has been presented to have 2:1 (V_in = 36 V–72 V) voltage operation. The main problem of this circuit topology is the unbiased voltage stresses on active switches for both primary and secondary sides. In [14], a hybrid converter with a half-bridge PWM circuit and boost circuit was presented to achieve about 2:1 (V_in = 45 V–75 V) input voltage operation. The basic structure of this circuit topology is a kind of series-connected converter. In [15], the resonant converter operated at the half bridge or full bridge resonant circuit has been studied to realize V_in = 80 V–200 V voltage operation. However, the resonant frequency at low and high input voltage ranges are different due to the different resonant capacitances on half-bridge and full-bridge resonant tanks. Therefore, the wide switching frequency range will happen in this circuit topology. In [16], the PSPWM converter with two isolation transformers has been developed to have 4:1 input voltage operation. This circuit has four different operating sub-circuits under different input voltage conditions. However, the control algorithm of this circuit topology is too complicated to be implemented. In [17], the input-parallel output-series converter has been studied to have wide voltage range capability. Eight active devices and eight rectifier diodes are needed to have a 4:1 voltage operation. This circuit topology uses more power semiconductors that will reduce the circuit reliability and increase the cost.

A hybrid soft-switching DC-DC PWM converter is presented to reduce switching losses on active devices, achieve low primary current at the freewheeling state and have 5:1 (V_in = 90 V–450 V) wide input voltage operation. The PSPWM modulation is used to control active devices and have zero voltage turn-on characteristic. The presented converter contains a resonant circuit and a full-bridge PWM circuit. The resonant circuit can extend the ZVS operation range and also reduce the primary freewheeling current. To extend the input voltage operation range, two secondary winding sets are used on the low voltage side. Thus, a 5:1 (V_in = 90 V–450 V) wide input voltage range can be realized in the studied hybrid circuit. Compared to the conventional PWM converters, the advantages of the presented converter are low switching loss, low primary freewheeling current, wide input voltage operation and a simple control scheme. The circuit diagram of the proposed PWM circuit is discussed in Section 2. The principles of operation are provided in Section 3. In Section 4 and Section 5, the circuit characteristic and experiments of the prototype circuit are discussed and presented to show the circuit performance. In Section 6, the conclusions of the studied hybrid PWM circuit are presented.

2. Circuit Diagram of the Proposed PWM Converter

The conventional PSPWM converter and main PWM signals are given in Figure 1a. Six power semiconductors (four active devices and two rectifier diodes), two magnetic cores (one isolation transformer and one filter inductor) and one filter capacitor are normally used in this circuit topology to realize medium or high power applications. The disadvantages of the PSPWM converter are the hard switching operation of active devices on lagging leg and high freewheeling current. The serious switching loss on active devices will result in serious switching losses at high-frequency operation and a high freewheeling current will reduce circuit efficiency. To solve these two problems, a half-bridge inductor–inductor–capacitor (LLC) converter can be added to a conventional full-bridge PSPWM converter as shown in Figure 1b remark in purple. The circuit elements of LLC converter include S₃, S₄, L_r, C_r, T₂, D₃, D₄, C_o,r and D_r. The PSPWM converter and resonant circuit share the same active devices S₃ and S₄. Due to the ZVS operation characteristic of LLC converter, active devices S₃ and S₄ can achieve ZVS turn-on operation with a wide load range. Therefore, the hard switching drawback is improved. Diode D_r in Figure 1b is used to connect two dc voltage terminals V_o,r (output terminal of LLC converter) and V_R (the secondary rectified voltage). During power transfer interval (|v_ab|>0), V_R > V_o,r and D_r is reverse biased. However, D_r will be forward biased at the freewheeling duration (v_ab = 0 under S₁ and S₃ ON or S₂ and S₄ ON). Due to D_r is conducting, the power flow at the freewheeling duration is from V_o,r (LLC converter) to V_o (load side) and the rectified voltage V_R = V_o,r. Under the freewheeling state, the primary leg voltage v_ab = 0 and the secondary rectified voltage V_R = V_o,r. It can obtain the primary-side inductor voltage v_LP = -n_p1V_o,r/n_s1 < 0 and the primary current i_LP will be declined to zero. Hence, the high circulating current drawback is overcome. In order to overcome and achieve wide voltage operation, four secondary windings are adopted in Figure 1b remark in blue. For low voltage input conditions (V_in,min ~ 2.2V_in,min), Q₁ turns on and Q₂ turns off (Figure 2a). Thus, D₂ and D₃ are reverse biased. The proposed circuit has a high voltage gain with transformer turns ratio N_T1 = n_p1/(n_s1+n_s2). Under high voltage input case (2.2V_in,min ~ 5V_in,min), the switches Q₁ turns off and Q₂ turns on (Figure 2b). Therefore, D₁ and D₄ are reverse biased and the present circuit has low voltage gain with transformer turns ratio N_T1 = n_p1/n_s2. Hence, the wide voltage operation, low freewheeling current and wide ZVS operation are realized in the presented hybrid PWM converter.

3. Operation Principle of the Present Circuit

On the basis of the input voltage range, two cub-circuits can be operated in the present converter. Figure 2a,b provide two sub-circuits under low and high input voltage regions. Under the low voltage region (V_in,min ~ 2.2V_in,min), the full-bridge PWM converter with high secondary turns is operated to obtain high DC voltage gain. To achieve high voltage gain, Q₁ turns on and Q₂ turns off. Thus, the transformer turns ratio in Figure 2a becomes N_T1 = n_p1/(n_s1+n_s2). Under the high voltage region (2.2V_in,min ~ 5V_in,min), the present converter only needs low voltage gain to control load voltage. Therefore, Q₁ turns off and Q₂ turns on to have fewer winding turns on the secondary side. The transformer turns ratio in Figure 2b becomes N_T1 = n_p1/n_s2. Due to input voltage deviation, the PSPWM modulation is selected to control active devices and regulate the duty ratio of PWM signals. The resonant circuit is used in the presented circuit in order to improve the ZVS load range for lagging-leg switches. The output voltage V_o,r of resonant converter is connected to the rectified terminal voltage V_R. Ths positive voltage V_o,r can decrease the current i_Lp to 0 at a freewheeling state. Then, the freewheeling current loss is improved. In the adopted circuit, the inductance L_R << L_m,T1 and the output capacitances of S₁ ~ S₄ are C_S1 = C_S2 = C_S3 = C_S4 = C_oss

For the low voltage input case (V_in,min ~ 2.2V_in,min), the PWM signals are shown in Figure 2a. In the low input voltage region, Q₁ turns on and Q₂ turns off. It is obvious that the fast recovery diodes D₂ and D₃ are both reverse biased. In this equivalent operating circuit, the secondary turns of T₁ are equal to n_s1+n_s2. From Figure 2a, six states are operated in every half switching period. The equivalent state circuits for the first half switching period are provided in Figure 3.

State 1 [t₀ ~ t₁]: At t₀, i_LP = i_Lo/N_T1 and i_Dr = 0. Thus, D_r is reverse biased. S₁ and S₄ are ON so that D₁ conducts, the leg voltage v_ab = V_in and v_Lo ≈ V_in/N_T1–V_o. Thus, the primary current i_Lp and output inductor current i_Lo are increased and given in Equations (1) and (2).

$$i_{Lp}(t)\approx i_{Lp}(t_0)+(V_{in}-N_{T1}{V}_o)(t-t_0)/(N_{T1}^2{L}_o)$$

(1)

$$i_{Lo}(t)\approx N_{T1}{i}_{Lp}(t)$$

(2)

Power transfer between input and output terminals is through a full-bridge PWM converter in this state. The resonant circuit is controlled at the resonant frequency. Since S₄ is ON, the inductor current i_Lr will decrease and i_Lr is less than the magnetizing current i_Lm,T2. Therefore, D₆ is forward biased and LLC converter will store energy on C_o,r.

State 2 [t₁ ~ t₂]: At t₁, S₁ is off. Prior to t₁, i_Lp is positive. After time t_1, i_Lp will discharge C_S2. If the energy $(L_p+N_{T1}^2{L}_o)i_{Lp}^2(t_1)>2C_{oss}{V}_{in}^2$, then v_CS2 will decline to 0 at time t₂. The discharge time of C_S2 is $\Delta t_{12}\approx 2V_{in}{C}_{oss}{N}_{T1}/I_o$. To ensure the ZVS operation, the other necessary condition is t_d (dead time between S₂ and S₁) > Δt₁₂. LLC circuit is still operated at resonant mode ($f_{sw}=f_r=1/2\pi \sqrt{L_r{C}_r}$).

State 3 [t₂ ~ t₃]: v_CS2 = 0 at t₂. Then i_Lp flows through D_S2 and keeps v_CS2,ds = 0. Hence, S₂ can turn on to realize ZVS operation. The secondary rectified voltage V_R is decreased to V_o,r so that diode D_r becomes forward biased and obtains V_R = V_o,r. The primary and secondary inductor voltages v_Lp = −N_T1V_o,r and v_Lo = V_o,r − V_o < 0. It can obtain that i_Lp and i_Lo are both decreased in state 3.

$$i_{Lp}(t)\approx i_{Lp}(t_2)-N_{T1}{V}_{o,r}(t-t_2)/L_p$$

(3)

$$i_{Lo}(t)\approx i_{Lo}(t_2)+(V_{o,r}-V_o)(t-t_2)/L_o$$

(4)

In a traditional PSPWM converter, v_Lp ≈ 0 and i_Lp almost constant at the freewheeling state. From (3), i_Lp in the proposed hybrid converter is decreased in this state. If the freewheeling time interval is large enough, i_D1 or i_Lp can be decreased to zero.

$$\Delta t_{i_{LP}=0}\approx L_p{I}_o/(N_{T1}^2{V}_{o,r})$$

(5)

From Equation (5), one can be observed, the time Δi_Lp=0 is dependent on I_o and V_o,r. For full load condition, a more freewheeling time interval is needed to achieve no circulating current advantage.

State 4 [t₃ ~ t₄]: At t₃, i_D1 = 0, i_Lp ≈ 0 and i_Dr = i_Lo. Hence, the circulating current is removed at a freewheeling state. In state 4, power transfer is from V_in to V_o through LLC circuit, D_r and L_o. The filter inductor voltage v_Lo = V_o,r − V_o < 0 and i_Lo is decreased in this state.

State 5 [t₄ ~ t₅]: At time t₄, S₄ turns off. Prior to t₄, i_Lr − i_Lp < 0. C_S3 is discharged when S₄ is turned off. Diode D₅ becomes forward biased in LLC circuit. Owing to LLC operation, v_CS3 can be easily decreased to 0 and S₃ can turn on at zero voltage at time t₅.

State 6 [t₅ ~ t₆]: At time t₅, C_S3 is discharged to zero voltage. D_S3 becomes forward biased and S₃ can turn on at zero voltage switching after time t₅. The leg voltage v_ab = −V_in and D₄ become forward biased. Since i_D4 < i_Lo, D_r is conducting. The inductor voltage v_Lp ≈ N_T1V_o,r − V_in < 0 and i_Lp decreases. At time t₆, the diode current i_D4 = i_Lo, i_Lp = -i_Lo/N_T1 and i_Dr = 0. The time interval of state 6 is expressed as $\Delta t_{56}\approx I_o{L}_p/[N_{T1}(V_{in}-N_{T1}^{}{V}_{o,r})]$. Since D_r is conducting in this state, the duty ratio loss of PSPWM circuit at state 6 is calculated as $d_6\approx f_{sw}{I}_o{L}_p/[N_{T1}(V_{in}-N_{T1}^{}{V}_{o,r})]$. The current i_Lo is still decreased in state 6. This state is ended at time t₆.

The proposed circuit can also be operated at high voltage input conditions (2.2V_in,min ~ 5V_in,min). The PWM waveforms for high voltage input operation are provided in Figure 2b. Under high voltage input, Q₁ is controlled at OFF state and Q₂ is ON. Due to Q₁ is OFF, D₁ and D₄ become OFF. The full-bridge PWM converter has turns ratio N_T1 = n_p1/n_s2. Since the switching frequency of LLC circuit is equal to the resonant frequency, active devices S₃ and S₄ are turned on at ZVS operation. Due to D_r is connecting V_o,r and V_R, the primary current i_Lp can be decreased to 0 at the freewheeling state. Figure 4 provides the state circuits for first half switching period under high voltage input operation.

State 1 [t₀ ~ t₁]: i_LP is increased and equal to i_Lo/N_T1 at time t₀. Thus, D_r becomes reverse biased. The leg voltage v_ab = V_in and D₂ is forward biased. The currents i_Lp and i_Lo are increased. Power flow from V_in to V_o is finished by a full-bridge converter. Due to i_Lr < i_Lm,T2, D₆ is forward biased in state 1.

State 2 [t₁ ~ t₂]: At t₁, S₁ is turned off and i_Lp(t₁) > 0. i_Lp discharge capacitor C_S2. If $(L_p+N_{T1}^2{L}_o)i_{Lp}^2(t_1)>2C_{oss}{V}_{in}^2$, then v_CS2 will decrease to zero at time t₂. LLC converter is controlled at resonant mode, v_Cr is decreased and D₆ is conducting.

State 3 [t₂ ~ t₃]: At t₂, v_CS2 = 0 and D_S2 is forward biased due to i_Lp > 0. Active device S₂ turns on at ZVS and leg voltage v_ab = 0. The secondary voltage V_R is clamped at V_o,r due to D_r is forward biased. It can obtain v_Lp = −N_T1V_o,r and v_Lo = V_o,r − V_o < 0. Both i_Lp and i_Lo are decreased in this state.

State 4 [t₃ ~ t₄]: At t₃, i_D2 is decreased to 0 and i_Dr = i_Lo. Hence, diode D₂ is reverse biased. LLC converter will transfer power from V_in to V_o through D_r and L_o. The inductor voltage v_Lo = V_o,r − V_o < 0 and i_Lo is decreased in state 4.

State 5 [t₄ ~ t₅]: S₄ turns off at time t₄. Since i_Lr(t₄) − i_Lp(t₄) < 0, v_CS3 is decreased after time t₄. Due to i_Lr > i_Lm,T2, D₅ becomes forward biased. LLC circuit is operated at inductive load so that v_CS3 can be easily decreased to 0.

State 6 [t₅ ~ t₆]: At t₅, v_CS3 = 0. Then, D_S3 is on so that S₃ can turn on at this moment to achieve soft switching operation. In state 6, v_ab = −V_in and D₃ is ON. Since D_r is still conducting, it can obtain v_Lp ≈ N_T1V_o,r − V_in < 0 and i_Lp is decreased. At time t₆, i_D4 = i_Lo and D_r becomes reverse biased. The primary current i_Lp = −i_Lo/N_T1. Since v_Lo = V_o,r − V_o < 0, i_Lo is decreased. State 6 ends at time t₆.

4. Circuit Analysis of the Presented Converter

The advantages of the studied hybrid PSPWM circuit are a wide load range of soft switching, less circulating current and wide input voltage operation. The hard switching drawback and high freewheeling current problem of conventional PSPWM converter are overcome by using an LLC converter in the proposed circuit. Since the switching frequency of LLC circuit is equal to the resonant frequency, active switches of the PSPWM converter can be turned on at ZVS. To realize a wide input voltage deviation problem, four winding sets and two switches are adopted on the low voltage side to control DC voltage gain. Under low input voltage conditions, the winding turns n_S1+n_S2 are selected on the secondary side. Under a high input voltage case, the n_S2 turns are used on the output side. In the presented circuit, the resonant circuit is controlled under constant switching frequency (equal series resonant frequency). Hence, V_o,r is approximately equal to V_in/(2N_T2) = V_inn_S3/(2n_p2). In the presented phase-shift PWM converter, there is a duty loss in state 6. The inductor voltage v_Lo in states 1 and 2 is equal tp V_in/N_T1 − V_o. However, v_Lo in states 3–6 is equal to V_o,r − V_o = V_in/(2N_T2) − V_o. Apply the voltage-second balance to L_o, the voltage V_o is derived as.

$$V_o\approx [d_e(1-\frac{N_{T1}}{2N_{T2}})+\frac{N_{T1}}{4N_{T2}}]\frac{2V_{in}}{N_{T1}}$$

(6)

where d_e = d − d₆ is the effective duty cycle and N_T1 = n_p1/(n_s1+n_s2) or n_p1/n_s2 for low or high voltage input condition, respectively. In a traditional PSPWM converter, the output voltage is expressed in Equation (7).

$$V_{o,con}=\frac{2d_e{V}_{in}}{N_{T1}}$$

(7)

Comparing Equations (6) and (7), it obtains $G_{dc}=N_{T1}{V}_o/(2V_{in})>G_{dc,con}=N_{T1}{V}_{o,con}/(2V_{in})$. That means the presented circuit has larger DC gain than the traditional PSPWM converter. Due to the full-bridge circuit structure, S₁ ~ S₄ has V_in,max voltage stress. The switches Q₁ and Q₂ have voltage stress V_inn_s1/n_p1. The voltage stresses on the fast recovery diodes D₁ ~ D₆ and D_r are obtained in Equations (8)–(11).

$$V_{D1,rating}=V_{D4,rating}=2V_{in}(n_{s1}+n_{s2})/n_{p1}$$

(8)

$$V_{D2,rating}=V_{D3,rating}=2V_{in}{n}_{s2}/n_{p1}$$

(9)

$$V_{D5,rating}=V_{D6,rating}=V_{in}{n}_{s3}/n_{p2}$$

(10)

$$V_{Dr,rating}=V_{in}/N_{T1}-V_{in}/(2N_{T2})$$

(11)

The dc diode currents of D₁ ~ D₆ and D_r are $I_{D1}=I_{D2}=I_{D3}=I_{D4v}\approx d_e{I}_o$, $I_{D5}=I_{D6}\approx (0.5-d_e)I_o$ and $I_{Dr}\approx (1-2d_e)I_o$. The inductor voltage v_Lo = V_in/N_T1 − V_o in states 1 and 2 and v_Lo = V_o,r − V_o in states 3 ~ 6. Therefore, L_o in conventional full-bridge PWM converter and the proposed hybrid converter are expressed in Equations (12) and (13).

$$L_{o,con}>V_o(0.5-d_e)/(f_{sw}\Delta i_{Lo})$$

(12)

$$L_o>(V_o-\frac{V_{in}}{2N_{T2}})(0.5-d_e)/(f_{sw}\Delta i_{Lo})$$

(13)

Comparison of Equations (12) and (13), it is clear that the presented hybrid PWM circuit has less output inductance L_o. The output power of the resonant circuit is $P_{LLC}\approx (0.5-d_{eff})I_o{V}_{in}/N_{T2}$ and the output power of the PSPWM circuit is $P_{PWMcircuit}\approx 2d_e{I}_o{V}_{in}/N_{T1}$.

5. Experimental Results

The presented hybrid PSPWM circuit is investigated and confirmed by a prototype circuit. The rated power of the proposed circuit is P_o,max = 800 W, the input and output voltages are V_in = 90 V–450 V and V_o = 48 V. The switching frequency is f_sw = 70 kHz. In the presented circuit, Q₁ and Q₂ are ON and OFF under 90 V ≤ V_in < 200 V (low voltage input). Therefore, the transformer T₁ has turns ratio N_T1 = n_p1/(n_s1 + n_s2). On the other hand, Q₁ and Q₂ are OFF and ON under 200 V < V_in ≤ 450 V (high voltage input). Transformer T₁ has turns ratio N_T1 = n_p1/n_s2. To present signal oscillation at V_in = 200 V, a Schmitt comparator with ± 10V tolerance is adopted in the control circuit to control Q₁ and Q₂. Hence, Q₁ is ON and Q₂ is OFF at 90 V ≤ V_in ≤ 210 V, and Q₁ is OFF and Q₂ is ON at 190 V ≤ V_in ≤ 450 V in the control algorithm. The general purpose PWM integrated circuit UCC3895 is selected to control S₁–S₄. The switches Q₁ and Q₂ are controlled by a voltage comparator. The component parameters of the laboratory prototype circuit are provided in

Table 1. Circuit parameters in the laboratory prototype.

Items.	Parameter	Items	Parameter
Vin	90~450 V	Vo	48 V
Lo	32 µH	S1~S4, Q1, Q2	STF40N60M2
Po	800 W	D1~D4	MSC015SDA120B
fsw	70 kHz	D5, D6	STPS 30M80CFP
Lp	8 µH	Dr	SBR60A300CT
Lr	13 µH	np1:ns1:ns2	17:7:7
Cr	410 nF	np2:ns3	19:2
Co,r	330 µF/100 V	Lm,T2	66 µH
Co	12800 µF/100 V

. Figure 5a gives the picture of the prototype circuit. The control blocks of the presented converter are given in Figure 5b. The output voltage controller is based on the type III voltage control algorithm [18]. The output of the voltage controller is to regulate the phase shift angle between the leading-leg switches and lagging-leg switches. The gate drivers are used to turn on or off the switching devices S₁–S₄. In order to realize the wide input voltage operation, a Schmitt trigger comparator with 200 V reference voltage is adopted to select the low (Q₁ ON, if V_in < 200 V) or high (Q₂ ON, if V_in > 200 V) input voltage region. The measured waveforms of the proposed circuit for V_in = 90 V and 210 V under the low voltage region are illustrated in Figure 6 and Figure 7. Similarly, Figure 8 and Figure 9 provide the experimental waveforms under V_in = 190 V and 450 V at high voltage regions. The primary-side signals (v_S1,g, v_S4,g, v_ab, and i_Lp) of the full-bridge converter under V_in = 90 V, 210 V, 190 V and 450 V are illustrated in Figure 6a, Figure 7a, Figure 8a and Figure 9a, respectively. One can observe that the proposed converter has a less effective duty ratio at V_in = 210 V (450 V) than V_in = 90 V (190 V). The circulating current of i_Lp at the freewheeling state (v_ab = 0) can be improved and reduced to zero at V_in = 210 V, 190 V and 450 V in Figure 7a, Figure 8a and Figure 9a. The primary-side waveforms (v_S3,g, v_S4,g, v_Cr, and i_Lr) of the resonant converter at V_in = 90, 210, 190 and 450 V are provided in Figure 6b, Figure 7b, Figure 8b and Figure 9b, respectively. The resonant capacitor voltage v_Cr contains a dc voltage value that is equal to V_in/2. Figure 6c and Figure 7c provide the measured output side waveforms of PSPWM converter at V_in = 90 V and 210 V. For the low voltage input region, Q₁ is ON and Q₂ is OFF. Therefore, D₂ and D₃ are reverse biased. At the freewheeling state (v_ab = 0), D_r is conducting to clamp V_R = V_o,r and force V_Lo = V_o,r − V_o < 0. Therefore, i_Lo is decreased at this freewheeling state. Similarly, Figure 8c and Figure 9c provide the measured waveforms of i_D2, i_D3, i_Dr and V_o,r2 at V_in = 190 V and 450 V under the high voltage region. The measured secondary-side waveforms of the resonant converter at V_in = 90, 210, 190 and 450 V are illustrated in Figure 6d, Figure 7d, Figure 8d and Figure 9d, respectively. Figure 10 demonstrates the test results of S₁ (at leading-leg) and S₄ (at lagging-leg) at V_in = 90 V input for 20% load and full load conditions. Owing to the energy on L_o is adopted to discharge the leading-leg switch S₁, one can observe that switch S₁ in Figure 10a,b have ZVS turn-on operation. Due to the LLC circuit operation, S₄ can achieve ZVS turn-on operation shown in Figure 10c,d at 20% and 100% power conditions. Similarly, the measured waveforms of S₁ (at leading-leg) and S₄ (at lagging-leg) at V_in = 190 V, 210 V and 450 V under 20% load and full load are demonstrated in Figure 11, Figure 12 and Figure 13, respectively. Due to the phase-shift PWM operation of the DC full-bridge converter, the PWM signals of S₂ and S₃ have the same operation characteristics as S₁ and S₄. From the experimental results in Figure 10, Figure 11, Figure 12 and Figure 13, it is clear that all switches have ZVS characteristic from 20% load to full load for all input voltage range. Figure 14 provides the relationship between the signals of Q₁ and Q₂ and input voltage V_in. When V_in > 90 V and < 210 V (in low voltage input range), Q₁ turns on and Q₂ turns off. The n₁ + n₂ turns are selected to achieve high voltage gain. On the other hand, Q₁ turns off and Q₂ turns on, if V_in > 210 V (in high voltage input range). The n₂ turns are selected to reduce voltage gain. If the input voltage V_in is declined from 450 V and V_in < 190 V, then Q₁ will turn on and Q₂ turns off. The measured efficiencies of the prototype circuit are about 90%, 88%, 92% and 89% at V_in = 90 V, 210 V, 190 V and 450 V, respectively, under full load conditions.

6. Conclusions

A hybrid PWM converter is discussed and implemented to improve the drawbacks of the traditional PSPWM converter. The advantages of the presented circuit are low primary current stress at the freewheeling state, low switching losses at the lagging-leg switches and more wide input voltage operation for PV power renewable energy applications. Compare to the conventional PWM converters in [10,11,12,13,14,15,16,17] with wide input voltage or output voltage operation, the proposed circuit has fewer power switches on the primary side. The LLC resonant converter is used on the lagging-leg of the conventional PSPWM converter to reduce the switching loss. Thus, the switching losses on the proposed converter are improved. The high freewheeling current loss of conventional phase-shift PWM converter is also improved by the connection of the output DC voltage of the resonant circuit to the rectified terminal of the PSPWM circuit. However, the proposed converter has more circuit components compared to the other wide input voltage PWM converters. The performance of the presented hybrid PWM circuit is provided from the experiments with an 800 W prototype circuit. Further work will consider reducing the active or passive components in the presented converter, decreasing the circuit cost and maintaining the same converter performance.