Circuit-Based Rainflow Counting Algorithm in Application of Power Device Lifetime Estimation
Abstract
:1. Introduction
2. Realization of Rainflow Counting Algorithm in SPICE
2.1. Principle of Rainflow Counting Algorithm
2.2. Implementation Method in SPICE
- The one round starts here: sample the data points in the thermal profile, and obtain one sampling period delay by using the delay function. Subtract these two values to generate the temperature swing waveform and calculate the swing amplitude —in other words, the absolute value of . Generate the required delay waveforms for both of these values.
- Compare the first-order swing amplitude with the current value and the second-order . Convert the comparison into a Boolean expression, and if it satisfies the criteria that and , then the counting waveform generates a pulse valued at 1 V, indicating that it counts the as one cycle. Calculate the corresponding and Q of the counted cycles.
- Generate a new sampling pulse which is made by inverting the , to sample and construct a new waveform. This can effectively skip sampling the two points involved in the counted , for example, and , while keeping and holding the uncounted values and in Figure 1b. Since the circuit simulator follows the time sequence, it is not possible to discard the already generated points such as the stack-based implementation. In addition, waiting until the previous round to finish counting is also unwise. As the action is simultaneously proceeding with the load changing, the overall number of points that should be discarded—or in other words the delay time—is unknown until the simulation is complete. Hence, the proposed method is used to mimic the discard function.
- The two rounds starts here: same as step 1 with the newly generated .
- At this time, is no longer consecutive, however, zeros appear due to the discarded points in the previous round. This results in difficulties by simply adopting the same method as in step 2. Thus, another solution is given here. Determine the growing trend of the temperature swing by comparing with . A falling trend is indicated if the current is smaller or equal to . Otherwise, it is following a rising trend. Based on the criteria that and , must have the smallest range. Thus, full cycles at the end of falling segments will always exist, just next to the following rising segment. As the one round discards even numbers of points, for instance, two points for 1 counted cycle, four points for two consecutive counted cycles, etc., the full cycles are most likely to occur in odd delay times, e.g., . Therefore, the solution is to pick out full cycles by shifting the five times, from to , to determine the first cycle that overlaps with the rising segment. Within five periods, it is capable of filtering out most of the full cycles in this round.
- Unify the counted cycles to the same delay times and calculate their sum. Same as step 3 and generate with a new sampling pulse made by inverting the aforementioned pulses, and output a new waveform.
- The three rounds starts here: same as step 1 with the newly generated .
- Same as step 2, and the loop stops here. The remaining values are counted as half cycles. Calculate the corresponding and Q of half cycles.
2.3. Circuitry Analysis
2.3.1. Electro-Thermal Averaged Model
2.3.2. Rainflow Counting Circuits
- Sample-and-hold with delay function block is shown in Figure 3. This submodule is composed of several sample-and-hold function and logic gates, aiming to sample the data and generate the 1, and 2 delay. The input and are the data that need to be sampled and the sampling frequency, respectively. Due to the maximum allowed sample voltage being 10 V, the thermal profile needs to be scaled down before being input to this function. It can be converted back to its original value by using a voltage-dependent voltage source E to provide a gain. The pre-defined value is 1.
- Behavioral Schmitt-triggered buffer with differential inputs is utilized in comparing the input amplitudes, and outputs a Boolean result.
- Logic gates including AND, NOT and OR gates are used in making decisions if a cycle should be counted or not.
- Next round waveform generator, as shown in Figure 4, where input 1, input 2 and CLK are the uncounted , and sampling pulse, respectively, while the output is the waveform. After sampling the values, it will be split into two groups which contain pure positive and negative values, respectively. Using the behavioral set–reset flipflop, the positive pulse can be extended until it meets the negative value, and vice versa. By doing so, the uncounted will be kept and extended until meeting the next uncounted value. The achievement of the next round waveform is by adding the positive and negative outputs together through an IF function.
3. Simulation Results
3.1. Simulation Waveform
3.2. Evaluation of the Proposed Method
3.2.1. Accuracy
3.2.2. Simulation Time
4. Conclusions
Author Contributions
Funding
Institutional Review Board Statement
Informed Consent Statement
Conflicts of Interest
Appendix A. Schematic Diagram
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Function | Description [21] | Purposes of These Functions in the Model |
---|---|---|
if(x,y,z) | If x is true, do y else z | Conditional statement |
idt(x) | Integrate x | Accumulate stresses Q |
delay(x,t) | x delayed by t | Generate a waveform with t cycles delayed for comparison |
abs(x) | Absolute value of x | Calculate amplitude |
uramp(x) | If x > 0 , output x, else 0 | Split positive and negative |
High Stress (50–200 °C) | Medium Stress Load (50–160 °C) | Small Stress Load (50–110 °C) | |||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
20 ks Load | 20 ks Load | 50 ks Load | 20 ks Load | 100 ks Load | |||||||||||
Q | Error | Time | Q | Error | Time | Q | Error | Time | Q | Error | Time | Q | Error | Time | |
MATLAB® | 161 | - | - | 18.6 | - | - | 59.5 | - | - | 1.02 | - | - | 5.1 | - | - |
Half-cycle | 122.5 | 23.7% | 5 s | 15.4 | 17.2% | 5.7 s | 49.8 | 16.3% | 13 s | 0.792 | 25.5% | 7.2 s | 3.49 | 31.6% | 21 s |
Proposed (3) | 155.3 | 3.54% | 91 s | 17.85 | 4.03% | 86 s | 57.4 | 3.5% | 198 s | 0.99 | 3% | 77 s | 4.91 | 3.7% | 376 s |
Proposed (4) | 158.3 | 1.7% | 141 s | 18.1 | 2.7% | 137 s | 58.17 | 2.2% | 362 s | 1.01 | 1% | 144 s | 5.01 | 1.8% | 632 s |
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Cheng, T.; Lu, D.D.-C.; Siwakoti, Y.P. Circuit-Based Rainflow Counting Algorithm in Application of Power Device Lifetime Estimation. Energies 2022, 15, 5159. https://doi.org/10.3390/en15145159
Cheng T, Lu DD-C, Siwakoti YP. Circuit-Based Rainflow Counting Algorithm in Application of Power Device Lifetime Estimation. Energies. 2022; 15(14):5159. https://doi.org/10.3390/en15145159
Chicago/Turabian StyleCheng, Tian, Dylan Dah-Chuan Lu, and Yam P. Siwakoti. 2022. "Circuit-Based Rainflow Counting Algorithm in Application of Power Device Lifetime Estimation" Energies 15, no. 14: 5159. https://doi.org/10.3390/en15145159
APA StyleCheng, T., Lu, D. D.-C., & Siwakoti, Y. P. (2022). Circuit-Based Rainflow Counting Algorithm in Application of Power Device Lifetime Estimation. Energies, 15(14), 5159. https://doi.org/10.3390/en15145159