SIMO DC-DC Converter with Low-Complexity Hybrid Comparator-Charge Control

Abstract

A hybrid control method using a comparator and a charge control method is proposed for a single-inductor multiple-output (SIMO) DC-DC converter. SIMO DC-DC converters have the weaknesses relating to cross-regulation, as all the output channels share the energy stored in a single inductor. Although multiple control methods such as Time-Multiplexing Control (TMC) and Ordered Power Distributing Control (OPDC) have been proposed to prevent cross-regulation or to improve load capability, effective use of limited resources appears to have not yet been achieved. This paper introduces a hybrid control topology that (1) utilizes comparator-based regulations for most outputs and (2) uses a new charge control loop method for the last output to reduce cross-regulation with low hardware complexity. In addition, the proposed scheme efficiently reuses the system’s redundant energy by adaptively controlling the freewheeling switch that opens the path to the input battery to store the surplus energy resources again. The proposed SIMO DC-DC converter was designed and validated with a 0.18 μm 3.3 V CMOS process. The converter has four regulated outputs of 0.9, 1.2, 1.5, and 2.2 V, and as a result of the simulation, it was found that the cross-regulation was estimated to be 0.4 mV/mA when the output current changes by ~200 mA. In addition, estimated peak power conversion efficiency of 88.5% was achieved at a total output power of 405 mW.

1. Introduction

Power Management Units (PMUs) have become indispensable blocks in today’s portable electronic products. As the size and power consumption of each sub-function decreases rapidly, more and more functions are being integrated into one device, which may require different supply voltages for each sub-function device [1]. Traditionally, multiple switching regulators are customized to provide separate supply voltage requirements in each sub-block leading to the silicon area and power overhead. This approach is no longer attractive, especially because the inductor inside the switching regulator occupies a huge area.

One of the most efficient solutions for these systems is to use a Single Inductor Multiple Output (SIMO) DC-DC converter as a switching regulator [2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19]. The SIMO DC-DC converter adjusts various outputs using only a single inductor component inside. Switching regulators based on these SIMO methods greatly save area and power compared to conventional approaches using multiple switching regulators. However, even with area-efficient SIMO DC-DC converters, many problems, such as output load capability and/or cross-regulation, must be carefully addressed [3,4]. Note that cross-regulation is a phenomenon in which the voltages of the other outputs are affected when one output load changes, and occurs because all outputs share energy from one inductor. Moreover, the power conversion efficiency of the DC-DC converter is one of the important specifications. To achieve high power conversion efficiency, the input power must be converted into an output with minimal power loss. The power loss of the SIMO DC-DC converter consists of conduction loss, inductor loss, ESR loss, and switching loss [2,20]. Conduction loss is power loss caused by non-zero on-resistance when turning on the MOSFET switch. Inductor loss consists of copper loss from the resistive component of the wire and loss from the magnetic core. ESR loss is the resistive loss of metal wiring, and switching loss is the dynamic loss due to frequent switching of MOSFET switches. The overall power conversion efficiency of the converter can be improved through optimization of these power losses.

Among the many studies proposed to address abovementioned problem, the Time-Multiplexing Control (TMC) method appears to provide reduced cross-regulation [3,4,5]. In TMC, one cycle period of power regulation is divided into several time frames, and each time frame is used to generate a specified output. This means that there is no cross-regulation in the TMC because the generation of a specific output voltage is independent of other output voltages. However, this method suffers from its low load capability. Since the charge procedure of each output must be finished within one fixed period, the amount of energy delivered for each output is limited.

To overcome the load capability issue, the Ordered Power Distributing Control (OPDC) method was proposed [6,7,8,9,10,11,12,13,14,15,16,17]. In the OPDC method, the output voltage of each channel can be controlled by a comparator [6,7,8,9,10], a voltage mode control [11], or a charge control method [12,13,14]. The overall architecture of the general OPDC method implementation with voltage-mode control and with N output channels is shown in Figure 1. An OPDC-based SIMO converter consists of (1) the input battery (${\mathrm{V}}_{\mathrm{G}}$) and its control switches (${\mathrm{M}}_{\mathrm{P}}$ and ${\mathrm{M}}_{\mathrm{N}}$ along with the corresponding control voltage ${\mathrm{V}}_{\mathrm{P}}$ and ${\mathrm{V}}_{\mathrm{N}}$, respectively); (2) the inductor L (${\mathrm{V}}_{\mathrm{LP}}$ node is connected to input control switches and ${\mathrm{V}}_{\mathrm{LN}}$ is connected to multi-channel outputs); (3) the multi-channel output (each output channel with the switch transistor ${\mathrm{M}}_{\mathrm{SX}}$ and the corresponding control voltage ${\mathrm{V}}_{\mathrm{OX}}$ and simplified load model); and (4) the control block inside the gray box. Note that the individual control units for each output channel are the same from output 1 (${\mathrm{V}}_{\mathrm{O}1}$) to output $\mathrm{N}-1$ (${\mathrm{V}}_{\mathrm{ON}-1}$) using a comparator. Only the last output (${\mathrm{V}}_{\mathrm{ON}}$) is controlled by a combination of the OTA and PWM generator inside the control block.

As the name OPDC suggests, all outputs are charged sequentially in each switching cycle of the OPDC-based converter. This means that the charging process for one output starts immediately after the charging process for the previous output is over. It is similar to the TMC method from a time division-based operation perspective. However, each output voltage is monitored in the OPDC method to ensure that the voltage level has reached the reference level. Therefore, the voltage ripple of the output node is kept to a minimum compared to the TMC-based one. However, a sudden change in load status on a particular output channel can lead to potential problems. In this case, the system may spend too much time recovering the output voltage level of a particular channel, resulting in a lack of energy for other outputs. According to this scenario, in an OPDC-based converter, the cross-regulation of the last output channel is usually a major problem because the last output channel cannot draw enough energy from a single inductor.

One simple way to solve this problem is to store enough energy inside an inductor with a guard band to prepare for a sudden load change in the output channel. However, since the stored energy is expected to remain in general situations, a freewheeling switch has been added to provide an additional path from the inductor output to the battery source for efficient energy management [6,10,14,19]. This freewheeling switch returns the energy remaining at the end of a single regulation cycle to the source battery. In this way, the system can prepare for sudden load change conditions and also prevent waste of energy remaining. One disadvantage of this approach is that a freewheeling switch must be turned on every switching cycle, and considering the ON resistance of the switch transistor, the total power efficiency will be degraded even if the remaining current is sent back to the battery.

Another approach, the Output Voltage-Aware Charge Control (OVACC) method, was also proposed to reduce cross-regulation [15]. The OVACC method can calculate the required energy in each output channel using a control block and then extract the required energy from the input battery as much as necessary. Cross-regulation is rarely expected due to accurate energy in-out control, but high complexity of hardware implementation is required. More specifically, the control block of OVACC has five independent charge control loops to measure and provide the power required for each output. The control block must also have an accurate inductor current sensor and analog adder to calculate the required output power, which increases design overhead.

This study proposes a novel structure for SIMO DC-DC converters to address the aforementioned issues. Here, the core idea of our proposal can be summarized as follows: (1) A hybrid low complexity control block was proposed through a charge control loop for the last output channel control and comparator-based control for the remaining output channels; and (2) adaptive on/off control of the freewheeling switch was implemented for managing the remaining energy of the inductor at the end of each cycle operation.

The remaining sections are as follows. Details of the proposed SIMO DC-DC converter architecture and the details of sub-unit implementation are introduced in Section 2. Then, the results of the simulation study, and a discussion in which a comparison is made between similar architectures, are presented in Section 3 and Section 4, respectively. Finally, the conclusion is presented in Section 5.

2. Proposed Low-Complexity Hybrid Comparator-Charge Control

2.1. Overall Architecture

The overall architecture of the hybrid control SIMO buck converter is shown in Figure 2. Similar to the OPDC-based architecture in Figure 1, the basic components of the proposed converter include an external battery source, a single inductor, multiple output channels, and a control block. Except for hybrid control units, which are described in detail in the next paragraph, small changes are in the freewheeling switch ${\mathrm{M}}_{\mathrm{S}5}$ and the corresponding control voltage $\overline{{\mathrm{V}}_{\mathrm{S}5}}$. Here, the freewheeling switch adaptively connects the output of the inductor to an external battery source so that the energy remaining at the end of each voltage regulation cycle can be stored in the battery for efficient energy control.

The operation of the proposed converter is based on the OPDC method in which all outputs are sequentially charged during one cycle regulation period. While the first three output channels (${\mathrm{V}}_{\mathrm{O}1}$ ~ ${\mathrm{V}}_{\mathrm{O}3}$) are charged based on a simple comparator-based control (Comparator Loop), the last output vulnerable to cross-regulation is controlled by a concise Charge Control Loop (CCL) inside the Control Block.

Now, we explain the overall operation of the proposed hybrid control unit. Basically, each output voltage of ${\mathrm{V}}_{\mathrm{O}1}$ to ${\mathrm{V}}_{\mathrm{O}3}$ is sequentially compared with the corresponding reference voltage levels (${\mathrm{V}}_{\mathrm{REF}1}$ to ${\mathrm{V}}_{\mathrm{REF}3}$). If the output voltage of ${\mathrm{V}}_{\mathrm{O}1}$ exceeds the ${\mathrm{V}}_{\mathrm{REF}1}$ level, the initial charging period of ${\mathrm{V}}_{\mathrm{O}1}$ ends and the switch transistor ${\mathrm{M}}_{\mathrm{S}1}$ is turned off by the control signal ${\mathrm{V}}_{\mathrm{S}1}$ from the ‘Logic Control & Gate Driver’. This process is repeated for the remaining ${\mathrm{V}}_{\mathrm{O}2}$ and ${\mathrm{V}}_{\mathrm{O}3}$. Here, non-overlap switching is guaranteed between the on-states of the output switches to prevent faults from occurring due to the simultaneous on-states between the output switches [11].

After completing the precedent charging operations of ${\mathrm{V}}_{\mathrm{O}1}$ to ${\mathrm{V}}_{\mathrm{O}3}$, ${\mathrm{V}}_{\mathrm{O}4}$, which is a fourth output channel voltage, is regulated by a charge control loop to prevent the impact of cross-regulation. A charge control loop consists of a System Energy Detector, Inductor Energy Detector, and Inductor Charging Controller, and aims to extract an appropriate amount of energy from the input battery using the output voltage of the last channel as a control parameter. The control signals generated by the ‘Logic Control & Gate Driver’ except ${\mathrm{V}}_{\mathrm{S}1}$ to ${\mathrm{V}}_{\mathrm{S}3}$ are (1) ${\mathrm{V}}_{\mathrm{S}4}$, (2) ${\mathrm{V}}_{\mathrm{P}}$, ${\mathrm{V}}_{\mathrm{N}}$, and (3) $\overline{{\mathrm{V}}_{\mathrm{S}5}}$, each of which controls the power switches of (1) the last channel (${\mathrm{M}}_{\mathrm{S}4}$), (2) the input battery (${\mathrm{M}}_{\mathrm{P}}$ and ${\mathrm{M}}_{\mathrm{N}}$), and (3) freewheeling operation (${\mathrm{M}}_{\mathrm{S}5}$), respectively.

2.2. Basic Operation with Timing Diagrams

The overall operation of the proposed SIMO DC-DC converter is shown in the expected timing diagram in Figure 3. Note that here the operation of the proposed converter is described under two possible conditions: (1) The first condition is when the load condition of a particular output channel suddenly changes, and there is energy left after managing the output of all channels (Figure 3a). (2) In the second scenario, enough time has passed during which the load condition remains unchanged (Figure 3b). We refer to the first case as the energy ‘redundancy state’, and the second case as the energy ‘steady state’.

In both cases, a single cycle converter operation is performed within the switching period, and the part of time (in percentage) used to charge the x-th output channel within this time frame, is denoted by ${\mathrm{D}}_{\mathrm{X}}$. Therefore, the sum of ${\mathrm{D}}_{\mathrm{X}}$ for all outputs is $\mathrm{D}$ without a subscript. Using this notation, the time used to turn on the first output switch ${\mathrm{M}}_{\mathrm{S}1}$ is calculated as ${\mathrm{D}}_1*\mathrm{T}$, which is written as ${\mathrm{D}}_1\mathrm{T}$ in Figure 3.

The operation of the proposed converter begins with increasing the inductor current ${\mathrm{I}}_{\mathrm{L}}$ by turning on the input switch ${\mathrm{M}}_{\mathrm{P}}$ (via the $\overline{{\mathrm{V}}_{\mathrm{P}}}$ signal) during the $\mathrm{DT}$ period. At the same time, the outputs are sequentially charged using the energy charged in the inductor. In the case of ${\mathrm{V}}_{\mathrm{O}1}$ to ${\mathrm{V}}_{\mathrm{O}3}$, the output voltage ${\mathrm{V}}_{\mathrm{OX}}$ is charged through the ${\mathrm{M}}_{\mathrm{SX}}$ switch along with the control signal ${\mathrm{V}}_{\mathrm{SX}}$ during the ${\mathrm{D}}_{\mathrm{X}}\mathrm{T}$ time.

The input switch ${\mathrm{M}}_{\mathrm{P}}$ is turned off in the middle of one cycle regulation, and then the ${\mathrm{M}}_{\mathrm{N}}$ switch is turned on instead for the remaining time $\left(1-\mathrm{D}\right)\mathrm{T}$. The inductor is now discharged to ground through the ${\mathrm{M}}_{\mathrm{N}}$ switch. The moment of transition from the ${\mathrm{M}}_{\mathrm{P}}$ switch to the ${\mathrm{M}}_{\mathrm{N}}$ switch is determined by the charge control loop operation. Its detailed operation is described in the following section.

Now, we explain different control methods for the group of the first three outputs ${\mathrm{V}}_{\mathrm{O}1}$ to ${\mathrm{V}}_{\mathrm{O}3}$ and the last output ${\mathrm{V}}_{\mathrm{O}4}$. As discussed in the previous section, the first three outputs are regulated by the comparator, whereas the last output is controlled by the charge control loop.

The operating principle of how the first three outputs are controlled by the comparator is the same in both the ‘redundancy state’ and the ‘steady state’. While the switch transistor ${\mathrm{M}}_{\mathrm{SX}}$ for the channel output being considered is turned on, the voltage level ${\mathrm{V}}_{\mathrm{OX}}$ is monitored to verify that the output is charged to a level slightly higher than the corresponding reference voltage (${\mathrm{V}}_{\mathrm{REFX}}$). If ${\mathrm{V}}_{\mathrm{OX}}$ exceeds the reference level, the switch transistor is turned off and the next output channel is charged by turning on the switch transistor.

Unlike the case of ${\mathrm{V}}_{\mathrm{O}1}$ to ${\mathrm{V}}_{\mathrm{O}3}$, the operation of the last output ${\mathrm{V}}_{\mathrm{O}4}$ shows different operations depending on the redundant state and the steady state. For energy steady state (Figure 3b), the voltage level of ${\mathrm{V}}_{\mathrm{O}4}$ remains slightly lower than the reference level (approximately 30 mV lower than ${\mathrm{V}}_{\mathrm{REF}4}$) through the charge control loop. This means that the switching period ends by the on-time duration of ${\mathrm{V}}_{\mathrm{O}4}$ without turning on the freewheeling switch (via ${\mathrm{V}}_{\mathrm{S}5}$) to manage the remaining energy. This means that the proposed system efficiently uses energy without waste in the steady state. However, if the load of a specific output suddenly decreases, redundant energy is generated inside the inductor, and ${\mathrm{V}}_{\mathrm{O}4}$ reaches the reference voltage level. This means that the converter is not in a steady state. The switch for ${\mathrm{V}}_{\mathrm{O}4}$ is then turned off and the freewheeling switch ${\mathrm{M}}_{\mathrm{S}5}$ is turned on based on the control voltage ${\mathrm{V}}_{\mathrm{S}5}$ until the end of the switching cycle (for ${\mathrm{D}}_5\mathrm{T}$ duration) to store the remaining energy back in the input battery.

In addition, the feedback loop inside the charge control unit adjusts the duty ratio of the control signal to the input switch ${\mathrm{M}}_{\mathrm{P}}$ to reduce the inductor current from the battery at the start of one cycle operation. Accordingly, the residual energy inside the loop decreases during the on-time duration of the freewheeling switch, and the system returns to the steady state.

The transition from the energy redundancy state to the steady state is described in Figure 4. As shown in the figure, the on-time duration of the freewheeling switch ${\mathrm{D}}_5\mathrm{T}$ gradually decreases to 0 as the circuit settles in the steady state.

2.3. Charge Control Loop

The detailed circuit configuration of the charge control loop (CCL) and the connections between the CCL and nearby components are shown in Figure 5a. The charge control loop consists of three parts: (1) system energy detection, (2) inductor energy detection, and (3) inductor charging control.

The system energy detection part consists of an Error Amplifier (EA), an Energy Shortage Detector, a 2:1 multiplexer, and RC components for charging and loop stability. In the steady state, the freewheeling switch control signal ${\mathrm{V}}_{\mathrm{S}5}$ remains low. Then the fourth output voltage ${\mathrm{V}}_{\mathrm{O}4}$ passes through the multiplexer and is compared to the voltage level of ${\mathrm{V}}_{\mathrm{REF}4}-30\mathrm{mV}$ in EA. If the voltage level of ${\mathrm{V}}_{\mathrm{O}4}$ is lower (higher) than the reference level, the output of EA increases (decreases), and accordingly, the output node capacitor ${\mathrm{C}}_{\mathrm{Z}}$ is charged (discharged) and the ${\mathrm{V}}_{\mathrm{Q}}$ level increases (decreases). Since the ${\mathrm{V}}_{\mathrm{Q}}$ level allows us to know indirectly whether the ${\mathrm{V}}_{\mathrm{O}4}$ level reaches the reference level, it can be assumed that the ${\mathrm{V}}_{\mathrm{Q}}$ level indicates whether there is enough energy currently supplied to the system.

Similar to the previous part, the inductor energy detection part represents the inductor energy as a voltage level ${\mathrm{V}}_{\mathrm{C}}$ of the capacitor ${\mathrm{C}}_{\mathrm{T}}$ charged through the inductor current (${\mathrm{I}}_{\mathrm{LSEN}}$) imitated from the inductor current sensor while the $\overline{{\mathrm{V}}_{\mathrm{P}}}$ signal remains high.

Based on the voltage levels representing system energy (${\mathrm{V}}_{\mathrm{Q}}$) and inductor energy (${\mathrm{V}}_{\mathrm{C}}$), the last inductor charging control part compares the two incoming voltages and generates an output voltage ${\mathrm{V}}_{\mathrm{DT}}$ that directly controls the on/off of input switch pairs ${\mathrm{M}}_{\mathrm{P}}$ and ${\mathrm{M}}_{\mathrm{N}}$. As shown in Figure 5b, if the ${\mathrm{V}}_{\mathrm{DT}}$ signal is high, the $\overline{{\mathrm{V}}_{\mathrm{P}}}$ signal is high, and the ${\mathrm{V}}_{\mathrm{N}}$ signal is low, and vice versa.

The detailed operation of the CCL can be understood by considering the load change conditions of a specific output channel. The timing diagram of the change from the high load condition to the low load condition (high-to-low load transient) is shown in Figure 6. If the load condition of the first output channel, for example, decreases (${\mathrm{I}}_{\mathrm{O}1}$ decreases), the system is switched to an energy redundancy state, and accordingly, the output voltage of the fourth output channel ${\mathrm{V}}_{\mathrm{O}4}$ increases to the reference level ${\mathrm{V}}_{\mathrm{REF}4}$. Then the switch transistor of this output is turned off through the ${\mathrm{V}}_{\mathrm{S}4}$ signal from the comparator loop and the freewheeling switch is turned on (through ${\mathrm{V}}_{\mathrm{S}5}$) until the end of the conversion cycle.

While the freewheeling switch sends the remaining energy back to the input battery, the ${\mathrm{V}}_{\mathrm{S}5}$ signal selects the battery voltage ${\mathrm{V}}_{\mathrm{G}}$ from the 2:1 multiplexer input and transmits it to the EA input. The ${\mathrm{V}}_{\mathrm{G}}$ level is much higher than other reference voltage levels (${\mathrm{V}}_{\mathrm{REF}1}$ through ${\mathrm{V}}_{\mathrm{REF}4}$), so the output of EA discharges the capacitor ${\mathrm{C}}_{\mathrm{Z}}$ faster, resulting in a faster reduction in voltage level ${\mathrm{V}}_{\mathrm{Q}}$. As a result, the time required for an inductor energy indicator ${\mathrm{V}}_{\mathrm{C}}$ signal to reach the system energy indicator ${\mathrm{V}}_{\mathrm{Q}}$ level is gradually decreased, and as a conversion cycle progresses, the inductor charging time decreases. This feedback sequence returns the given system to a steady state in a short time.

Figure 7 shows the timing diagram of the opposite case, that is, the low-to-high load transition condition. For example, assuming that the load current of the first output channel suddenly increases, energy larger than expected is used to charge the first output, ${\mathrm{V}}_{\mathrm{O}1}$. Due to the nature of the OPDC method, which shares the energy charged by a single inductor, there is insufficient energy to charge the fourth output, which is the last output channel. The same situation may occur in the last output even when the load current of the second and third outputs suddenly increases. In this case, the converter suddenly suffers from a lack of energy, which results in cross-regulation, especially at the fourth output channel level, ${\mathrm{V}}_{\mathrm{O}4}$.

When the ${\mathrm{V}}_{\mathrm{O}4}$ level falls below the predefined level ${\mathrm{V}}_{\mathrm{O}4\mathrm{L}}$ because of the lack of energy, the Energy Shortage Detector (ESD) unit in Figure 5 generates a short high pulse ${\mathrm{V}}_{\mathrm{ES}}$ connecting the ${\mathrm{V}}_{\mathrm{Q}}$ node to a sufficiently high level ($2\mathrm{V}$). This expedites charging of the capacitor ${\mathrm{C}}_{\mathrm{Z}}$, and accordingly, the level of ${\mathrm{V}}_{\mathrm{Q}}$ increases significantly. This increases the time it takes to charge the capacitor ${\mathrm{C}}_{\mathrm{T}}$ on the other side, effectively increasing the ON time of the ${\mathrm{V}}_{\mathrm{DT}}$ signal, increasing the inductor charging time. However, this process generally causes the converter to extract more energy than it needs (overshoot occurs). Therefore, the system undergoes an additional energy redundancy state for a short period of time and returns to a steady state based on the operation described in the previous paragraph.

2.4. Stability Analysis of the Charge Control Loop

Due to feedback control inside the CCL, it is necessary to analyze stability issues to ensure normal operation under any circumstances. The feedback loop characteristics of the proposed hybrid SIMO converter are similar to those of the OVACC converter in [15] based on a pole-zero cancellation method using ${\mathrm{R}}_{\mathrm{Z}}$ and ${\mathrm{C}}_{\mathrm{Z}}$ to compensate for a possible instability problem. Based on the analysis of [15], the overall loop gain of the proposed system can be written as follows:

$$\mathrm{T}\left(\mathrm{s}\right)=\mathrm{G}\left(\mathrm{s}\right)\mathrm{A}\left(\mathrm{s}\right)=\frac{{\mathrm{g}}_{\mathrm{m}}{\mathrm{R}}_0{\mathrm{AR}}_{\mathrm{O}4}{\mathrm{C}}_{\mathrm{T}}}{\mathrm{T}}·\frac{1+{\mathrm{sC}}_{\mathrm{Z}}{\mathrm{R}}_{\mathrm{Z}}}{\left(1+{\mathrm{sC}}_{\mathrm{Z}}{\mathrm{R}}_0\right)\left(1+{\mathrm{sR}}_{\mathrm{O}4}{\mathrm{C}}_{\mathrm{O}4}\right)}$$

(1)

where $\mathrm{G}\left(\mathrm{s}\right)$ is a small signal transfer function, $\mathrm{A}\left(\mathrm{s}\right)$ is a transfer function of a compensation circuit, ${\mathrm{R}}_0$ is output resistance of the error amplifier, and all parameters except for ${\mathrm{R}}_{\mathrm{O}4}$, which represents the output resistance of output channel 4, come from the circuit configurations of Figure 2 and Figure 5.

Based on Equation (1), the compensation resistor and capacitor values, ${\mathrm{R}}_{\mathrm{Z}}$ and ${\mathrm{C}}_{\mathrm{Z}}$, for system stability can be determined. Since ${\mathrm{R}}_{\mathrm{Z}}$ and ${\mathrm{C}}_{\mathrm{Z}}$ determine the positions of the pole and zero of the transfer function, these values are used to stabilize the system under all load conditions. The proposed converter is designed with the following parameters ${\mathrm{g}}_{\mathrm{m}}=5 \mathrm{mA}/\mathrm{mV},{ \mathrm{R}}_0=99 \mathrm{M}\mathsf{\Omega }, \mathrm{A} =6000,{ \mathrm{C}}_{\mathrm{T}}=5 \mathrm{pF}, \mathrm{T}=1 \mathrm{us},{ \mathrm{C}}_{\mathrm{Z}}=200 \mathrm{pF},{ \mathrm{R}}_{\mathrm{Z}}=200 \mathrm{k}$, and ${\mathrm{R}}_{\mathrm{O}4}=2.4~1 \mathrm{k}\mathsf{\Omega }$. Figure 8 shows the frequency responses under two extreme load conditions (2.4 and 1000 Ohm) of the feedback loop to which the parameters presented here are applied. Note that the proposed converter system shows stable operation under all possible conditions with different loads and different frequencies. Here, the switching frequency of 1 MHz, where switching loss is not dominant over the total loss, is selected and responds quickly to changes in load current.

2.5. Inductor Current Sensor

In the proposed system, the amount of inductor energy is estimated by charging the capacitor ${\mathrm{C}}_{\mathrm{T}}$ through the replicated inductor current generated by the inductor current sensor inside the charge control loop in Figure 5.

As shown in Figure 9, the proposed system uses a conventional inductor current sensor consisting of a current mirror and an amplifier. The inductor current flowing through the upper switch transistor ${\mathrm{M}}_{\mathrm{P}}$ is copied through the lower switch transistor ${\mathrm{M}}_{\mathrm{P}}^{\prime }$, and the magnitude is reduced by the $\mathrm{A}$ coefficient. Here, factor $\mathrm{A}$ is selected as 6000 for our design to ensure proper charging time and loop stability. The amplifier in the final stage keeps the voltage level of the ${\mathrm{V}}_{\mathrm{LP}}$ and ${\mathrm{V}}_{\mathrm{X}}$ nodes approximately the same to accurately copy the inductor current.

3. Simulation Results

The proposed SIMO DC-DC buck converter was designed using a 0.18 μm 3.3 V CMOS process and validated with a program called Virtuoso, an integrated circuit design package from Cadence. The full chip layout of the proposed converter system, including PAD, power line connection, and power capacitors, is shown in Figure 10.

The total area including the pad is $2.275{ \mathrm{mm}}^2$ (1.75 mm × 1.3 mm), of which the core area is $0.658{ \mathrm{mm}}^2$. As can be seen from the area breakdown shown in

Table 1. Area breakdown of the proposed hybrid comparator-charge control SIMO DC-DC converter.

Components	$\mathbf{Area} \left(\mathbf{m}{\mathbf{m}}^2\right)$	Percentage (%)
Output Switch	0.287	43.6
Input Switch	0.194	29.4
Freewheeling Switch	0.058	8.8
Charge Control Loop	0.050	7.6
Comparators	0.027	4.0
Digital Logic	0.025	3.8
Current Sensor	0.018	2.8

, most areas are occupied by power switches and a freewheeling switch, while the main idea of our proposal, the hybrid comparator-charge control loop including the four items at the bottom of the table, consumes only $0.12{ \mathrm{mm}}^2$ of area corresponding to 18.2% of the core area.

To show the effectiveness of the proposed SIMO converter system, a simulation study was first conducted without a hybrid comparator-based and charge control technique. This means that all output channels are managed by the conventional OPDC control method introduced in [11]. In particular, when there is a change in the load condition of the first output (${\mathrm{I}}_{\mathrm{O}1}$ changes between 10 and 210 mA), the simulation results of the voltage levels of each output channel (${\mathrm{V}}_{\mathrm{O}1}$ through ${\mathrm{V}}_{\mathrm{O}4}$) are shown in Figure 11. Compared to the stable output voltage level from ${\mathrm{V}}_{\mathrm{O}1}$ to ${\mathrm{V}}_{\mathrm{O}3}$, the output voltage ${\mathrm{V}}_{\mathrm{O}4}$ of the last channel output shows severe fluctuations. This is because the system allocates most of the time resources to catch up with the change in the first channel, which lacked time and resources to stabilize the last output voltage level. Although the system consequently provided a stable output voltage, the output voltage undergoes an overshoot and undershoot of 300 mV, which is about 15% or more of the nominal voltage level, and the time taken to stabilize the output voltage (within 5% of the target voltage level) is about 404 µs.

The performance of the proposed converter system was checked under exactly the same load conditions after checking the performance of the conventional OPDC control method through load conditions changes, and the resulting waveform is shown in Figure 12. As illustrated in Figure 12, the ${\mathrm{V}}_{\mathrm{O}1}$ node had the same load current change from 10 mA to 210 mA, but simulation results show that only a slight voltage crop (~80 mV) occurred in the last output channel, and the voltage level of ${\mathrm{V}}_{\mathrm{O}4}$ was stabilized with 27 µs.

This shows that the proposed system improves the cross-regulation of the SIMO DC-DC converter by up to 73% in terms of voltage ripple and the maximum of 93% in terms of the time taken to stabilize the output voltage level. The system also shows an excellent performance under high-to-low load conditions occurring at a simulation time of about 2 ms. The additional waveform of ${\mathrm{V}}_{\mathrm{S}5}$ at the bottom represents the on/off control of the freewheeling switch. As discussed in the previous section, the freewheeling switch is turned on during an energy redundancy state to efficiently reuse the remaining energy of the inductor.

The power consumption breakdown of the proposed SIMO DC-DC converter with a hybrid controller with 405 mW output power is shown in Figure 13a. The total estimated power consumption of the proposed controller is 4.19 mW, and most of the power is consumed by the current sensor (63.8%) and comparators (20.2%). The remaining small portion of the power budget is used for the proposed hybrid control, which is about 16% of the controller power.

Figure 13b shows the overall estimated power conversion efficiency of the proposed converter for output power. The power conversion efficiency is derived from the ratio between (1) the sum of the input power from the input battery (voltage source) and the power used in the control block, and (2) the sum of each output channel power. For this efficiency calculation, 4.7 µF of the load capacitor was prepared at each output node, and then the load current was adjusted to sweep the output power from 50 to 650 mW. In the efficiency graph, the converter operates with good efficiency up to 650 mW of output power. Here, the maximum estimated efficiency is measured at 88.5% where the output power is 405 mW, with the input power of 453.4 mW and the controller power of 4.19 mW.

At the peak power efficiency point, the power loss in the system is estimated to be 48.4 mW, which includes multiple losses of various components. In order to analyze the power loss of the system, theoretical and simulated power losses are compared in

Table 2. Power loss breakdown of the proposed SIMO DC-DC converter.

	Theoretical Estimation	Simulation Result
Inductor Loss (${\mathrm{P}}_{\mathrm{inductor}}$)	2.64 mW	3.21 mW
Conduction Loss (${\mathrm{P}}_{\mathrm{conduction}}$)	11.28 mW	14.43 mW
Switching Loss (${\mathrm{P}}_{\mathrm{switching}}$)	26.81 mW	28.91 mW
ESR/Metal Line Loss	1 mW 1	1.85 mW
Total Loss	41.73 mW	48.4 mW

¹ Assumption is included.

. The method used for theoretical estimation was referenced in [20], where the detailed formulas are as follows:

$${\mathrm{P}}_{\mathrm{inductor}}={\mathrm{I}}_{\mathrm{rms}}^2{\mathrm{R}}_{\mathrm{inductor}},$$

(2)

$${\mathrm{P}}_{\mathrm{conduction}}={\mathrm{DI}}_{\mathrm{on}}{\mathrm{R}}_{\mathrm{on}},$$

(3)

$${\mathrm{P}}_{\mathrm{switching}}=\frac{1}{2}{\mathrm{V}}_{\mathrm{DD}}{\mathrm{I}}_{\mathrm{sw}}\left({\mathrm{t}}_{\mathrm{r}}+{\mathrm{t}}_{\mathrm{f}}\right){\mathrm{f}}_{\mathrm{sw}}$$

(4)

where ${\mathrm{I}}_{\mathrm{rms}}$ is rms current flowing through the inductor, ${\mathrm{R}}_{\mathrm{inductor}}$ is the resistance of the inductor, ${\mathrm{I}}_{\mathrm{on}}$ is the current flowing through the switch when the switch is on, ${\mathrm{R}}_{\mathrm{on}}$ is the resistance of the switch when it is on, ${\mathrm{V}}_{\mathrm{DD}}$ is the supply voltage, ${\mathrm{I}}_{\mathrm{sw}}$ is the current that flows when switching, and ${\mathrm{t}}_{\mathrm{r}}$ and ${\mathrm{t}}_{\mathrm{f}}$ are rising and falling time of the switching clock signal, respectively. Note that the formula for calculating ESR/Metal line loss was omitted and assumed to be 1 mW. Compared with theoretical calculations, the simulation results show numbers within a similar range when considering the total output power (about 400 mW) in peak power conversion efficiency.

4. Discussion

Table 3. Comparison with previous state-of-the-art designs.

	Ref [18]	Ref [16]	Ref [15]	Ref [17]	This Work
Published Year	2015	2018	2018	2020	-
Process	Discrete component	0.18 $\mathsf{\mu }\mathrm{m}$ CMOS	0.18 $\mathsf{\mu }\mathrm{m}$ CMOS	0.35 $\mathsf{\mu }\mathrm{m}$ CMOS	0.18 $\mathsf{\mu }\mathrm{m}$ CMOS
Control Method	Digital-based control	Single-discharge control	OVACC	Average-current control	Hybrid comparator-charge control
# of Outputs	2	4	5	4	4
Input Voltage (V)	3.3	2.7–3.7	3.3–4	2.5	3.3
Frequency (MHz)	0.05	1	1	1	1
Inductor	330 $\mathsf{\mu }\mathrm{H}$	4.7 $\mathsf{\mu }\mathrm{H}$	4.7 $\mathsf{\mu }\mathrm{H}$	4.7 $\mathsf{\mu }\mathrm{H}$	4.7 $\mathsf{\mu }\mathrm{H}$
Output Capacitor	2200 $\mathsf{\mu }\mathrm{F}$	10 $\mathsf{\mu }$F	10 $\mathsf{\mu }\mathrm{F}$	10 $\mathsf{\mu }\mathrm{F}$	4.7 $\mathsf{\mu }\mathrm{F}$
Load Step ${\Delta \mathrm{I}}_{\mathrm{L}}$ (mA)	260	100	250	300	200
Cross Regulation (mV/mA)	1.15	0.24	0.016	0.05	0.4
Area (${\mathrm{mm}}^2$)	N/A	6	5.52	7.2	2.275
Controller Area ($m{m}^2$)	N/A	1.105	0.64	2.769	0.12
Max. Efficiency (%)	90	73	86	89.5	88.5
Power Density @Max. Efficiency ($W/m{m}^2$)	N/A	0.033	0.101	0.054	0.178

shows a performance comparison table between the previous state-of-the-art SIMO DC-DC converter designs and the proposed design. Note that the result of the proposed converter was validated by simulation and the others were validated as prototypes. The proposed converter with a hybrid control system shows the highest power density in the maximum conversion efficiency due to its concise control block, which is less complex than other research works. In addition, the proposed system shows considerably better estimated power conversion efficiency than the system of [16], in which the freewheeling switch is always turned on at the end of one conversion cycle, through adaptive on/off control of the freewheeling switch. The proposed structure has peak power conversion efficiency similar to the prototypes of [15,17] using the same switching frequency and inductor size as in this work. In particular, the proposed structure used the same process as [15], and many blocks used in [15] are also used in this study. Therefore, the proposed structure is expected to achieve power conversion efficiency similar to that of the prototype of [15] even in the fabricated prototype chip. In the study of [18], a very large inductor was implemented using a discrete component to obtain high power conversion efficiency, but the proposed structure has large cross-regulation. Several previous control methods [15,17] show very small cross-regulation by applying a method of accurately calculating and predicting output power, but complex calculations require a large area and numerous control blocks. Although the estimated cross-regulation of the proposed converter is somewhat larger than its competitors, the decrease in area and power compensates for the shortcomings.

5. Conclusions

This research proposes a SIMO DC-DC converter with a hybrid control method, which (1) manages the voltage regulation of the first (n − 1) output channels based on a comparator and (2) manages the voltage regulation of the last output channel through a charge control loop. The proposed system provides sufficient regulation time for the first (n − 1) outputs based on the conventional OPDC method. In addition, the output voltage of the last channel remains stable despite large load condition changes. The main idea of this efficient resource use comes from a simple feedback loop that continuously monitors the current energy state of the system and compares it to the energy state available to the system at that moment. Depending on the comparison results, the charge control loop adaptively controls the amount of energy extracted from the input battery and the redundant energy of the system that needs to be stored back to the input battery. The prototype system was designed with a 0.18 um 3.3 V CMOS process, and its simulation results achieved a cross-regulation of 0.4 mV/mA and a power conversion efficiency of 88.5%.