The Modeling of GaN-FET Power Devices in SPICE

Abstract

This paper focuses on the problem of the modeling of FET power transistors made of gallium nitride offered by GaN Systems, Transphorm, and Nexperia. The considered devices have been available on the market since 2014. GaN-FETs are built as a cascade connection of a normally on gallium nitride HEMT and a normally off MOSFET made of silicon. On the manufacturer’s sites, one can find models of these devices for like-SPICE tools in the text form. The main goal of this paper is to evaluate the model’s accuracy by comparing calculation results obtained by the use of the considered models with the authors’ measurement results and datasheet. It has been demonstrated that the GaN Systems model built on controlled sources described by a set of arbitrarily selected mathematical functions more accurately reproduces the basic characteristics of a transistor. On the other hand, the models from Transphorm and Nexperia, which are constructed based on built-in semiconductor device models, more precisely calculate the values of selected functional transistor parameters.

1. Introduction

The dynamic development of electronics and power electronics presents new challenges, including the semiconductor technology of power devices that play an important role in modern electronic and power electronic systems. We observe two directions of development, which include new designs of semiconductor devices, new semiconductor materials, and the synthesis of these two directions of technological progress [1,2,3,4,5,6].

The increasing requirements for semiconductor power devices include high-voltage endurance, short switching times, and operation with higher power values and at higher temperatures [7,8,9,10,11,12,13]. For several decades, the attention of semiconductor power device technologists and designers has been focused on materials with high energy gap values, such as silicon carbide or gallium nitride.

The first commercially available device of this kind was the SiC-Schottky power diode produced by Infineon Technologies, which appeared on the market in 2001 [14]. In 2014, Efficient Power Conversion (EPC) developed and introduced the first gallium nitride field-effect transistor (GaN-FET) to the market [15]. GaN-FETs are currently offered by three manufacturers: GaN Systems [16], Nexperia [17], and Transphorm [18]. These transistors are designed to work in power systems such as power adapters, LED lighting drivers, fast battery chargers, power factor correction systems, appliance motor drives, wireless power transfer devices, PV inverters, etc.

The design of the above-mentioned power systems is currently carried out using specialized computer programs (e.g., SPICE program) [19], and the accuracy and correctness of the design require the use of models for all components of the system, especially the nonlinear models of semiconductor power devices. Manufacturers of GaN-FETs offer models of these devices in text form, usually dedicated to the PSPICE program (Transphorm, GaN Systems, Nexperia) or the LTSPICE [20] program (GaN Systems).

The authors of this paper aimed to evaluate the usefulness for an engineer–designer and the accuracy of the above-mentioned GaN-FET models dedicated to the PSPICE program. This was achieved by comparing simulation results using these models with data (characteristics, parameter values) provided in the datasheets, as well as with results from their own measurements, over a wide range of temperature changes.

The paper is organized as follows: Section 2 presents the construction and principle of operation of a GaN-FET. Section 3 discusses the models provided by the manufacturers in network form. Section 4 evaluates the accuracy of the models. Finally, the main results and conclusions are provided in Section 5.

2. GaN-FET Construction and Principle of Operation

The GaN-FET is a cascaded connection of two structures—an HEMT structure made of gallium nitride (normally on) and a silicon MOS transistor structure (normally off). The schematic diagram of the GaN-FET is shown in Figure 1. The internal drain (D_H), gate (G_H), and source (S_H) connections of the HEMT, as well as the corresponding connections of the MOS transistor (D_M, G_M, S_M) containing an antiparallel diode D_b (body diode), and the voltages between selected nodes of the considered circuit are marked on this diagram.

The GaN-FET can operate in one of four operating ranges: the partial cut-off range, the full cut-off range, the conduction range, and the inversion range [12,13,21,22]. In the partial cut-off range, when the gate-source voltage is lower than the MOS transistor threshold voltage (V_GSM < V_THM), and at the same time, when the (negative) gate-source voltage of the HEMT is higher than the threshold voltage of this transistor (V_GSH = −V_DSM > V_THH), the current flowing between the drain and source of the GaN-FET cascaded circuit is only blocked by the MOS transistor. The GaN-FET usually operates in the partial cut-off range when it is controlled by a drain-source voltage V_DS of a relatively low value, which does not effectively cut off the channel of the HEMT.

In the full cut-off range, both component transistors are turned off. The operation of the GaN-FET in this range relates to relatively large values of drain-source voltage. Then, a negative voltage lower than the threshold voltage of the HEMT (V_GSH = −V_DSM > V_THH) is applied to the gate of the HEMT.

In the conduction range, i.e., when the gate-source voltage value is higher than the MOS transistor threshold voltage (V_GSM > V_THM), both component transistors are turned on. The drain-source current of the GaN-FET flows through the channels of the HEMT and MOS transistors connected in series, and the resultant turn-on resistance of the GaN-FET depends on the turn-on resistance of the component transistors.

In the case of the inversion range (i.e., V_DS < 0), the HEMT is turned on, because the voltage is higher than its threshold voltage V_THH. In turn, the MOS transistor operates with inversion polarization (V_DSM < 0), and if the control voltage V_GSM > V_THM, then a current flow can occur not only through the body diode D_b but also through the channel of this transistor.

The use of a cascaded connection of HEMT and MOS transistors in the GaN-FET structure brings certain benefits. For example, due to the presence of the MOS transistor in the input circuit of the GaN-FET, it is possible to use gate control circuits dedicated to the classic MOS transistors [22,23]. Moreover, the recovery time of the body diode of the low-voltage MOS transistor situated in the GaN-FET structure can be multiple times (even 20 times) shorter than in the case of classic high-voltage Si-MOS transistors [23], which affects the switching speed of the GaN-FET.

On the other hand, the disadvantage of the discussed cascaded design is the occurrence of additional parasitic resistances and inductances resulting from electrical connections between the HEMT and MOS structures, as well as an increase in the input capacitance of the GaN-FET related to a classic HEMT of the comparable turn-on resistance value, which results from the relatively high input capacitance of the MOS transistor [22].

3. GaN-FET SPICE Models

On their websites, manufacturers offer [16,17,18] models of GaN-FETs in a text format for like-SPICE tools. Transphorm’s model [18] is intended only for the PSPICE program (for 15 types of transistors), the model developed by Nexperia [17] is dedicated only to the LTSPICE program (for 2 types of transistors), while GaN Systems [16] offers both a model for PSPICE and LTSPICE (for 21 types of transistors). Each of the above-mentioned producers provides a transistor model whose circuit form is identical for all types of GaN-FETs offered by them, with individual types of transistors described by unique sets of the model parameter values. To facilitate the description and evaluation of the complexity of the model, the authors have created their circuit versions.

In Section 3.1, Section 3.2 and Section 3.3, the forms of GaN-FET models offered by individual manufacturers are presented and discussed. To increase the readability of the schematic diagrams, individual model elements have been grouped into functional blocks labeled with letters A, B, C, etc.

3.1. Transphorm’s Model

Figure 2 shows the circuit diagram of the model offered by Transphorm [18]. As seen, the model consists of three built-in SPICE models of JFET transistors, one built-in model of an MOS transistor, six built-in pn diode models, two controlled current sources, one controlled voltage source, two independent voltage sources, twenty-five resistors, sixteen inductors, and three capacitors.

The elements in block A in Figure 2 are responsible for modeling the characteristics of the HEMT. The modeling of the channel current of this transistor is carried out in a circuit of three cascaded JFETs (J1A, J2A, J3A). The mentioned transistors differ from each other in terms of the values of the built-in model parameters, such as the threshold voltages VTO and parameters related to the internal capacitances of the transistor. The diodes DL1A and DL2A (block A) model the leakage currents of the HEMT, while the capacitor CJA models its drain-source capacitance.

The transistor MA, along with additional elements in block B, is responsible for modeling the characteristics of the MOS transistor. The controlled current sources FM1A and FM2A (block B), along with the auxiliary circuit (block D), model the nonlinear Miller capacitance. The diode DM1A, along with the resistor RMA, models the characteristics of the MOS transistor’s substrate diode.

The elements R and L marked in blocks C1, C2, and C3 model the parasitic resistances and inductances of the electrical connections of the GaN-FET. The elements Ri2A-Ri3A, Li1A-Li3A, CGDA1, and CGDA2 represent the parasitic resistances, inductances, and capacitances of the electrical connections between the HEMT and the MOS transistor structures.

3.2. Nexperia’s Model

Figure 3 shows the circuit diagram of Nexperia’s GaN-FET model [17]. The model uses design and functional solutions that are analogous to those used in Transphorm’s model. The model consists of 3 built-in JFET models, 1 built-in MOS transistor model, 1 built-in pn diode model, 6 controlled current sources, 13 controlled voltage sources, 6 independent voltage sources, 36 resistors, 19 inductive coils, and 14 capacitors.

The JFETs J1, J2, and J3 located in block A are responsible for modeling characteristics of the HEMT. Each JFET is described by a unique set of values of the built-in JFET model parameters. Block A also includes controlled sources, which, together with the auxiliary circuits placed in blocks A1–A5, are responsible for modeling the nonlinear internal capacitances of the HEMT connected between the gate and drain (elements: Gbcg1, Gbcg2, Gbcgd) and between the gate and source (Gcgs, Ebs). The efficiency of the controlled voltage sources in blocks A1–A5, describing changes in capacitance values as a function of voltage, has been implemented in a tabular form.

To model the MOS transistor characteristics, the elements in block B were used, with the MM-MOS transistor subcircuit shown in block B1. A tabularized function was used to model the Miller capacitance of the MOS transistor (source GB11). The passive elements visible in blocks C1–C4 model the resistances and parasitic inductances of the connections to the GaN-FET.

In turn, the elements RLi1A, Ri2A, Ri2B, Ri2C, RL335A, RCSUB, Ri3A, Li1A, Li2A, Li2B, Li2C, and Cldsub represent the resistances, inductances, and capacitances of the parasitic electrical connections between the HEMT and the MOS transistor structures.

3.3. GaN Systems Model

Figure 4 shows the circuit form of the GaN Systems transistor model [16]. The model consists of five current-controlled sources, four voltage-controlled sources, four independent voltage sources, seventeen resistors, and seven capacitors. In the construction of the considered model, current- and voltage-controlled sources were used to describe the GaN-FET characteristics. The elements existing in blocks A1 and A2 model the static characteristics of the transistor, whereas the channel current of the transistor is included in the description of the source G_switch.

To describe the gate-source and gate-drain nonlinear capacitances of the transistor, the elements located in block B1 were used. On the other hand, the drain-source capacitance is modeled using the elements in block B2. The auxiliary circuits located in block C are used to determine specific parameters of the system for calculating the junction capacitance of the transistor.

4. Evaluation of the Models’ Accuracy

To evaluate the accuracy of the manufacturers’ models discussed in Section 2, the shape of the static characteristics and the values of selected parameters of the GaN-FETs, obtained from simulations in the SPICE program, were compared with the characteristics obtained from the authors’ measurements, as well as those given in the transistors’ datasheets [24,25,26].

Three types of GaN-FETs were selected for this study—one from each manufacturer (Transphorm, Nexperia, GaN Systems).

Table 1. Catalog values of the functional parameters of the tested GaN-FETs at 25 °C.

Transistor Type	Parameter
	VDSmax	IDmax	PD	RON	VTH
TP65H035WSQA (Transphorm)	650 V	47.2 A	187 W	41 mΩ	4 V
GAN063-650WSA (Nexperia)	650 V	34.5 A	143 W	50 mΩ	3.9 V
GS-065-011-L (GaN Systems)	650 V	11 A	No data	150 mΩ	1.7 V

presents data on the values of selected functional parameters of the investigated transistors, namely, the maximum value of the drain-source voltage (V_DSmax), the maximum of the continuous drain current (I_Dmax), the maximum value of the dissipated power (P_D), the value of the on-state resistance (R_ON), and the value of the threshold voltage V_TH (typical value). The data in Table 1 are given for a temperature of 25 °C.

The measurements were performed over a wide range of ambient temperatures, that is, from 25 °C to the maximum allowed temperature specified in the transistor datasheet. The static characteristic measurements were carried out using the pulse method with 2651A and 2602A Keithley measuring sources. The test pulses had a duration of 100 µs and a repetition period of 10 s, to eliminate the influence of self-heating of the tested transistors on the shape of the characteristics. The tested transistors were placed in a thermal chamber, where the selected temperature was maintained during the measurement with an accuracy of ±0.1 °C.

The calculations were performed using the PSPICE software version 17.4 [19]. Each of the mentioned models was implemented into the program as a subcircuit. Circuit representations of the systems simulating the considered transistor characteristics were then created. In the case of simulating characteristics at different ambient temperatures, the value of the TEMP parameter in the PSPICE program was adjusted.

In the following part of the chapter, the output characteristics i_D(V_DS) and the transfer characteristics i_D(V_GS), as well as the temperature dependencies of two parameters, namely the on-resistance R_ON(T) and the threshold voltage V_TH(T), are considered. In the figures presented in this chapter, the solid lines represent the results of calculations, the unfilled points connected by a dashed line represent the catalog characteristics, and the filled points represent the results of the authors’ measurements. The accuracy of the models was evaluated based on the calculated value of the root-mean-square (RMS) Error.

Figure 5, Figure 6 and Figure 7 show the output characteristics i_D(V_DS) of the tested transistors for different gate-source voltages at two ambient temperatures.

As can be seen, a relatively good agreement between simulation and measurement results was achieved only in the case of the GaN Systems transistor model at both considered ambient temperatures (Figure 7). The value of the RMS error does not exceed 12%. On the other hand, the Transphorm and Nexperia transistor models reproduce the characteristics of the tested transistors (Figure 5 and Figure 6) incorrectly—there are significant quantitative differences between the calculation and measurement results, and the RMS error values reach approximately 260% and 50%, respectively. Despite this, all the considered semiconductor devices in the study are of the same type (GaN-FET), and it can be observed that the increase in ambient temperature can affect the output characteristics of these devices in two ways. For example, in Transphorm’s transistor, an increase in ambient temperature causes an increase in the drain current at constant values of V_GS and V_DS, while in the GaN Systems transistor, a decrease in the drain current with increasing ambient temperature can be observed. Apart from this, the dual nature of changes in the values of drain current due to temperature changes is also visible on the datasheet characteristics of Nexperia’s transistor. Therefore, at the operating point with V_GS = 6 V and V_DS = 3.5 V (point M marked in Figure 6), the temperature does not affect the values of the drain current. This point can therefore be called the thermal compensation point.

Figure 8, Figure 9 and Figure 10 show the temperature dependence of the drain current I_DSS of the considered transistors operating in the cutoff range (V_GS = 0) at a fixed value of the drain-source voltage equal to 100 V. Manufacturers do not provide such characteristics in their catalogs.

As seen, significant discrepancies between the simulation and measurement results were obtained for each transistor, which in the case of the GaN Systems transistor can reach up to two orders of magnitude. The measured temperature dependences of I_DSS for Transphorm’s and Nexperia’s transistors are nonlinear functions with a minimum located around a temperature of 100 °C, while the I_DSS(T) dependence of the GaN Systems transistor is approximately constant throughout the entire range of changes in ambient temperature.

On the other hand, Figure 11, Figure 12 and Figure 13 show the characteristics of the investigated transistors operating in the inversion range, which are mainly determined by the body diode Db (Figure 1) of the MOS transistor.

As seen, an acceptable agreement between the measurement and simulation results was obtained only for Transphorm’s transistor operating at a temperature of 25 °C and for the GaN Systems transistor at both considered ambient temperatures. It is worth noting that in Transphorm’s transistor and Nexperia’s transistor, the characteristics of the body diode at temperature 25 °C and the elevated ambient temperature intersect at the operating point at V_DS of about 1 V, which is not observed in other field-effect transistors containing a similar body diode (e.g., MOSFETs).

Figure 14, Figure 15 and Figure 16 show the ambient temperature (T_a) dependence of the threshold voltage V_TH of the considered transistors. The values of this parameter shown in these figures were determined for standard conditions specified in the datasheets of the studied transistors, i.e., at V_GS = V_DS and I_D = 1 mA, and for the GaN Systems transistor also at I_D = 10 mA.

As seen, an acceptable agreement between the simulation and measurement results was obtained only for Transphorm’s and Nexperia’s transistors at an ambient temperature of 25 °C. The measured threshold voltage value at a temperature of 25 °C for Transphorm’s and Nexperia’s transistors is approximately 4 V, while for the GaN Systems transistor it is approximately 2 V (at I_D = 10 mA), which is similar to the limits of the threshold voltage values (min./max.) provided in the datasheets.

The values of the temperature coefficient of the threshold voltage α_T obtained from the measured and calculated characteristics (Figure 14, Figure 15 and Figure 16) for the considered transistors are presented in

Table 2. Values of the α_T coefficient for the investigated transistors.

Transistor Type	αT Value [mV/°C]
	Measurements		Calculations
	Min.	Max.	Min.	Max.
TP65H035WSQA (at ID = 1 mA)	−9.1	−5.4	−1.2	−0.9
GAN063-650WSA (at ID = 1 mA)	−10.2	−5.8	−4.1	−3.7
GS-065-011-L (at ID = 1 mA)	−9.5	+8.7	+0.2	+0.6
GS-065-011-L (at ID = 10 mA)	−0.2	+3.2	+0.2	+0.6

.

The results of the measurements show that the V_TH(T) characteristic is not a linear function, so the temperature coefficient of change has a different value at different temperatures. Therefore, Table 2 provides the minimum and maximum values of α_T obtained from the graphs in Figure 14, Figure 15 and Figure 16.

As shown in Table 2, the values of the α_T coefficient obtained from the calculated characteristics significantly differ from the values obtained from the measured characteristics for each transistor.

Normalized values of the on-resistance of the studied transistors are shown in Figure 17, Figure 18 and Figure 19. The normalized value refers to an ambient temperature of 25 °C. The values of the on-resistance at various ambient temperatures were determined as the ratio of V_DS/I_D values at the operating points of the transistors with coordinates specified in Figure 17, Figure 18 and Figure 19.

As seen, a very good agreement between the simulation and measurement results was achieved for all transistors only at a temperature of 25 °C. It should be emphasized that the results presented in Figure 17, Figure 18 and Figure 19 relate to normalized values of R_ON, while the calculated and measured real values of R_ON for the tested transistors at 25 °C (indicated in Figure 17, Figure 18 and Figure 19) differ by even more than two times.

5. Conclusions

An accuracy assessment of GaN-FET models offered by GaN-Systems, Nexperia, and Transphorm was considered in this study. In order to compare the correctness of the models, the values of the RMS error between the calculated and measured characteristics from Figure 5, Figure 6, Figure 7, Figure 8, Figure 9, Figure 10, Figure 11, Figure 12, Figure 13, Figure 14, Figure 15, Figure 16, Figure 17, Figure 18 and Figure 19 are presented in

Table 3. Values of the RMS error for calculated and measured characteristics from Figure 5, Figure 6, Figure 7, Figure 8, Figure 9, Figure 10, Figure 11, Figure 12, Figure 13, Figure 14, Figure 15, Figure 16, Figure 17, Figure 18 and Figure 19.

Characteristic Type (Figure Number)	RMS Error Value
	Transphorm	Nexperia	GaN Systems
iD(VDS) (5, 6, 7)	258%	52%	18%
IDSS(T) (8, 9, 10)	-	36%	99%
iD(VSD) (11, 12, 13)	66%	186%	31%
VTH(T) (14, 15, 16)	16%	7%	118%
RONnorm(T) (17, 18, 19)	23%	29%	8%

. Based on the RMS error values for individual characteristics listed in the table, it can be seen that the GaN Systems model, constructed using controlled sources described by a set of arbitrarily chosen mathematical functions, more accurately reproduces the basic characteristics of the transistor, i.e., the output characteristics i_D(V_DS) and characteristics in the inversion range i_D(V_SD). In turn, the models from Transphorm and Nexperia, whose design is based on built-in semiconductor devices models, more precisely determine the values of selected functional parameters of the transistor, i.e., the dependence V_TH(T).

The shape of the output characteristics obtained by the Nexperia and Transphorm models, and in particular the shape changes of these characteristics resulting from changes in the ambient temperature, depend, i.e., on the values of the built-in semiconductor device model parameters that make up these manufacturer models. Improper selection of these parameter values by the manufacturer results in significant discrepancies between the simulation results and measurements (see Figure 5 and Figure 6) and even results in obtaining the inverse (compared with the measurement results) temperature dependence of the drain current at a fixed value of drain-source voltage.

The Transphorm and Nexperia transistor models, unlike the GaN Systems transistor model, contain extensive R-L circuits modeling inductances and parasitic resistances, both in the case of the external GaN-FET connections and the connections between the component HEMT/MOS transistors. This may have a significant impact on modeling the dynamic properties of the considered class of power devices.

The results of the presented research can be used by electronic designers in selecting an appropriate manufacturer’s model in the analysis of power electronic circuits containing modern GaN-FET transistors. So far, no GaN-FET transistor built-in model has been applied in the SPICE program. An important research issue in the near future will be the formulation of a universal model for the considered transistor class, enabling the calculation of the characteristics of various types of GaN-FET transistors offered by all manufacturers. From the point of view of using the evalutated transistors mainly when switching power systems, it is important to develop a model that correctly reproduces primarily the dynamic properties of these transistors and the impact of thermal phenomena, e.g., self-heating [9], on their parameters and characteristics.