Soft-Switching Full-Bridge DC-DC Converter with Energy Recovery Capacitor Snubber ^†

Abstract

This paper describes a high-frequency soft-switching dc-dc converter with a simple energy recovery capacitor snubber on the secondary side. The presented dc-dc full-bridge converter with the energy recovery snubber removes the main drawbacks of the classic Phase Shifted PWM (PS-PWM) dc-dc converter, e.g., the circulating current flowing during the free-wheeling interval and dependency of the soft switching on the load current. The converter utilizes a full-bridge topology with pulse-width modulation and a centre-tapped full-wave controlled rectifier with one active switch. The zero-voltage switching on the primary side is ensured by utilising only the magnetizing current of the high-frequency transformer, and thus is load-independent. The proposed energy recovery snubber is described in detailed time waveforms of the converter and verified by simulation. The control algorithm also removes the circulating current, which is typical for PS-PWM converters. The soft-switching of the secondary side transistor is achieved by a simple capacitor snubber with an energy-recovery circuit connected to the output of the dc-dc converter. The principle of operation is verified by measurements on a 2 kW, 50 kHz laboratory model of the proposed dc-dc converter.

1. Introduction

DC-DC converters play an important role in many applications, such as renewable energy sources, electric vehicles, battery chargers, etc. The efficiency of a dc-dc converter, as well as its size, are important parameters considered in its design. Modern power semiconductors, such as GaN devices, allow the dimensions of the dc-dc converter to decrease by increasing its switching frequency. However, this inevitably decreases the converter’s efficiency by increasing its switching losses [1]. Phase-shifted (PS) zero-voltage switching (ZVS) pulse-width modulated (PWM) full-bridge dc-dc converters are widely used in applications requiring constant frequency operation and the simple ZVS operation of transistors for a wide range of loads by utilising only the leakage inductance of the transformer and intrinsic output capacitance of the transistors [2,3,4]. However, ZVS is dependent on the energy stored in the inductors, which decreases with the amplitude of the current. Consequently, the PS-PWM full-bridge dc-dc converter cannot maintain the ZVS under light load conditions (low output current), as the energy accumulated in the leakage inductance of the transformer is insufficient to guarantee the discharge of the output capacitances of transistors in the lagging leg [5,6,7,8]. The energy needed to maintain the ZVS can be delivered by increasing the converter’s circulating current, leading to significant conduction losses and compromising the converter’s efficiency.

Over the years, various solutions were proposed to overcome the problem of the high sensitivity of ZVS for light load conditions and to remove or reduce the circulating current during the zero-voltage interval [9,10,11,12,13]. They usually require complex additional circuits and a snubber placed on the primary or secondary side of the converter [14,15,16]. The PS-PWM ZVS full bridge converter is prone to losing soft-switching at light loads, which is one of its main drawbacks. On the other hand, the resonant converters offer ZVS and good efficiency at light loads, but require variable switching frequency, which can limit or complicate their application [17,18,19,20]. Another way to maintain ZVS for a wide load range is to utilise load adaptive converters [21,22].

The aforementioned problems can be solved by using a controlled rectifier, especially when the application requires constant switching frequency. The circulating current on the primary side is caused by the reflected secondary current. The controlled rectifier disconnects the secondary side of the converter during the free-wheeling interval and effectively eliminates the circulating current. The circulating current is limited by the value of the transformer’s magnetising current, which also helps to reduce the switching losses of the primary transistors [5,23,24]. With the proper design of the converter, it is possible to maintain the ZVS of primary transistors by discharging its output capacitances during the dead-time interval only by utilising the magnetising current. This requires a well-designed transformer; however, it guarantees that the ZVS of the primary transistors will be load-independent. The dc-dc converter can incorporate an active snubber circuit to minimise the switching losses of the controlled rectifier. Various techniques and snubber circuits were designed for this purpose [5,6,7,8]. The capacitive snubber can minimise the turn-off losses by ZVS. The energy stored in the snubber capacitor should be recovered to maintain the high efficiency of the converter. Moreover, the capacitor snubber on the secondary side of the transformer can store the energy of the leakage inductance, which simplifies the transformer’s design.

This paper presents a novel soft-switching dc-dc full-bridge converter with a capacitor energy recovery turn-off snubber on the secondary side [24]. This solution ensures ZVS and zero-current switching (ZCS) of the primary transistors for the full-load range, ZVS for the transistor of the controlled rectifier and enables recovery of the energy from the snubber to the load. This paper is organised as follows: Section 2 describes the topology and principle of operation. The operation of the proposed dc-dc converter is described in time intervals. Section 3 presents the parameters of the laboratory model. The simulation results of the proposed dc-dc converter are described in Section 4. Section 5 comments on the measurement results of the laboratory model of the dc-dc converter. The discussion and conclusions of the obtained results are presented in Section 6 and Section 7.

2. Principle of Operation

2.1. Topology of the DC-DC Converter

The scheme of the proposed soft-switching dc-dc converter shown in Figure 1 comprises a full-bridge inverter (IGBT transistors T₁–T₄ and diodes D₁ to D₄), a high-frequency step-down transformer TR, a controlled rectifier (diodes D₅ and D₆ and MOSFET transistor T₅), an output filter (inductor L_O and capacitor C_O) and a free-wheeling diode D_O. The topology of the proposed converter is similar to the converter proposed in [5], but it utilizes only a single free-wheeling diode on the secondary side. The key element of the proposed dc-dc converter is the transistor T₅. It enables the ZC turn-off of primary transistors by decreasing the value of the primary current to the level of the magnetising current of the high-frequency transformer. Moreover, the transistor T₅ cancels the circulating current during a free-wheeling interval of the converter, and its duty cycle controls the output power of the converter. Some designs, e.g., [8,25] do not try to eliminate the circulating current and rely on the low conduction losses of modern semiconductor devices. However, this is only possible for low-voltage MOSFETs, as the converter in [25] is supplied from 48 V and its output power is 500 W. It is common to disconnect the output rectifier and thus cancel the circulating current for higher power levels [5,17].

The ZV turn-on of the primary transistors T₁–T₄ is achieved by discharging their output capacitances during a dead-time interval by the magnetising current of the transformer. The proper value of the magnetising current is guaranteed by the precise design of the high-frequency transformer T_R. The transistor T₅ would have significant switching losses if no snubber was implemented. Thus, an active turn-off snubber consisting of a snubber transistor T_S, two snubber diodes D_S1 and D_S2 and a snubber capacitor C_S is proposed in the paper. Its main task is to minimise the turn-off losses of the transistor T₅, absorb the energy of the transformer leakage inductance and recover the absorbed energy to the load. Compared to other similar designs [9,10,11,12,16,18], the proposed turn-off snubber uses only one capacitor and utilizes parasitic elements of the circuit.

2.2. Time Waveforms of the Proposed Converter

The primary transistors T₁–T₄ are controlled by PWM with a constant frequency of 50 kHz and 50% duty cycle with 1 µs dead-time. The secondary transistor T₅ is switching with a double switching frequency of 100 kHz and a variable duty cycle. This provides control over the output power of the dc-dc converter. The transistor T₅ is turned off before the primary transistors. This technique decreases the primary current to the value of the magnetising current and helps to remove the circulating current on the primary side. The output capacitance of the primary transistors is discharged by the magnetising current during the dead-time interval. This ensures ZCS and ZVS on the primary side of the converter. The snubber transistor T_S has the same switching frequency as the transistor T₅. It enables discharging of the snubber capacitor C_S to the load. The snubber capacitor C_S absorbs the energy of the leakage inductances of the transformer during transistor T₅ turn-off and creates a ZV turn-off condition for the transistor T₅. The operation of the proposed soft-switching dc-dc converter can be divided into nine intervals within one half-period of operation, which is depicted in Figure 2. The corresponding scheme for each operation interval is shown in Figure 3.

Interval (t₀–t₁): The primary transistor T₁ and T₂, together with the secondary transistor T₅, are turned on at t₀. This starts the commutation of load current I_O from the free-wheeling diode D₀ to the rectifier diode D₅ and rectifier transistor T₅. The leakage inductance of the high-frequency transformer limits the rate of rise of primary and secondary currents. The drain current of the rectifier transistor T₅ is defined as:

$$i_{DT5}=\frac{V_{IN}}{p{L}_{\sigma S}}\left(t-t_0\right),$$

(1)

where L_σS is the leakage inductance of the transformer referred to the secondary side and p is the transformer turn ratio.

The commutation of the load current from the free-wheeling diode D₀ to the rectifier transistor T₅ has a time duration of:

$$t_1-t_0=\frac{p{L}_{\sigma S}\left(I_O-\frac{\Delta I_{Lo}}{2}\right)}{V_{IN}},$$

(2)

This commutation ensures ZC turn-on of primary and secondary transistors. Moreover, the output capacitances of the primary transistors T₁ and T₂ are discharged from the preceding dead-time interval and, thus, its ZV turn-on is also ensured. The collector voltage of the transistor T_S is equal to the capacitor C_S voltage.

Interval (t₁–t₂): At t₁, the commutation between diode D₀ and diode D₅ has finished. The current of the transistor T₅ is conducting the whole load current I_O. The collector voltage of the transistor T_S is decreased by the value of the output voltage V_O. The snubber capacitor C_S is still charged to its maximum value from the previous cycle.

Interval (t₂–t₃): At t₂, the snubber transistor T_S is turned on. This starts the commutation between T_S and diode D₅. The rate of rise of the transistor T_S current is limited and, thus, its ZC turn-on is ensured. Turn-on of transistor T_S will connect the snubber capacitor C_S to the rectifier output. The rectifier current will commute to the snubber capacitor C_S, reducing the primary current. Additionally, the snubber capacitor is discharged by the load current and, if the value of the load current is sufficiently high, the snubber capacitor is completely discharged.

Interval (t₃–t₄): The snubber capacitor is discharged (ideally to zero) at t₃. The whole load current will commute back to the rectifier diode D₅. The snubber transistor T_S is turned off with zero current at t₃. The load current is conducted by the transistors T₁ and T₂ on the primary side. This is the main interval for energy transfer from the primary side to the secondary side of the dc-dc converter and its duration is controlled by the duty cycle of the transistor T₅.

Interval (t₄–t₅): The secondary transistor T₅ is turned off at t₄. The load current commutes through the snubber diode D_S1 to the snubber capacitor C_S. The rate of rise of the drain voltage of the transistor T₅ is limited by the charging of the snubber capacitor C_S by a peak value of the load current I_Lo.

$$v_{Cs}\left(t\right)=\frac{I_{Lo}}{C_S}\left(t-t_5\right),$$

(3)

The transistor T₅ is turned off under ZV condition. The snubber capacitor C_S is charged to the value of the secondary side voltage during the time interval:

$$t_5-t_4=\frac{C_S{V}_{IN}}{p{I}_{Lo}},$$

(4)

Interval (t₅–t₆): The voltage of the capacitor C_S reaches the value of the secondary rectified voltage at t₅. This will forward bias the free-wheeling diode D₀ and the current commutation from rectifier diode D₅ to the free-wheeling diode D₀. The commutation path contains the leakage inductance of the transformer and thus its whole energy is transferred to the snubber capacitor C_S. This will increase the secondary side voltage above the level of the rectified voltage defined by the input voltage and transformer turn ratio.

$$V_{Cs}\left(t_6\right)=\frac{V_{IN}}{p}+I_{Lo}\sqrt{\frac{L_{\sigma s}}{C_S}},$$

(5)

Interval (t₆–t₇): The primary current has reached the value of the magnetising current at t₆. There is no power transfer from the primary side to the secondary side. Energy to the load is supplied only by the smoothing choke L₀ and the output capacitor C_O. The control technique effectively removes the circulating current, which is typical for this time interval in classic PS-PWM converters.

Interval (t₇–t₈): The primary transistors T₁ and T₂ are turned off at t₇. They were conducting only a small magnetising current before their turn-off. Their turn-off can be considered as ZC due to the small value of the magnetising current compared with the primary current value during the previous intervals. Moreover, the output capacitances of transistors T₁ and T₂ are charged to the value of the supply voltage V_IN by a magnetising current of the transformer. This limits the rate of voltage rise and thus the transistors will be turned off under ZV condition. This whole process is time-limited, as it must be completed within the dead-time interval t_d with a minimum duration of:

$$t_d\ge \pi \sqrt{C_{OSS}{L}_{\sigma P}},$$

(6)

where C_OSS is the output capacitance of the primary IGBT transistors and L_σP is the leakage inductance of the transformer from the primary side. The higher the magnetising current the shorter the dead-time can be.

Interval (t₈–t₉): The output capacitances of transistors T₃ and T₄ are completely discharged, and the magnetising current is conducted only by free-wheeling diodes of primary transistors. Thus, the zero-voltage turn-on of transistors T₃ and T₄ is ensured in the next half-period.

2.3. Active Turn-Off Snubber

The controlled rectifier can solve the two major problems of a classic PS-PWM converter. The circulating current is completely reduced by the controlled rectifier, which is turned off prior to the primary transistors, significantly reducing the conduction losses of primary transistors. The second benefit is the ZV turn-on of primary transistors which is independent of the load current. Only the magnetising current of the transformer is used to charge and discharge the output capacitances of primary IGBT transistors. The ZVS is thus ensured for the whole load current range as the magnetising current is independent of the load current. However, there must be a snubber connected to the rectifier transistors to reduce its turn-off losses. The snubber needs to eliminate the switching losses of the secondary transistor T₅, accept the energy of the transformer’s leakage inductance and return this energy to the load. The complexity of the snubber should be as low as possible. The snubber presented in this paper contains only one transistor T_S, two diodes D_S1 and D_S2 and one capacitor C_S.

The energy accumulated in the snubber capacitor is returned to the load through the transistor T_S and thus the snubber can be considered energy recovering. There is no inductor in the snubber circuit, which reduces its complexity and price. The discharging current of the snubber capacitor is limited by the leakage inductance of the transformer as the load current commutes from the rectifier diode to the snubber transistor T_S.

3. DC-DC Converter Parameters

The converter parameters are summarized in

Table 1. Nominal parameters of the proposed dc-dc converter.

Parameter	Value
Supply voltage VIN	300 V
Output current IO	50 A
Output no-load voltage VO	50 V
Switching frequency fS	50 kHz
Dead-time td	1 µs

. The input voltage of 300 V can be easily obtained for a single-phase grid. The output no-load voltage (open circuit voltage) is high enough to initiate an arc for an MMA welder and is considered a minimum for a “good” welding machine. The output current of 50 A was chosen so the converter will achieve the output power of 2 kW. The switching frequency of the transistors T₁–T₄ is set to 50 kHz and the switching frequency of the rectifier transistors T₅ is set to 100 kHz. The proposed converter is sensitive to the parameters of the high-frequency transformer, mainly to its magnetising current. The magnetising current is used to discharge the output capacitances of the primary transistors during the dead-time interval. If the transformer has high magnetising inductance, the resulting magnetising current can be insufficient to completely discharge the output capacitances of primary transistors during the dead-time interval, and thus the ZV of the primary transistors would be lost. The leakage inductance is not so important as its energy is absorbed and returned to the load by the snubber capacitor.

A planar transformer with a sufficient magnetising current was used in the dc-dc converter. The converter was designed for low voltage and high current applications; thus, the step-down transformer was used. The transformer parameters are summarised in

Table 2. High-frequency transformer parameters.

Parameter	Value
Turn ratio p	5
Magnetising inductance Lm	630 µH
Leakage inductance on the primary side Lσ	1 µH
Operating frequency fS	50 kHz
The amplitude of the magnetising current	2 A

.

The correct operation of the proposed converter was verified on a 2 kW laboratory model. The parameters of the laboratory model are shown in

Table 3. Components of the laboratory model.

Parameter	Value
Primary transistors T1–T4 with diodes D1–D4	G4PSC71UD
Rectifier diodes D5 and D6	150EBU04
Snubber diodes DS1 and DS2	150EBU04
Secondary transistor T5	IRFP4668
Snubber transistor TS	IRFP4668
Snubber capacitor CS	100 nF
Smoothing choke LO	5 µH
Output capacitor CO	150 µF

. For verification measurements, the proposed dc-dc converter was supplied from an autotransformer with a full-bridge diode rectifier and was loaded by an electronic load. All parameters were set to the nominal values shown in Table 1. The IGBT transistors with an integrated diode G4PSC71UD were used on the primary side. The MOSFET transistor IRFP4668 was used for the rectifier (T₅) and the snubber transistor (T_S).

Ultrafast soft recovery diode 150EBU04 was used for the rectifier (D₅, D₆) and the snubber diodes (D_S1, D_S2). The laboratory model (Figure 4) was controlled by TMS320F28335 DSP by Texas Instruments. The control algorithm uses fixed gating pulses for primary and secondary transistors, as there was no control loop implemented.

4. Simulation Results

The simulation was performed in OrCAD/PSpice for nominal operating values of the dc-dc converter. The simulation scheme is shown in Figure 5. This section describes the basic characteristics and simulation time waveforms of the dc-dc converter.

The operation on the primary side of the transformer is shown in Figure 6. The primary current i_p consists of the magnetising current and the reflected secondary current. The magnetising current is utilised to discharge the output capacitances of IGBT transistors during the dead-time interval. This ensures ZV turn-on in both legs for full load range when compared with the classic PS-PWM dc-dc converter. The ZC turn-off is achieved by the controlled rectifier, which is turned off before the primary transistors. The primary current is lowered to the value of the magnetising current which is significantly lower than the reflected secondary load current. The controlled rectifier also eliminates the circulating current, which is typical for PS-PWM dc-dc converters. The operation of the energy recovery snubber on the secondary side is manifested by the decrease in the primary current. The power to the load is supplied by the snubber capacitor and the primary current goes to zero during the energy recovery process. The primary transistors have almost ideal soft-switching ZVZCS waveforms due to the controlled rectifier and a properly designed control algorithm.

The operation on the secondary side of the dc-dc converter is shown in Figure 7. The secondary transistor T₅ is turned off before the primary transistor T₁. The rate of rise of the drain voltage of the transistor T₅ is limited by a snubber capacitor C_S and, thus, a ZV turn-off is achieved. The snubber capacitor C_S is ideally discharged to zero before the transistor T₅ is turned off. Additionally, the snubber capacitor C_S is charged to a voltage higher than the drain voltage of the transistor T₅ because it also absorbs the energy of the leakage inductance of the transformer.

Figure 8 shows the detailed operation of the capacitor snubber. The drain current of the transistor T₅ commutes to the snubber diode D_S1 and the snubber capacitor C_S at its turn-off. This charges the snubber capacitor to the voltage that is defined by its capacitance and the value of the load current. The snubber capacitor is discharged through the snubber transistor T_S in a resonant way and its energy is returned to the load.

This process is better shown in Figure 9, where the drain current and voltage of the snubber transistor T_S are shown. The snubber transistor conducts only the resonant half-period of the discharging current, and is thus switching under ZC turn-on and turn-off. The discharge current of the snubber capacitor is subtracted from the current of the rectifier diodes D₅ and D₆ as the energy for the load is supplied by the snubber capacitor during this time interval.

5. Measurement Results

The operation of the dc-dc converter was verified by a measurement on a laboratory model. The converter was supplied by a fixed dc voltage V_IN = 300 V and its output current was controlled by an electronic load. The measurement was performed for a fixed duty cycle of the second transistor T₅.

The operation on the primary side of the dc-dc converter is shown in Figure 10. The output capacitance of the IGBT transistor T₁ is discharged during the dead-time interval before its turn-on. Moreover, the magnetising current is conducted by an in-body antiparallel diode D₁. The primary transistor T₁ is thus turned on under ideal ZV condition. Also, the rate of rise of its collector current is limited by the leakage inductance of the transformer.. The secondary transistor T₅ is turned off prior to the primary transistor T₁. This ensures that the primary current is decreased to the value of the magnetising current, which is subsequently turned off by the transistor T₁, ensuring an almost ZC turn-off process. The magnetising current is used to charge the output capacitance of the transistor T₁ during the dead-time interval. The described switching of the transistor T₁ can be considered completely soft under ZVZCS condition. The primary side of the converter operates in accordance with the simulation and its operation is independent of the load current (Figure 7). Additionally, the circulating current on the primary side is removed with the help of the controlled rectifier, which leads to a significant decrease in the conduction losses of the primary transistors. Moreover, shortly after T₁ turn-on, the snubber transistor T_S is turned on, which initiates the discharging of the snubber capacitor C_S and recovery of its energy to the load. This is manifested by a decrease in the primary current (Figure 11) and the collector current of the primary transistor (Figure 10) as the energy for the load is supplied from the snubber capacitor C_S. The switching of the remaining three transistors is identical to the above-described process, as documented in summary by Figure 11, where the time waveforms on the primary side of the transistor are shown.

Switching on the secondary side is divided between the rectifier transistor T₅ and the snubber transistor T_S. The switching of the rectifier transistor is shown in Figure 12. The rate of rise of its drain current is limited by the leakage inductance of the transformer, and it turns on with ZC condition. Its duty cycle controls the energy flow to the load and is limited by the duration of the time interval t₄–t₆ needed for charging the snubber capacitor C_S. The transistor T₅ is turned on with ZC condition. This is guaranteed by the leakage inductance of the transformer as it limits the commutation of the load current (time interval t₀–t₁ in Figure 2). At its turn-off, the rate of rise of its drain voltage is limited by the snubber capacitor C_S, and thus is turned off under ZV condition (time interval t₄–t₅ in Figure 2). The small overvoltage at its turn-off is caused by the parasitic inductance in the commutation circuit, which cannot be minimised any further because of the discrete components used in the converter. The commutation circuit consists of the transistor T₅, snubber diode D_S1 and snubber capacitor C_S. This is the most critical point of the prototype design in order to maintain the designed switching characteristics.

The soft-switching of the secondary transistor T₅ is documented by the trajectory of its operating point, shown in Figure 13. The operating point remains away from the area of high switching losses. The snubber capacitor C_S is discharged to the load through the snubber transistor T_S. Its switching is shown in Figure 14. The transistor is turned on shortly after the primary transistors. Its drain current is created by a resonant half-period of the discharging current. Thus, it is turned on and off under ZC condition in a resonant way. Its switching is thus completely soft and is documented by a switching trajectory shown in Figure 15. The measured switching waveforms of the secondary side transistors are in accordance with the simulation (Figure 8 and Figure 9).

The measurement of the proposed energy recovery snubber is shown in Figure 16. The snubber capacitor C_S is charged to the full voltage from the previous half-period before the transistor T₅ is turned on. The snubber capacitor needs to be discharged before the secondary transistor T₅ is turned off. Its discharge is initiated by the turn-on of the snubber transistor T_S shortly after the turn-on of the secondary transistor T₅. This will transfer the energy from the snubber capacitor to the load and subsequently decrease the primary current.

Depending on the load current, the snubber capacitor is discharged down to zero. The transistor T₅ carries the whole load current during the discharge process. However, the primary current is decreased by the value of the reflected discharging current (Figure 10). The main operation of the snubber is to maintain the ZV turn-off of the secondary transistor T₅. At the turn-off of the secondary transistor T₅, its drain current commutes to the snubber capacitor C_S and snubber diode D_S1. The rate of rise of drain voltage is thus limited by the snubber capacitor C_S. The higher the value of the capacitor, the slower the rise of the drain voltage of transistor T₅. However, if the snubber capacitor is too large, it will be problematic to guarantee its complete discharge under light loads. This will in return lead to a step change in the drain voltage of transistor T₅ during its turn-off and the ZV turn-off will be compromised.

The efficiency of the proposed soft-switching dc-dc converter was measured for two different values of the duty cycle of the secondary transistor T₅ and constant supply voltage V_IN (Figure 17). The load current was controlled by an electronic load and the efficiency was measured by a precision power analyser.

The efficiency was calculated online on the power analyser LMG 500, made by ZES Zimmer, during the experiment from the values of the converter’s input and the output currents and voltages. The converter was operated in a continuous conduction mode. The maximum efficiency of the converter was 91.7%.

The maximum efficiency of the converter was limited mainly by the free-wheeling diode D₀. The diode D₀ conducts a significant part of the load current for smaller duty cycles of the secondary transistor T₅, and its conduction losses make up a significant part of the total losses of the converter. The efficiency curve has a slight decline for higher output currents. This is caused by increasing conduction losses as the switching losses are minimised. Additionally, the losses of the free-wheeling diode D₀ are mainly influenced by the duty cycle and not by a load current, as can be seen in Figure 17. The impact of the free-wheeling diode D₀ losses is illustrated in Figure 18. The diode D₀ is the component with the highest temperature even though it has the same heatsink properties as the secondary transistor T₅. The increase in the duty cycle of the secondary transistor T₅ significantly increases the overall efficiency of the converter. This drawback could be solved by applying a synchronous rectifier. The converter operates with low output voltage so the low-voltage MOSFET could be used instead of the free-wheeling diode. Another possibility would be to use a current doubler. However, it would complicate the application of the designed energy recovery snubber, and the control of the output voltage would have to be transferred to the primary side [26].

6. Discussion

The classic PS-PWM dc-dc converters have typical problems with circulating current and losing ZVS for light loads, especially in the lagging leg. The proposed soft-switching dc-dc converter with energy recovery snubber can overcome these main drawbacks. The ZVS on the primary side is maintained by the magnetising current and is load-independent. The converter only requires a sufficient magnetising current and the dead-time interval, during which the output capacitances of the primary transistors are discharged. The lagging current, enough energy stored in the inductor and sufficient time for output capacitance discharging are typical requirements for ZVS. It is easy to guarantee all of them in the proposed converter for the full load range. This technique is also adopted in [5] with good results. The circulating current on the primary side is removed by the controlled rectifier. Thus, the primary side transistors have ZV turn-on and ZC turn-off, which are ideal switching conditions for IGBT transistors and there is small space for improvements.

The controlled rectifier, namely the transistor T₅, is switching the full load current and would have significant switching losses if no snubber had been applied. To overcome this problem, a novel energy recovery snubber was designed to guarantee the ZV turn-off of the transistor T₅. The snubber effectively removes the turn-off losses of the transistor T₅ by applying the ZV turn-off. This is documented with the help of simulation and measurements. The snubber capacitor is discharged to the load in a resonant way which ensures the ZC turn-on and turn-off of the snubber transistor T_S (Figure 16). The minimum voltage to which the snubber capacitor is discharged depends on the load current, which compromises the ZV turn-off of the transistor T₅ for a small load current. The parasitic inductance in the commutation circuit between the transistor T₅ and the snubber capacitor C_S could be optimised. The significant losses on the secondary side come from the free-wheeling diode D₀. Especially for smaller duty cycles of the transistor T₅, the diode D₀ conducts a significant part of the load current, which increases the conduction losses. The conduction losses can be reduced by applying the synchronous rectifier, which is the improvement potential of the proposed dc-dc converter.

The proposed converter can be used in welding applications or any application requiring low voltage and high output current, e.g., battery chargers for electric vehicles, dc-dc converters for data and communication centres, LED lighting applications and power electronic transformers [27].

7. Conclusions

The presented dc-dc full-bridge converter with the energy recovery snubber removes the main drawbacks of the classic PS-PWM dc-dc converter, such as load dependant ZVS and circulating current. The proposed energy recovery snubber is described in detailed time waveforms of the converter and verified using simulation and measurements. The laboratory model of the proposed dc-dc converter was built, and its correct operation was verified with nominal operating conductions. All measurements are in correlation with theoretical analysis and simulation. The overall efficiency of the converter is dependent on the duty cycle of the secondary transistor and its maximum value for the duty cycle of 75% was 91.7%. The overall efficiency of the converter can be improved mainly by reducing the conduction losses of the free-wheeling diode. The proposed converter can be utilised in a variety of applications requiring one-way energy transfer.