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Article

Experimental Evaluation of a 2 kW/100 kHz DC–DC Bidirectional Converter Based on a Cuk Converter Using a Voltage-Doubler Concept

by
Wanderson Francisco Lopes
1,
Mário Lúcio da Silva Martins
2,
Attilio Converti
3,*,
Hugo Valadares Siqueira
1 and
Carlos Henrique Illa Font
1
1
Graduate Program in Electrical Engineering, Federal University of Technology—Paraná—UTFPR, Ponta Grossa 84017-220, PR, Brazil
2
Graduate Program in Electrical Engineering, Federal University of Santa Maria—UFSM, Santa Maria 97105-900, RS, Brazil
3
Department of Civil, Chemical and Environmental Engineering, University of Genoa, Pole of Chemical Engineering, Via Opera Pia, 15, 16145 Genoa, Italy
*
Author to whom correspondence should be addressed.
Energies 2024, 17(2), 362; https://doi.org/10.3390/en17020362
Submission received: 1 November 2023 / Revised: 24 December 2023 / Accepted: 8 January 2024 / Published: 11 January 2024
(This article belongs to the Special Issue Green Technologies for Energy Transition)

Abstract

:
This paper presents a theoretical analysis of steady-state operation, control-oriented modeling for voltage control, and the experimental results of a DC–DC bidirectional converter based on a Cuk converter using a voltage-doubler concept. Due to the voltage-doubler concept, the voltage stress across semiconductors is reduced when compared with the conventional Cuk converter; this allows for the use of semiconductors with reduced drain–source on-resistance. Moreover, due to the input and output current source characteristics, the converter presents advantages, such as draining/injecting currents on both sides with low-ripple currents. Furthermore, the theoretical analysis is verified by experimental results obtained from a proof-of-concept prototype designed with a 250 V input voltage, a 360 V output voltage, 2 kW rated power, and 100 kHz switching frequency.

1. Introduction

In DC microgrids, the interactions between energy storage devices and renewable energy sources have intensified in recent years, as these interactions result in stable, reliable, and efficient systems [1,2,3,4].
Energy storage devices are crucial in the operation of DC microgrids. A battery is a commonly used type of storage device and can be independently connected to a DC microgrid or function as distributed power hybrid resources.
Figure 1 presents a block diagram of the power stage of a residential DC microgrid where the battery energy storage system (BESS) and the bidirectional DC–DC converter are highlighted. Between the BESS and the DC bus, there is a bidirectional DC–DC converter, which can transmit energy in both directions. This converter is responsible for controlling the direction of the power flow and for regulating the DC bus [5]. Figure 1 also presents the typical voltage levels of each component of the DC microgrid and the DC bus for two different grid voltage levels [6,7,8,9,10].
Research on bidirectional DC–DC converters for connection with DC microgrids has been explored widely in recent years [11,12,13,14,15]. The bidirectional converter is generally based on conventional topologies, such as Buck/Boost, Buck-Boost, Cuk, and SEPIC/Zeta converters.
In the solutions based on Buck, Boost, and Buck–Boost converters, the current that charges the battery bank has a pulsating high-frequency component; this is because the converters have an input/output with voltage source characteristic. Therefore, additional filters must be used in the output of the bidirectional converter [13,16,17]. Moreover, according to [18], the high-frequency AC component can reduce the battery life because it can cause additional heat generation within the battery pack.
Ideally, the battery should be charged and discharged with a continuous current so the battery life will increase. The most appropriate converters for charging batteries are those with natural inductors in the output, such as the Buck, Zeta, and Cuk converters [19,20,21,22,23,24,25,26,27,28].
This paper aims to present the modeling and control of a DC–DC bidirectional converter based on a Cuk converter using a voltage-doubler concept. This concept reduces the maximum voltage level across semiconductors and allows the use of devices with lower voltage ratings, which increases overall efficiency. As a disadvantage, the component count is increased.
The proposal for the DC–DC bidirectional Cuk converter is presented in Section 2. Section 3 of this paper describes a control-oriented model for output voltage control. A compensator design is presented in Section 4. Finally, experimental results from a proof-of-concept prototype are presented in Section 5.

2. The Proposed DC–DC Bidirectional Converter Based on a Cuk Converter

The DC–DC bidirectional converter based on a Cuk converter using the voltage-doubler concept is shown in Figure 2. It is formed by three inductors, two capacitors, and four switches, which operate in a complementary mode. The converter maintains the characteristics of the current source on both sides, as is the case with the conventional Cuk converter, draining/injecting currents with low ripple.
In a conventional Cuk converter, the average voltage in the capacitor is equal to the sum of the input voltage with the output voltage. However, in the proposed topology, the average voltage across the capacitors is equal to the sum of half of the input voltage and half of the output voltage.

2.1. Operating Stages

As a bidirectional converter, the power can flow from voltage sources V1 and V2 to voltage source V3 and vice versa. It is defined that when the power flows from voltage sources V1 and V2 to voltage source V3 it is the direct mode. Otherwise, when the power flows from voltage source V3 to voltage sources V1 and V2, it is the reverse mode.
For each mode of operation, there are two operating stages in a switching period for continuous conduction mode (CCM). The operating stages are described as follows:
1st Operating Stage—Direct Mode: This operating stage is illustrated in Figure 3a. It starts when switches S1 and S3 are turned on while switches S2 and S4 remain blocked. During this operating step, source V1 transfers energy to inductor L1 through switch S1, source V2 transfers energy to inductor L2 through switch S3, and inductor L3 is also charged with the energy of capacitors C1 and C2.
2nd Operating Stage—Direct Mode: This stage starts when switches S1 and S3 are turned off and switches S2 and S4 are turned on. In this operating stage, inductor L1 discharges, thus charging capacitor C1; in the same way, inductor L2 discharges, supplying energy to capacitor C2, and inductor L3 supplies energy to source V3. This operating stage is illustrated in Figure 3b.
1st Operating Stage—Reverse Mode: This operating stage resembles the 2nd operating stage in the direct mode; it starts when switches S2 and S4 are turned on and switches S1 and S3 remain blocked. The source V3 transfers energy to inductor L3 through switches S2 and S4, and capacitors C1 and C2 discharge through switches S2 and S4, transferring energy to inductors L1 and L2. This first operating stage is illustrated in Figure 4a.
2nd Operating Stage—Reverse Mode: This stage starts when switches S2 and S4 are turned off, while switches S1 and S3 are turned on. In this operating stage the inductor L3 discharges, thus charging capacitors C1 and C2; the inductors L1 and L2 also discharge, transferring energy to sources V1 and V2. This operating stage is illustrated in Figure 4b.

2.2. Main Ideal Waveforms

Figure 5 and Figure 6 show the main ideal waveforms for a switching period. They present the waveforms of the command signals of the switches and the current and voltage in inductors, switches, and capacitors, for both direct and reverse modes of operation, respectively.
When analyzing the waveforms, it is possible to observe that:
-
the currents in all inductors are composed of a continuous current with a high-frequency ripple;
-
the maximum voltage across the switches is equal to the sum of half of the input voltage and half of the output voltage;
-
the current of the switches is equal to the sum of the current in the inductors;
-
the voltage across the capacitors is equal to the sum of half of the input voltage and half of the output voltage.

2.3. Static Gain

In both modes of operation, the volt-second balance is applied to the inductors to obtain the static gain (M) of the converter. The static gain for the direct mode is presented in (1), and the static gain for the reverse mode is presented in (2). We observed that, in both modes of operation, the same equation is obtained for M, as a function of duty cycle (D), and it is equal to the same static gain of a conventional Cuk converter operating in CCM.
Therefore, the converter has the same behavior as a Cuk converter in both modes of operation and would be named a Cuk/Cuk DC–DC bidirectional converter.
M = V o V i = V 3 V 1 + V 2 = D 1 D
M = V o V i = V 1 + V 2 V 3 = D 1 D

2.4. Control and PWM Scheme

The output voltage control circuit of a bidirectional Cuk converter follows the block diagram shown in Figure 7.

2.5. Comparative Analysis

A comparative analysis of the proposed bidirectional converter with a conventional bidirectional Cuk converter can be found in Table 1. The voltage-doubler concept has the advantage of reducing the stress across the switches, allowing the use of devices with lower voltage ratings, which increases overall efficiency. As a disadvantage, the component count is increased.

3. Control-Oriented Model for Voltage Control

The purpose of the control-oriented model is to obtain algebraic transfer functions (TF) that describe the dynamics of the converter and then to use these transfer functions in the control system design. The converter is modeled using the average value of state variables technique.
The voltage source on the output side is modeled by an RC (resistive–capacitive) load. Therefore, the topology of the converter is redrawn and reshown in Figure 8 for an ideal converter (without losses) and in Figure 9 for a converter with losses (it considers a resistance in series with each inductor). One can observe that the converter has six energy storage elements in the direct mode and seven energy storage elements in the reverse mode.
As presented in Figure 7, the controlled variable is the output voltage (vo), and the control variable is the converter’s duty cycle (d).

3.1. Linearized Transfer Function in the Direct Mode without Losses

Based on Figure 8a, the analysis of the two operating stages was performed, and the differential equations of the average value of the inductor voltages, as well as the equations of the average capacitor currents, were obtained. These equations are presented in (3)–(8), where d is the duty cycle and d’ is the complementary duty cycle (e.g., equal to 1-d).
L 1 d i L 1 ( t ) T s d t = v 1 ( t ) T s . d t + v 1 t T s v C 1 t T s . d t
L 2 d i L 2 ( t ) T s d t = v 2 ( t ) T s . d t + v 2 t T s v C 2 t T s . d t
L 3 d i L 3 ( t ) T s d t = ( v C 1 ( t ) T s + v C 2 ( t ) T s v o t T s ) . d t v o t T s . d t
C 1 d v C 1 ( t ) T s d t = i L 3 ( t ) T s . d t + i L 1 ( t ) T s . d t
C 2 d v C 2 ( t ) T s d t = i L 3 ( t ) T s . d t + i L 2 ( t ) T s . d t
C o d v o ( t ) T s d t = i L 3 ( t ) T s v o ( t ) T s R
For the linearization process, each variable in Equations (3)–(8) is rewritten as the sum of a constant value and a small-signal variable. The constant value represents the operation point (steady-state value), and the small-signal variable represents a perturbation around the operation point; it is denoted by a ^ mark in the variable.
By simplifying the resulting equation, disregarding the continuous and nonlinear components, using only the remaining first order terms to perform the dynamic analysis of the plant, and applying the Laplace Transform, Equations (9)–(14) are obtained.
L 1 . i ^ L 1 s . s = 1 D . v ^ C 1 s + V C 1 . d ^ ( s )
L 2 . i ^ L 2 s . s = 1 D . v ^ C 2 s + V C 2 . d ^ ( s )
L 3 . i ^ L 3 s . s = ( v ^ C 1 s + v ^ C 2 ( s ) ) . D + V C 1 + V C 2 . d ^ ( s ) v ^ o ( s )
C 1 . v ^ C 1 s . s = 1 D . i ^ L 1 s I L 1 + I L 3 . d ^ s i ^ L 3 s . D
C 2 . v ^ C 2 s . s = 1 D . i ^ L 2 s I L 2 + I L 3 . d ^ s i ^ L 3 s . D
C o . v ^ o s . s = i ^ L 3 ( s ) v ^ o ( s ) R
To solve the linear system created by Equations (9)–(14), Equation (15) is obtained, which represents the linearized transfer function for output voltage control.
T F 1 ( s ) = v ^ o ( s ) d ^ ( s ) = A 2 . s 2 + A 1 . s + A 0 B 4 . s 4 + B 3 . s 3 + B 2 . s 2 + B 1 . s + B 0
where:
  • A2 = 2.R.C1.L1.VC1
  • A1 = −2.D.L1.(IL1 + IL3).R
  • A0 = −2.R.VC1.(D − 1)
  • B4 = R.C1.L1.L3.Co
  • B3 = C1.L1.L3
  • B2 = R.((2.(L1 + (1/2).L3)).Co.D2 − 2.Co.L3.D + C1.L1 + Co.L3)
  • B1 = (2.L1 + L3).D2 − 2.L3.D + L3
  • B0 = R.(D − 1)2

3.2. Linearized Transfer Function in the Reverse Mode without Losses

Based on Figure 8b, we performed the analysis of the two operating stages and obtained the differential equations of the average value of the inductor voltages and the equations of the average capacitor currents. These equations are presented in (16)–(22).
L 1 d i L 1 ( t ) T s d t = v C 1 t T s v o t T s 2 . d t v o t T s 2 . d t
L 2 d i L 2 ( t ) T s d t = v C 2 t T s v o t T s 2 . d t v o t T s 2 . d t
L 3 d i L 3 ( t ) T s d t = v 3 t T s . d t + ( v 3 t T s v C 1 t T s v C 2 t T s ) . d t
C 1 d v C 1 ( t ) T s d t = i L 1 t T s . d t + i L 3 ( t ) T s . d t
C 2 d v C 2 ( t ) T s d t = i L 2 t T s . d t + i L 3 ( t ) T s . d t
C o 1 d v 1 ( t ) T s d t = i L 1 t T s v o t T s R
C o 2 d v 2 ( t ) T s d t = i L 2 t T s v o t T s R
By applying the same linearization technique aforementioned, we obtained Equations (23)–(29).
L 1 . i ^ L 1 s . s = D . v ^ C 1 s + V C 1 . d ^ s v ^ o ( s ) 2
L 2 . i ^ L 2 s . s = D . v ^ C 2 s + V C 2 . d ^ s v ^ o ( s ) 2
L 3 . i ^ L 3 s . s = 1 D . v ^ C 1 s 1 D . v ^ C 2 s + V C 1 + V C 2 . d ^ ( s )
C 1 . v ^ C 1 s . s = 1 D . i ^ L 3 s I L 1 + I L 3 . d ^ s D . i ^ L 1 s
C 2 . v ^ C 2 s . s = 1 D . i ^ L 3 s I L 2 + I L 3 . d ^ s D . i ^ L 2 s
C o 1 . v ^ 1 s . s = i ^ L 1 ( s ) v ^ o ( s ) R
C o 2 . v ^ 2 s . s = i ^ L 2 ( s ) v ^ o ( s ) R
By solving the linear system created by Equations (23)–(29), we obtained (30), which represents the linearized transfer function for output voltage control.
T F 2 ( s ) = v ^ o s d ^ ( s ) = A 2 . s 2 + A 1 . s + A 0 B 4 . s 4 + B 3 . s 3 + B 2 . s 2 + B 1 . s + B 0
where:
  • A2 = 2.R.C1.L3.VC1
  • A1 = −2.D.L3.(IL1 + IL3).R
  • A0 = −4.R.VC1.(D − 1)
  • B4 = R.C1.L1.L3.Co1
  • B3 = 2.C1.L1.L3
  • B2 = R.(((2.L1 + L3).D2 − 4.D.L1 + 2.L1).Co1 + C1.L3)
  • B1 = (4.L1 + 2.L3).D2 − 8.D.L1 + 4.L1
  • B0 = 2.R.(D − 1)2

3.3. Linearized Transfer Function in the Direct Mode with Losses

Based on Figure 9a, we performed the analysis of the two operating stages and obtained the differential equations of the average value of the inductor voltages, as well as the equations of the average capacitor currents. These equations are presented in (31)–(36), where d is the duty cycle and d’ is the complementary duty cycle (e.g., equal to 1-d).
L 1 d i L 1 ( t ) T s d t = { ( v 1 ( t ) T s v R L t T s ) . d t                                                   + v 1 ( t ) T s v R L t T s v C 1 t T s . d t }
L 2 d i L 2 ( t ) T s d t = { ( v 2 ( t ) T s v R L t T s ) . d t                                                   + v 2 ( t ) T s v R L t T s v C 2 t T s . d t }
L 3 d i L 3 ( t ) T s d t = { ( v C 1 ( t ) T s + v C 2 ( t ) T s v R L t T s v o t T s ) . d t                                                   ( v o t T s + v R L t T s ) . d t }
C 1 d v C 1 ( t ) T s d t = i L 3 ( t ) T s . d t + i L 1 ( t ) T s . d t
C 2 d v C 2 ( t ) T s d t = i L 3 ( t ) T s . d t + i L 2 ( t ) T s . d t
C o d v o ( t ) T s d t = i L 3 ( t ) T s v o ( t ) T s R
For the linearization process, each variable in Equations (31)–(36) is rewritten as the sum of a constant value and a small-signal variable. The constant value represents the operation point (steady-state value), and the small-signal variable represents a perturbation around the operation point; it is denoted by a ^ mark in the variable.
By simplifying the resulting equation, disregarding the continuous and nonlinear components, using only the remaining first order terms to perform the dynamic analysis of the plant, and applying the Laplace Transform, we obtained the Equations (37)–(42).
L 1 . i ^ L 1 s . s = 1 D . v ^ C 1 s + V C 1 . d ^ s v ^ R L s
L 2 . i ^ L 2 s . s = 1 D . v ^ C 2 s + V C 2 . d ^ ( s ) v ^ R L s
L 3 . i ^ L 3 s . s = ( v ^ C 1 s + v ^ C 2 ( s ) ) . D + V C 1 + V C 2 . d ^ ( s ) v ^ o ( s ) v ^ R L s
C 1 . v ^ C 1 s . s = 1 D . i ^ L 1 s I L 1 + I L 3 . d ^ s i ^ L 3 s . D
C 2 . v ^ C 2 s . s = 1 D . i ^ L 2 s I L 2 + I L 3 . d ^ s i ^ L 3 s . D
C o . v ^ o s . s = i ^ L 3 ( s ) v ^ o ( s ) R
By solving the linear system created by Equations (37)–(42), we obtained (43), which represents the linearized transfer function for output voltage control.
T F 3 ( s ) = v ^ o ( s ) d ^ ( s ) = A 2 . s 2 + A 1 . s + A 0 B 4 . s 4 + B 3 . s 3 + B 2 . s 2 + B 1 . s + B 0
where:
  • A2 = 2.R.C1.L1.VC1
  • A1 = −2.D.L1.(IL1 + IL3).R + 2.R.C1.VC1.RL
  • A0 = 2.R.((−IL1 − IL3).RL − VC1).D + VC1)
  • B4 = R.C1.L1.L3.Co
  • B3 = (−IL1 − IL3).RL − VC1).D + VC1
  • B2 = 2.Co.(L1 + (1/2).L3).R.D2 − 2.Co.D.L3.R + ((2.C1.RL + L3).Co + C1.L1).R + C1.(L1.RL + L3.RL)
  • B1 = (3.Co.RL.R + 2.L1 + L3).D2 + (−2.Co.R.RL − 2.L3).D + (C1.RL + Co.RL).R + 2.C1.RL + L3
  • B0 = (R + 3.RL).D2 + (−2.R − 2.RL).D + R + RL

3.4. Linearized Transfer Function in the Reverse Mode with Losses

Based on Figure 9b, we performed the analysis of the two operating stages and obtained the differential equations of the average value of the inductor voltages and the equations of the average capacitor currents. These equations are presented in (44)–(50).
L 1 d i L 1 ( t ) T s d t = v C 1 t T s v o t T s 2 v R L t T s . d t v o t T s 2 + v R L t T s . d t
L 2 d i L 2 ( t ) T s d t = v C 2 t T s v o t T s 2 v R L t T s . d t v o t T s 2 + v R L t T s . d t
L 3 d i L 3 ( t ) T s d t = v 3 t T s v R L t T s . d t + ( v 3 t T s v C 1 t T s v C 2 t T s v R L t T s ) . d t
C 1 d v C 1 ( t ) T s d t = i L 1 t T s . d t + i L 3 ( t ) T s . d t
C 2 d v C 2 ( t ) T s d t = i L 2 t T s . d t + i L 3 ( t ) T s . d t
C o 1 d v 1 ( t ) T s d t = i L 1 t T s v o t T s R
C o 2 d v 2 ( t ) T s d t = i L 2 t T s v o t T s R
By applying the aforementioned linearization technique, we obtained Equations (51)–(57).
L 1 . i ^ L 1 s . s = D . v ^ C 1 s v ^ R L s + V C 1 . d ^ s v ^ o ( s ) 2
L 2 . i ^ L 2 s . s = D . v ^ C 2 s v ^ R L s + V C 2 . d ^ s v ^ o ( s ) 2
L 3 . i ^ L 3 s . s = 1 D . v ^ C 1 s 1 D . v ^ C 2 s + V C 1 + V C 2 . d ^ s v ^ R L s
C 1 . v ^ C 1 s . s = 1 D . i ^ L 3 s I L 1 + I L 3 . d ^ s D . i ^ L 1 s
C 2 . v ^ C 2 s . s = 1 D . i ^ L 3 s I L 2 + I L 3 . d ^ s D . i ^ L 2 s
C o 1 . v ^ 1 s . s = i ^ L 1 ( s ) v ^ o ( s ) R
C o 2 . v ^ 2 s . s = i ^ L 2 ( s ) v ^ o ( s ) R
By solving the linear system created by Equations (51)–(57), we obtained (58), which represents the linearized transfer function for output voltage control.
T F 4 ( s ) = v ^ o s d ^ ( s ) = A 2 . s 2 + A 1 . s + A 0 B 4 . s 4 + B 3 . s 3 + B 2 . s 2 + B 1 . s + B 0
where:
  • A2 = R.C1.L3.VC1
  • A1 = R.(−L3.(IL1 + IL3).D + C1.VC1.RL)
  • A0 = R.(((−IL1 − IL3).RL − 2.VC1).D + 2.VC1)
  • B4 = R.C1.L1.L3.Co1
  • B3 = (Co1.(L1.RL3 + L3.RL).R + 2.L1.L3).C1
  • B2 = 2.R.Co1.(L1 + (1/2).L3).D2 − 4.Co1.D.L1.R + ((2.C1.RL + 2.L1).Co1 + C1.L3).R + 2.C1.(L1.RL + L3.RL)
  • B1 = (3.Co1.RL.R + 4.L1 + 2.L3).D2 + (−4.Co1.R.RL − 8.L1).D + (C1.RL + 2.Co1.RL).R + 4.C1.RL + 4.L1
  • B0 = (2.R + 6.RL).D2 + (−4.R − 8.RL).D + 2.R + 4.RL

3.5. Validation of the Transfer Functions

Table 2 shows the design specifications used to validate the transfer functions obtained from the ideal and the nonideal converter for both modes of operation. Based on Table 2, and using the design equations presented in [20], the values of the quantities and components is presented in Table 3.
For validating the transfer functions presented in (15), (30), (43) and (58), a numerical simulation was performed. The simulation was realized, including the electrical circuit of the converter and an s-domain block, using the transfer functions. A step of 2% was applied to the duty cycle and the output voltage transient was observed for both the converter and the transfer functions TF1, TF2, TF3, and TF4. Figure 10a shows output voltage waveforms for direct mode and Figure 10b shows the same plot for the reverse mode from the ideal converter. For the nonideal converter, the output voltage waveforms are presented in Figure 11a for the direct mode and Figure 11b for the reverse mode. It is possible to observe that the transfer functions can represent the dynamic behavior of the output voltage satisfactorily.

3.6. Root Locus Analysis

A root locus analysis was carried out for observing the behavior of the poles and zeros of the transfer functions. Figure 12 shows the root locus for the ideal and nonideal converter operating in direct mode. As expected, the Cuk converter model presents four poles and two zeros and has right-half-plane (RHP) zeros, which represent a challenge for the control design because the RHP zeros tend to attract the poles to the right-half-plane, causing instability [29]. It is also observed in Figure 12 that the presence of resistive elements in the model moves the RHP zeros closer to the imaginary axis. Therefore, the resistive elements contribute to the stabilization of the system since they diminish the negative effect of the RHP zeros.
Nevertheless, RHP zeros will affect the control design and, generally, a stable closed-loop system is obtained since the frequency bandwidth is limited [29,30].
Figure 13 shows the root locus for the ideal and nonideal converter operating in reverse mode, and the same behavior mentioned before can be verified.

4. Compensator Design

The compensators were designed using a frequency response method through Bode plots. The poles and zeroes of the compensator were allocated to obtain transfer functions with phase margins of at least 45° and a maximum overshoot of 20%.
In order to implement these control systems, a proportional integral (PI) controller with a filter was chosen because it has null error in steady state for a step input and helps with filtering noise.
This controller has two poles and one zero, one pole allocated at the origin, and the other pole and zero are adjusted to obtain the system response to the design specifications. The compensator transfer function is shown in (59).
C s = k C . s + 2 . π . f z s . s + 2 . π . f p
Table 4 summarizes the values obtained for each parameter used in the design of the control system, where Vref is the value of the reference voltage, ks is the voltage sensor gain, Vpk is the peak value of sawtooth, KPWM is PWM modulator gain, fc is the crossover frequency, fz is the frequency of the zero of the compensator, fp if the frequency of the pole of the compensator, and kc is the gain of the compensator.
Figure 14 illustrates the Bode diagrams of the converter’s transfer function (TF), compensator’s transfer function (CTF), and the compensated open-loop transfer function (COLTF) for each mode of operation. It is possible to observe the crossover frequency of each control loop and that the phase margin is equal to 65° for the direct mode and about 90° for reverse mode.
Due to the presence of RHP zeros, the crossover frequency for the direct mode is 100 Hz and the crossover frequency for the reverse mode is 50 Hz. In regard to application, where the battery pack has considerable voltage inertia, this limitation on the bandwidth will not affect the overall performance of the system.

5. Experimental Results

The prototype of the bidirectional Cuk DC–DC converter, shown in Figure 15, was built from the specifications presented in Table 1 and Table 5 presents the bill of components used in the prototype. The control system was implemented with analog circuits, using the integrated circuit (IC) UC3525 which has a PWM modulator and an internal operational amplifier (OPAMP) that was used to realize the PI with a filter compensator. To generate the complementary command signals, we used the IC SN7406.
In the sequence, the waveforms obtained in the practical implementation are presented, for both modes of operation of the bidirectional Cuk converter.

5.1. Waveforms Obtained in the Direct Mode with RC Load and Open Loop Operation

Figure 16 shows the voltage and current waveforms in source V1, and it can be seen that the average voltage is equal to 125.54 V and the average current is equal to 9.536 A.
Figure 17 shows the voltage and current waveforms in inductor L1, and it can be seen that the current in inductor L1 is the same current as source V1, with an average value equal to 9.11 A. Regarding the voltage on the inductor L1, it is possible to notice the similarity with the theoretical waveform presented in Figure 5. One can also observe that the maximum voltage value of inductor L1 is equal to 130.93 V, and the minimum voltage value is equal to −203.24 V.
Figure 18 shows the voltage and current in inductor L3, and it can be seen that the current in inductor L3 is the same current as source V3, with an average value equal to 5.813 A. We also observed that the maximum voltage value in inductor L3 is equal to 246.26 V, and the minimum voltage value is equal to −401.75 V.
Figure 19 shows the voltage waveforms of switches S1 and S3. In the first operating stage, switches S1 and S3 are commanded to conduct and, consequently, the voltage across them is equal to 0 V. In the second operating stage, switches S1 and S3 remain blocked. In this period, we observed that the maximum values of the voltages on switches S1 and S3 are 457.8 V and 344.77 V, respectively.
Figure 20 shows the voltage waveforms of switches S2 and S4. In the first operating stage, switches S2 and S4 are blocked, and it can be seen that the maximum values of the voltages across switches S2 and S4 are 376.37 V and 344.3 V, respectively.
Figure 21 shows the voltage and current at the converter output, and it can be seen that the average voltage is equal to 360.48 V and the average current is equal to 5.636 A. Thus, the converter is processing about 2031 W.

5.2. Waveforms Obtained in the Reverse Mode with RC Load and Open Loop Operation

Considering the reverse mode of operation, source V3 becomes the input source and sources V1 and V2 are replaced by RC loads, which represent the output of the converter. Figure 22 shows the voltage and current in source V3, and it can be seen that the average voltage value is equal to 360.06 V and the average current value is equal to 5.955 A.
Figure 23 shows the voltage and current in inductor L3, and it can be seen that the current in inductor L3 is the same current as source V3, with an average value equal to 5.471 A. Regarding the voltage on the inductor L3, it is possible to notice the similarity with the theoretical waveform presented in Figure 6. It is also observed that the maximum voltage value in inductor L3 is equal to 390.22 V, and the minimum voltage value is equal to −257.9 V.
Figure 24 shows the voltage and current in inductor L1, and it can be seen that the current in inductor L1 has an average value equal to 8.276 A. It can be seen that the maximum voltage in the inductor L1 is equal to 206.35 V, and the minimum voltage value is equal to −129.64 V.
Figure 25 shows the voltage on switches S1 and S3. In the first operating stage, switches S1 and S3 are blocked, and it can be seen that the maximum values of the voltages across switches S1 and S3 are 429.67 V and 526.6 V, respectively.
Figure 26 shows the voltage on switches S2 and S4. It can be seen that the maximum values of the voltages across switches S2 and S4 are 523.65 V and 440.76 V, respectively.
Figure 27 shows the voltage and current waveforms in the converter output for the reverse mode of operation. It can be seen that the average voltage value is equal to 249.73 V, and the average current values is equal to 7.84 A. Thus, the converter is processing about 1958 W.

5.3. Waveforms Obtained with RC Load and Closed Loop Operation

Figure 28 shows the dynamic response of the converter in the control of the output voltage for both modes of operation, considering RC load, for a 50% load step, where the converter was operating at half power, and after the increment started to operate at rated power. In Figure 28a, it can be seen that the output voltage is controlled; it presents a maximum overshoot (Mp) of 10 V, which represents 2.78% of overshoot, and a settling time (ts) of approximately 32 ms. In Figure 28b, a maximum overshoot of 2 V can be observed, which represents 0.8% of overshoot, and a settling time of approximately 50 ms.
In Figure 29, only the alternating component (AC) of the signal is presented in order to better visualize the performance of the implemented control.
The efficiency curves of the bidirectional Cuk converter operating in reverse and direct modes are shown in Figure 30. The efficiency of the converter operating at rated power is equal to 92.711% in the direct mode and equal to 94.016% in the reverse mode. In the direct mode, at the power of approximately 268 W, the lowest efficiency value was obtained, equal to 92.523%, while the highest efficiency value was obtained at approximately 522 W, with 95.203% efficiency. In the reverse mode, at the power of approximately 200 W, the lowest efficiency value was obtained, equal to 90.773%, while the highest efficiency value was obtained at approximately 1019 W, with 95.498% of efficiency.

6. Conclusions

In this paper, a DC–DC bidirectional converter based on a Cuk converter using a voltage-doubler concept was analyzed and evaluated through a proof-of-concept prototype. Additionally, the mathematical analysis used to obtain the small-signal models to control the output voltage for the direct and reverse operation modes was presented.
From the obtained models, the voltage loop compensators were designed using the frequency response criterion (Bode diagrams). The experimental results show the performance of the proposal; the Cuk converter presents high efficiency (95.5% of peak efficiency) and dynamic responses adequate to the implemented control, 2.78% of overshoot, and a settling time of approximately 32 ms for the direct mode and 0.8% of overshoot and a settling time of approximately 50 ms for the reverse mode.
Regarding advantages, the proposed converter presents the concept of a voltage doubler; therefore, the voltage across the switches is reduced, allowing us to choose semiconductors with a lower voltage rating, thus reducing losses. Additionally, the converter presents a continuous current in input and output, which is ideal for charging and discharging a battery pack. As a disadvantage, it presents an increased component count.

Author Contributions

Conceptualization, W.F.L. and M.L.d.S.M.; methodology, W.F.L. and M.L.d.S.M.; software, W.F.L.; validation, W.F.L., A.C. and M.L.d.S.M.; formal analysis, W.F.L., H.V.S. and M.L.d.S.M.; investigation, W.F.L.; resources, M.L.d.S.M., A.C., H.V.S. and C.H.I.F.; data curation, M.L.d.S.M.; writing—original draft preparation, W.F.L.; writing—review and editing, A.C., H.V.S. and C.H.I.F.; visualization, W.F.L. and M.L.d.S.M.; supervision, C.H.I.F.; project administration, H.V.S. and C.H.I.F.; funding acquisition, A.C. and C.H.I.F. All authors have read and agreed to the published version of the manuscript.

Funding

This study was financed in part by the Coordenação de Aperfeiçoamento de Pessoal de Nível Superior-Brasil (CAPES)-Finance Code 001. The authors thank the Brazilian National Council for Scientific and Technological Development (CNPq), processes number 423405/2018-7, 425155/2018-8, 315298/2020-0, 309513/2021-9, 407654/2021-6, 408053/2022-4 and 407854/2023-1, Araucária Foundation, process number 51497, and the National Institute of Science and Technology in Distributed Generation and the founding agencies CNPq process 405054/2022-0, CAPES process 23038.000776/2017-54 and FAPERGS process 17/2551-0000517-1 for their financial support.

Data Availability Statement

Data is contained within the article.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. Block diagram of the power stages of a residential DC microgrid.
Figure 1. Block diagram of the power stages of a residential DC microgrid.
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Figure 2. Topology of the DC–DC bidirectional converter based on a Cuk converter: (a) direct mode; (b) reverse mode.
Figure 2. Topology of the DC–DC bidirectional converter based on a Cuk converter: (a) direct mode; (b) reverse mode.
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Figure 3. Operation stages on direct mode: (a) first stage; (b) second stage.
Figure 3. Operation stages on direct mode: (a) first stage; (b) second stage.
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Figure 4. Operation stages on reverse mode: (a) first step; (b) second step.
Figure 4. Operation stages on reverse mode: (a) first step; (b) second step.
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Figure 5. Ideal waveforms in the direct mode.
Figure 5. Ideal waveforms in the direct mode.
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Figure 6. Ideal waveforms in the reverse mode.
Figure 6. Ideal waveforms in the reverse mode.
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Figure 7. Block diagram of voltage control.
Figure 7. Block diagram of voltage control.
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Figure 8. Topology of the ideal DC–DC bidirectional Cuk converter with RC load: (a) direct mode; (b) reverse mode.
Figure 8. Topology of the ideal DC–DC bidirectional Cuk converter with RC load: (a) direct mode; (b) reverse mode.
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Figure 9. Topology of the nonideal DC–DC bidirectional Cuk converter with RC load: (a) direct mode; (b) reverse mode.
Figure 9. Topology of the nonideal DC–DC bidirectional Cuk converter with RC load: (a) direct mode; (b) reverse mode.
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Figure 10. Validation of the output voltage transfer functions for the ideal converter: (a) direct mode; (b) reverse mode.
Figure 10. Validation of the output voltage transfer functions for the ideal converter: (a) direct mode; (b) reverse mode.
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Figure 11. Validation of the output voltage transfer functions for the nonideal converter: (a) direct mode; (b) reverse mode.
Figure 11. Validation of the output voltage transfer functions for the nonideal converter: (a) direct mode; (b) reverse mode.
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Figure 12. Root locus of transfer functions for the ideal and nonideal converter operating in direct mode: (a) without losses; (b) with RL = 1 Ω; (c) with RL = 5 Ω.
Figure 12. Root locus of transfer functions for the ideal and nonideal converter operating in direct mode: (a) without losses; (b) with RL = 1 Ω; (c) with RL = 5 Ω.
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Figure 13. Root locus of transfer functions for the ideal and nonideal converter operating in reverse mode: (a) without losses; (b) with RL = 1 Ω; (c) with RL = 5 Ω.
Figure 13. Root locus of transfer functions for the ideal and nonideal converter operating in reverse mode: (a) without losses; (b) with RL = 1 Ω; (c) with RL = 5 Ω.
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Figure 14. Bode diagrams of the converter’s transfer function (TF), compensator’s transfer function (CTF), and the compensated open-loop transfer function (COLTF): (a) direct mode; (b) reverse mode.
Figure 14. Bode diagrams of the converter’s transfer function (TF), compensator’s transfer function (CTF), and the compensated open-loop transfer function (COLTF): (a) direct mode; (b) reverse mode.
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Figure 15. Prototype of the DC–DC bidirectional Cuk converter.
Figure 15. Prototype of the DC–DC bidirectional Cuk converter.
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Figure 16. Voltage and current waveforms in source V1 (vertical scales: IL1—2 A/div, V1—20 V/div and horizontal scale: 5 μs/div).
Figure 16. Voltage and current waveforms in source V1 (vertical scales: IL1—2 A/div, V1—20 V/div and horizontal scale: 5 μs/div).
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Figure 17. Voltage and current in inductor L1 (vertical scales: IL1—2 A/div, VL1—100 V/div and horizontal scale: 5 μs/div).
Figure 17. Voltage and current in inductor L1 (vertical scales: IL1—2 A/div, VL1—100 V/div and horizontal scale: 5 μs/div).
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Figure 18. Voltage and current in inductor L3 (vertical scales: IL3—2 A/div, VL3—200 V/div and horizontal scale: 5 μs/div).
Figure 18. Voltage and current in inductor L3 (vertical scales: IL3—2 A/div, VL3—200 V/div and horizontal scale: 5 μs/div).
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Figure 19. Voltage waveforms of switches S1 and S3 (vertical scales: VS1 and VS3—200 V/div and horizontal scale: 5 μs/div).
Figure 19. Voltage waveforms of switches S1 and S3 (vertical scales: VS1 and VS3—200 V/div and horizontal scale: 5 μs/div).
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Figure 20. Voltage waveforms of switches S2 and S4 (vertical scales: VS2 and VS4—200 V/div and horizontal scale: 5 μs/div).
Figure 20. Voltage waveforms of switches S2 and S4 (vertical scales: VS2 and VS4—200 V/div and horizontal scale: 5 μs/div).
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Figure 21. Voltage and current waveforms at the converter output (vertical scales: Io—1 A/div, Vo—50 V/div and horizontal scale: 5 μs/div).
Figure 21. Voltage and current waveforms at the converter output (vertical scales: Io—1 A/div, Vo—50 V/div and horizontal scale: 5 μs/div).
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Figure 22. Voltage and current in source V3 (vertical scales: IL3—2 A/div, V3—50 V/div and horizontal scale: 5 μs/div).
Figure 22. Voltage and current in source V3 (vertical scales: IL3—2 A/div, V3—50 V/div and horizontal scale: 5 μs/div).
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Figure 23. Voltage and current in inductor L3 (vertical scales: IL3—3 A/div, VL3—200 V/div and horizontal scale: 5 μs/div).
Figure 23. Voltage and current in inductor L3 (vertical scales: IL3—3 A/div, VL3—200 V/div and horizontal scale: 5 μs/div).
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Figure 24. Voltage and current in inductor L1 (vertical scales: IL1—5 A/div, VL1—200 V/div and horizontal scale: 5 μs/div).
Figure 24. Voltage and current in inductor L1 (vertical scales: IL1—5 A/div, VL1—200 V/div and horizontal scale: 5 μs/div).
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Figure 25. Voltage waveforms in switches S1 and S3 (vertical scales: VS1 and VS3—200 V/div and horizontal scale: 5 μs/div).
Figure 25. Voltage waveforms in switches S1 and S3 (vertical scales: VS1 and VS3—200 V/div and horizontal scale: 5 μs/div).
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Figure 26. Voltage at switches S2 and S4 (vertical scales: VS2 and VS4—200 V/div and horizontal scale: 5 μs/div).
Figure 26. Voltage at switches S2 and S4 (vertical scales: VS2 and VS4—200 V/div and horizontal scale: 5 μs/div).
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Figure 27. Voltage and current in the converter output (vertical scales: Io—3 A/div, Vo—50 V/div and horizontal scale: 5 μs/div).
Figure 27. Voltage and current in the converter output (vertical scales: Io—3 A/div, Vo—50 V/div and horizontal scale: 5 μs/div).
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Figure 28. Load step of 50% of power to rated power: (a) direct mode (vertical scales: Io—2 A/div, Vo—100 V/div and horizontal scale: 10 ms/div); (b) reverse mode (vertical scales: Io—3 A/div, Vo—50 V/div and horizontal scale: 20 ms/div).
Figure 28. Load step of 50% of power to rated power: (a) direct mode (vertical scales: Io—2 A/div, Vo—100 V/div and horizontal scale: 10 ms/div); (b) reverse mode (vertical scales: Io—3 A/div, Vo—50 V/div and horizontal scale: 20 ms/div).
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Figure 29. AC component of the output voltage: (a) direct mode (vertical scales: Io—2 A/div, Vo—20 V/div and horizontal scale: 20 ms/div); (b) reverse mode (vertical scales: Io—3 A/div, Vo—5 V/div and horizontal scale: 20 ms/div).
Figure 29. AC component of the output voltage: (a) direct mode (vertical scales: Io—2 A/div, Vo—20 V/div and horizontal scale: 20 ms/div); (b) reverse mode (vertical scales: Io—3 A/div, Vo—5 V/div and horizontal scale: 20 ms/div).
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Figure 30. Efficiency curves of the Cuk converter in the direct and reverse modes of operation.
Figure 30. Efficiency curves of the Cuk converter in the direct and reverse modes of operation.
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Table 1. Comparative analysis.
Table 1. Comparative analysis.
CharacteristicConventional CukVoltage-Doubler Cuk
Component count59
Number of inductors23
Number of capacitors12
Number of switches24
Input characteristicCurrent sourceCurrent source
Output characteristicCurrent sourceCurrent source
Static characteristicStep down/Step upStep down/Step up
Static gain D 1 D D 1 D
Voltage stress on capacitors V i + V o V i + V o 2
Voltage stress on switches V i + V o V i + V o 2
Table 2. Design specifications.
Table 2. Design specifications.
SpecificationsValue
Average value of voltage sources V1 and V2125 V
Average value of voltage source V3360 V
Output rated power (Po)2000 W
Switching frequency (fs)100 kHz
Voltage ripple in capacitors C1 and C2 ( VC1,2)10%
Voltage ripple in capacitors Co, Co1, and Co2 ( VCo)1%
Current ripple in inductors L1, L2, and L3 ( iL1,2,3)20%
Table 3. Quantities and designed components.
Table 3. Quantities and designed components.
ParametersValue
Equivalent load resistance (R)—direct mode64.80 Ω
Equivalent load resistance (R)—reverse mode31.25 Ω
Capacitive bank (Co)—direct mode1410.0 μF
Capacitive bank (Co1) and (Co2)—reverse mode1410.0 μF
Capacitors (C1) and (C2) 1.0 μF
Inductors (L1) and (L2)461.07 μF
Inductor (L3)1.33 mH
Inductor resistances (RL)1 Ω
Average current of inductors L1 (IL1) and L2 (IL2)8.0 A
Average current of inductor L3 (IL3)5.56 A
Average voltage in capacitors C1 (VC1) and C2 (VC2)305.0 V
Nominal duty cycle (D)—direct mode0.59
Nominal duty cycle (D)—reverse mode0.41
Table 4. Designed values for the output voltage control systems.
Table 4. Designed values for the output voltage control systems.
ParametersDirect ModeReverse Mode
Vref2.5 V2.5 V
ks0.006940.01
Vpk3.5 V3.5 V
KPWM0.370.37
fc100 Hz50 Hz
fz20 Hz50 Hz
fp1 kHz100 Hz
kC2615254.47
Table 5. Components used in the prototype.
Table 5. Components used in the prototype.
ComponentsSpecification
Inductors L1 and L2Inductance: 474 μF
Number of turns: 57
Wire: 64 × 32 AWG
Core: 0088439A7 AmoFlux
Inductor L3Inductance: 1.35 mF
Number of turns: 97
Wire: 32 × 32 AWG
Core: 0088439A7 AmoFlux
Capacitors C1 and C21 μF/630 V
Switches S1, S2, S3, and S4SCT3080AL (650 V/30 A/80 mΩ)
HeatsinkLAM3K15012
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MDPI and ACS Style

Lopes, W.F.; Martins, M.L.d.S.; Converti, A.; Siqueira, H.V.; Illa Font, C.H. Experimental Evaluation of a 2 kW/100 kHz DC–DC Bidirectional Converter Based on a Cuk Converter Using a Voltage-Doubler Concept. Energies 2024, 17, 362. https://doi.org/10.3390/en17020362

AMA Style

Lopes WF, Martins MLdS, Converti A, Siqueira HV, Illa Font CH. Experimental Evaluation of a 2 kW/100 kHz DC–DC Bidirectional Converter Based on a Cuk Converter Using a Voltage-Doubler Concept. Energies. 2024; 17(2):362. https://doi.org/10.3390/en17020362

Chicago/Turabian Style

Lopes, Wanderson Francisco, Mário Lúcio da Silva Martins, Attilio Converti, Hugo Valadares Siqueira, and Carlos Henrique Illa Font. 2024. "Experimental Evaluation of a 2 kW/100 kHz DC–DC Bidirectional Converter Based on a Cuk Converter Using a Voltage-Doubler Concept" Energies 17, no. 2: 362. https://doi.org/10.3390/en17020362

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