Next Article in Journal
Simulation of a Hybrid Plant with ICE/HT-PEMFC and On-Site Hydrogen Production from Methane Steam Reforming
Previous Article in Journal
A Hierarchical Collaborative Optimization Model for Generation and Transmission Expansion Planning of Cross-Regional Power Systems Considering Energy Storage and Load Transfer
 
 
Font Type:
Arial Georgia Verdana
Font Size:
Aa Aa Aa
Line Spacing:
Column Width:
Background:
Article

Modeling and Experimental Verification of a Single-Switch Quadratic Boost DC–DC Converter with High Voltage Gain for Energy Harvesting

Université de Lorraine, CNRS, IJL, F-54000 Nancy, France
*
Author to whom correspondence should be addressed.
Energies 2025, 18(20), 5447; https://doi.org/10.3390/en18205447
Submission received: 22 August 2025 / Revised: 1 October 2025 / Accepted: 10 October 2025 / Published: 16 October 2025

Abstract

This paper presents an enhanced non-isolated single-switch quadratic boost DC-DC converter. The proposed topology employs a single active switch, two inductors, two capacitors, and three diodes. The proposed design improves system reliability by replacing one of the active switches in a conventional cascaded boost converter with a diode. Two key features of this converter are its single switch, which simplifies operation, and the use of a lifting capacitor for voltage step-up. The reduced switch count and the use of Schottky diodes minimize switching losses and enhance overall efficiency. Comprehensive theoretical steady-state analysis under continuous conduction mode (CCM) is carried out to characterize the converter’s performance. Notably, at a 50% duty cycle, the converter achieves a voltage gain of four, while at a 70% duty cycle, it can reach a voltage gain of approximately 11. The proposed topology is validated through extensive simulations in MATLAB/Simulink (2023). In addition, a prototype with a 5 V input and 20 V output at a switching frequency of 50 kHz was constructed and tested. The experimental unit achieved an efficiency of about 85% at a 5 V input. The results confirm that the converter achieves high voltage gain and improved efficiency, making it well-suited for IoT and energy harvesting applications.

1. Introduction

The rapid expansion of the Internet of Things (IoT) has reshaped a wide range of industries, from smart agriculture and infrastructure monitoring to healthcare and autonomous systems. The IoT is increasingly understood as an integrated ecosystem of smart objects equipped with sensing, networking, and processing technologies, working collaboratively to provide intelligent services to end users [1]. These services span real-time monitoring, control, and automated decision-making, often performed in complex environments with critical connectivity and energy efficiency. Many IoT applications rely on large-scale deployments of low-power sensor nodes, which must operate reliably in remote or inaccessible locations. There is a growing interest in powering such devices using ambient energy sources rather than conventional batteries to reduce maintenance and enable long-term autonomy. Technologies such as photovoltaic (PV) panels, thermoelectric generators (TEGs) [2], and piezoelectric harvesters [3] can convert ambient energy into usable electrical power [4]. Among these, PV energy harvesting is appealing due to its scalability, environmental compatibility, and ability to provide a continuous DC output under typical outdoor conditions. PV self-powered systems offer a clean and practical alternative for supplying energy to electronic devices while alleviating pressure on traditional grids and reducing environmental impact [5]. These low voltages must be stepped up and regulated to ensure the reliable operation of downstream electronics, including communication modules, sensors, and embedded processors. Therefore, the harvested DC voltage requires conditioning through efficient DC-DC converters to meet system-level requirements regarding voltage stability, load regulation, and conversion efficiency [6,7,8].
In low-voltage renewable energy systems, the output voltage from PV modules is often insufficient to directly power communication interfaces, microcontrollers, or storage devices. The voltage boosting through non-isolated DC-DC converters has thus become a critical requirement in such applications. These topologies are favored in space-constrained systems for their simplicity and relatively high efficiency. The conventional boost converter, while widely adopted, becomes increasingly inefficient at high conversion ratios due to excessive duty cycles, elevated component stress, rising conduction, and switching losses [8,9,10]. These limitations constrain its suitability for energy harvesting systems that demand wide voltage conversion ranges with high performance and reliability.
To address these challenges, numerous high-gain topologies have been introduced, including switched-capacitor (SC), switched-inductor (SL), voltage-lift (VL), voltage multiplier cell (VMC), and magnetically coupled inductor-based configurations. These approaches are often integrated into quadratic, cascaded, or hybrid structures to achieve high gain [11,12,13]. Variants such as buck–boost–derived quadratic converters [14,15], cascaded stages [16,17], and switched-inductor/capacitor hybrids [18,19], as well as super-lift and voltage-lift converters [20,21,22], have been proposed to overcome the main limitations of basic topologies. However, many solutions have trade-offs, such as increased switch count, control complexity, or significant current ripple, and electromagnetic interference (EMI) [23]. At the same time, Forouzesh et al. in [10] offered a detailed classification of these converters. Despite these advances, the resulting designs are often too complex or bulky for integration in compact IoT energy harvesting systems.
Cascaded non-isolated converters are another strategy to extend voltage gain by connecting basic converter stages, such as boost or buck–boost, in series. Although modular and flexible [24], they require multiple active switches and often involve complex control schemes, multiple isolated gate drivers, and increased conduction losses. This complexity raises cost and lowers efficiency, especially undesirable in low-power designs. Recent work has focused on simplifying such architectures, for example, using graft schemes to form single-switch quadratic structures. While these structures reduce control overhead, they may still impose significant current or voltage stress on components. As Tofoli et al. noted, quadratic converters offer a practical compromise for moderate gain levels, though they remain limited by trade-offs between stress, gain, and component count [24].
In general, quadratic converters have been well regarded for providing squared voltage gain without coupling inductors or transformers. Several topologies have been introduced to exploit this advantage while maintaining compactness. García-Vite et al. proposed a ripple-canceling structure for improved dynamic response [25]. Gholizadeh et al. introduced a quadratic buck–boost topology with continuous input/output current and simplified gate driving [23]. Mostaan et al. developed a transformerless single-switch structure capable of step-up and step-down operation [26], offering enhanced flexibility and reduced circuit complexity.
This foundation has motivated further optimization. De Sá et al. introduced a double-quadratic converter with reduced stress and demonstrated its effectiveness under feedback control [27]. In our previous work [28], we proposed a switched-inductor and voltage-lift-based design that achieves ultra-high gain with reduced voltage stress. Gholizadeh [6] and Jana [29] also introduced modified QBCs with improved gain and component stress profiles. Yet, many recent topologies still rely on multiple switches or auxiliary networks, increasing cost and reducing integration potential. As a result, single-switch designs have gained significant attention due to their compactness, reduced gate drive complexity, and improved reliability [19,30]. Methods incorporating VMCs, inductor-lift stages, or switched capacitors have shown strong results at moderate duty cycles [7,18,31]. For example, Mostaan et al. presented a grounded-input, single-switch quadratic buck–boost converter tailored for PV systems [26].
In addition to gain and complexity, practical issues such as polarity and grounding are critical. Ground-referenced switch configurations simplify gate driving and improve noise immunity [16,32]. Topologies with continuous input current—often using coupled inductors or interleaved elements—also reduce stress on the PV panel and the input capacitor, minimizing EMI and extending system lifespan [14,17,20,26].
Many cascaded and quadratic converters require two switches for wide gain or control flexibility. However, this adds cost, increases EMI, and complicates gate drive circuitry, especially in isolated designs. To reduce switch count, several studies have explored methods such as diode–switch substitution, inductor–capacitor balancing, and auxiliary cell removal [6,11,12,20,22,26]. Hybrid solutions, such as the one proposed by Jana [29], utilize passive gain stages combined with a single switch to minimize circuit complexity. Others have proposed modular or stackable designs with single-switch configurations and continuous input current for better performance and scalability [7,18,33]. In our previous work [28], we proposed a method using a switch–diode combination to eliminate one switch. This paper builds on that technique and presents a refined topology with a detailed analysis.
Component stress is another significant design consideration. High voltage or current stress shortens the lifespan, increases losses, and requires degraded components, which degrade the efficiency of the system. Traditional boost converters operating near the unity duty cycle are particularly affected [33,34]. Many newer topologies also exhibit excessive stress due to poor trade-offs in gain versus component count [15,25,32]. For example, some converters impose voltage stress on switches that exceeds the output voltage, which can compromise safety and long-term operation [26,27]. Efficient design requires balancing voltage gain with minimal component stress and reasonable component count, factors that are often overlooked in the high-gain converter literature.
In this context, this paper proposes a new single-switch quadratic boost converter topology, specifically optimized for energy harvesting applications. Single-switch quadratic boost converters have already been investigated in the literature, e.g., by Kadri et al. [35], who analyzed a transformerless quadratic boost for PV grid applications. However, our proposed SSQB the following distinctive advantages: it ensures a continuous input current, which is crucial for renewable energy sources, and significantly reduces the voltage stress on the first intermediate capacitor, thereby enhancing reliability. It also achieves a quadratic voltage gain and maintains a positive output polarity.
The remainder of the paper is organized as follows. Section 2 presents the converter’s design methodology and details the circuit topology. Section 3 describes the behavior of the proposed converter, including steady-state analysis and voltage gain derivation, and presents the theoretical waveforms for the ideal case. Section 4 examines the component stresses and establishes the conditions for continuous conduction mode. Non-ideal conditions for voltage gain and efficiency are considered in Section 5. Simulation and experimental results are presented in Section 6 and Section 7, respectively. Finally, Section 8 summarizes the findings and contributions of the paper.

2. Converter Topology Derivation and Methodology

This section presents the methodological foundation of the proposed converter design, which incorporates two core techniques: the diode–switch substitution method and the lifting capacitor technique. Together, these approaches enable a simplified, single-switch quadratic boost topology that achieves high voltage gain, reduces component stress, and improves overall efficiency.

2.1. Diode–Switch Substitution Method in Cascaded Converters

Cascaded DC-DC converters commonly use two active switches to achieve high voltage gain. While functionally effective, this approach increases control complexity due to the need for multiple gate drivers and synchronization. It also raises switching losses and places additional stress on power components, which can be detrimental in compact or low-power systems.
The proposed topology addresses these limitations by employing a diode–switch substitution technique. Specifically, when both switches share a common ground reference and are driven by the same control signal ( δ ), as illustrated in Figure 1a, one switch can be eliminated and replaced with a diode, thereby reducing the overall component count and circuit complexity. In this configuration, the cathode of the diode connects to the drain of the remaining switch, as illustrated in Figure 1b. The diode conducts when the switch is on and blocks current when the switch is off, effectively mimicking the operation of the removed switch. This substitution eliminates the need for additional gate control without altering the functional behavior of the converter. Figure 1 compares the original two-switch topology with its modified counterpart.

2.2. Lifting Capacitor Method

The lifting capacitor method is introduced to enhance the voltage gain and structural efficiency of conventional quadratic boost converters (CQBCs), which typically require two active switches. In this method, the first-stage capacitor is repositioned, not directly across the input source, but between the first inductor and the switch, to facilitate the voltage-lifting effect essential for achieving higher gain. This configuration supports more efficient energy transfer by allowing the capacitor to assist in the charging phase of the second stage, leading to improved voltage conversion characteristics.
As shown in Figure 2, the CQB (Figure 2a) is restructured into the Modified Quadratic Boost (MQB) configuration (Figure 2b) through the strategic relocation of the first-stage capacitor. This modification shifts part of the energy storage from inductive to capacitive elements, supporting higher gain and faster voltage buildup with simpler control.
The combination of the diode–switch substitution and lifting capacitor methods results in a structurally simplified and electrically optimized quadratic boost converter. Consequently, the proposed topology provides a practical solution for compact, low-power energy harvesting applications that demand high step-up voltage ratios.

2.3. Topology Derivation

To overcome the complexity and switching losses associated with multi-switch high-gain converters, a single-switch quadratic boost converter (SSQB) is proposed. This topology achieves squared voltage gain using only one active switch, complemented by passive components arranged to manage energy storage and transfer efficiently.
As depicted in Figure 3, the proposed configuration employs a single active switch ( S 2 ), two inductors, two capacitors, and three diodes. This arrangement ensures unidirectional energy flow and enables stage-to-stage voltage buildup, resulting in quadratic voltage gain. The single-switch control significantly simplifies the gate drive circuitry and the overall control scheme, reducing both circuit complexity and cost compared to multi-switch topologies. The output stage, modeled as a resistive load, benefits from the converter’s quadratic voltage boost characteristic, delivering a high step-up ratio that is particularly advantageous for applications with low input voltage sources.
A notable structural feature of the SSQB is the placement of the capacitor C 1 between the two stages of the converter, rather than directly at the input as in conventional boost topologies. This positioning enables the voltage-lifting effect necessary for achieving quadratic gain while supporting energy transfer from the first to the second stage. Although this configuration may slightly increase the ripple of the input current, the effect is mitigated by the input inductor L 1 , which naturally limits high-frequency current variations. During startup, C 1 charges through the inductor path, which suppresses the inrush current.
This structure forms the basis for the subsequent analysis, which details the proposed SSQB’s steady-state operation, voltage gain, and performance characteristics.

3. Ideal Operating Principles

This section describes the operating behavior of the MQB converter, shown in Figure 2b, and the proposed SSQB converter, depicted in Figure 3, under ideal conditions. The analysis is performed assuming continuous conduction mode (CCM), ideal components, and a sufficiently large output capacitor such that the output voltage remains constant throughout the switching cycle. The ideal waveforms and conduction behavior presented here form the basis for subsequent analytical derivations and will be used for comparison with simulation and experimental results in later sections.

3.1. Conduction State Analysis for Different Switching Modes

The operating principles of the MQB and SSQB converters are explained based on two switching intervals: Mode 1, when the switch is ON, and Mode 2, when the switch is OFF. Together, these two modes constitute one complete switching cycle under steady-state conditions.

3.1.1. Modified Quadratic Boost Converter (MQB)

In the MQB configuration shown in Figure 4, Mode 1 (depicted in Figure 4a) begins when both switches are turned on. During this interval, inductors L 1 and L 2 are energized, storing magnetic energy and causing their currents to increase. Diodes D 1 and D 2 are reverse-biased and block current flow, while capacitor C 0 maintains voltage stability across the load, which is primarily powered by the energy previously stored in C 0 .
When the switches are turned off, as illustrated in Figure 4b (Mode 2), the inductors begin to release their stored energy. Diodes D 1 and D 2 become forward-biased and conduct, transferring energy to the output stage and recharging the capacitor, which continues to supply the load.

3.1.2. Single-Switch Quadratic Boost Converter (SSQB)

In the SSQB topology shown in Figure 5, a similar two-mode operation takes place; however, the entire process is controlled by a single active switch.
When the switch is turned on, as depicted in Figure 5a (Mode 1), both inductors store energy, and diode D 3 conducts, allowing current to flow through its path. Diodes D 1 and D 2 are reverse-biased during this phase, thereby isolating their respective branches. Capacitor C 1 is charged, while C o discharges into the load to maintain output regulation.
In Mode 2, shown in Figure 5b, when the switch is turned off, the energy stored in L 1 and L 2 is released. Diodes D 1 and D 2 become forward-biased and conduct, transferring energy to the output stage, while D 3 becomes reverse-biased and ceases to conduct. During this phase, C o assists in maintaining the output voltage, and C 1 redistributes its charge in preparation for the next cycle.
The fundamental operation of both topologies is governed by controlled energy storage and release through inductors, synchronized with diode conduction and capacitor support to stabilize the output. This structured sequence allows the proposed converters to achieve high voltage gain efficiently while maintaining a low switch count.

3.2. Voltage Ratio Analysis in CCM Operation

This subsection presents the voltage gain analysis of the MQB and SSQB converters operating in CCM. The corresponding circuit models are shown in Figure 6, where key voltage and current variables are labeled to highlight the essential electrical relationships in each topology. These diagrams provide the foundation for formulating the dynamic behavior of the system components. Based on the principles of inductor volt-second balance and capacitor charge balance, the governing equations are derived to describe the energy transfer process and voltage build-up across both stages. Since the ideal electrical behavior of the MQB and SSQB topologies is identical in each switching mode, a common set of equations can be used to describe both configurations. In practice, non-idealities such as diode forward voltage and MOSFET on-resistance introduce small deviations, though these remain negligible within the low-current operating range considered in this work.
The governing differential equations for the voltage and current behavior of the inductors and capacitors under different switching states are derived under ideal assumptions. In this section, the analysis is based on ideal component behavior, namely, zero ESR in capacitors and inductors, ideal switch transitions, and lossless operation. These simplifications are commonly adopted to make the analytical derivations more tractable and to focus on the core operating principles of the converter. Nevertheless, we acknowledge that practical non-ideal effects such as parasitic resistances, switching losses, and forward voltage drops do influence converter performance. These effects are considered in the simulation models and are inherently reflected in the experimental results. During the switch-on state, the circuit enters an energy accumulation phase in which the inductors are energized, and the capacitors either charge or sustain their voltage. The corresponding relationships for inductor voltages and capacitor currents during this interval are provided in Equation (1).
v L 1 ( t ) = L 1 d i L 1 ( t ) d t = v i n v L 2 ( t ) = L 2 d i L 2 ( t ) d t = v i n + v c 1 ( t ) i c 1 ( t ) = C 1 d v c 1 ( t ) d t = i L 2 ( t ) i c o ( t ) = C o d v c o ( t ) d t = i o u t
During the switch-off state, the circuit transitions to an energy transfer phase, during which the inductor voltage profiles and capacitor current responses change accordingly. These relationships are described in Equation (2).
v L 1 ( t ) = L 1 d i L 1 ( t ) d t = v c 1 ( t ) v L 2 ( t ) = L 2 d i L 2 ( t ) d t = v i n + v c 1 ( t ) v c o ( t ) i c 1 ( t ) = C 1 d v c 1 ( t ) d t = i L 1 ( t ) i L 2 ( t ) i c o ( t ) = C o d v c o ( t ) d t = i L 2 ( t ) i o u t ( t )
By applying the volt-second balance principle to the inductors and the charge balance principle to the capacitors, the steady-state relationships that govern circuit behavior are obtained, as shown in Equations (3) and (4).
L 1 d i L 1 d t = D v i n + ( 1 D ) ( v c 1 ) L 2 d i L 2 d t = D ( v i n + v c 1 ) + ( 1 D ) ( v i n + v c 1 v c 0 )
C 1 d v c 1 d t = D ( i L 2 ) + ( 1 D ) ( i L 1 i L 2 ) C o d v c 0 d t = D ( i o u t ) + ( 1 D ) ( i L 2 i o u t )
Under steady-state conditions, the inductor volt-second balance and capacitor amp-second balance principles, as expressed in Equations (5) and (6), require that the average voltage across the inductors and the net current through the capacitors be zero.
< L 1 d i L 1 d t > = D V i n + ( 1 D ) ( V c 1 ) = 0 < L 2 d i L 2 d t > = D ( V i n + V c 1 ) + ( 1 D ) ( V i n + V c 1 V c 0 ) = 0
< C 1 d v c 1 d t > = D ( I L 2 ) + ( 1 D ) ( I L 1 I L 2 ) = 0 < C o d v c 0 d t > = D ( I o u t ) + ( 1 D ) ( I L 2 I o u t ) = 0
By simplifying these equations, the expressions for the average capacitor voltages are obtained in Equation (7), while the corresponding average inductor currents are provided in Equation (8).
V C 1 = D 1 D V i n V C o = 1 ( 1 D ) 2 V i n
I L 1 = 1 ( 1 D ) 2 I o u t I L 2 = 1 ( 1 D ) I o u t
Consequently, recognizing that V c 0 is equivalent to V o u t , and using the expression in Equation (7), the voltage gain of the quadratic boost converter is derived, as shown in Equation (9).
V o u t V i n = 1 ( 1 D ) 2
In all equations, D represents the duty cycle, and average (steady-state) values are indicated either by uppercase notation or by angle brackets · .
Figure 7 illustrates the variation of voltage gain with respect to the duty cycle, as described by Equation (9), for both MQB and SSQB topologies.

3.3. Theoretical Waveforms

The voltage and current waveforms observed across each component align well with expectations and are consistent with findings reported in previous studies [7,18,29], where theoretical waveform analysis was demonstrated to be a practical approach for validating converter designs. Plotting waveforms under ideal operating conditions offers valuable insight into the circuit’s dynamic behavior, including transitions across switches, inductors, capacitors, and diodes. These theoretical profiles illustrate expected switching sequences, conduction intervals, and energy transfer dynamics, helping to clarify converter operation in each mode.

3.3.1. Theoretical Waveforms for Modified Quadratic Boost Converter (MQB)

Based on the operation illustrated in Figure 4a, when both switches are in the ON state, the diodes D 1 and D 2 are reverse-biased and block current. Consequently, the voltage across the switches drops to zero, and no current flows through the diodes. During this interval, the current through switch S 1 equals the inductor current I L 1 , and the current through switch S 2 equals I L 2 , as shown in the theoretical waveforms in Figure 8a and Figure 8b, respectively. The voltage across the diode D 2 equals the output voltage V out .
It can be seen that both inductors are in the energy storage phase, with increasing currents. The voltage across inductor L 1 is equal to V in , while capacitor C 1 also maintains a voltage of V in , contributing to a voltage-lift effect. As a result, V L 2 reaches approximately 2 V in . The input current increases during this phase, which is the sum of I L 1 and I L 2 .
In contrast, Figure 4b shows the converter behavior during the OFF state. Under ideal conditions, the switch currents drop to zero. During this interval, D 1 and D 2 conduct with currents I D 1 = I L 1 and I D 2 = I L 2 , respectively. This behavior is reflected in the theoretical current waveforms shown in Figure 8c,d, as a reference for subsequent simulation and experimental validation. Both inductor currents decrease as stored energy is transferred to the load. In addition, the voltage and current waveforms of inductors L 1 and L 2 are shown in Figure 8e and Figure 8f, respectively, completing the theoretical analysis of the operation of the converter at both switching intervals.

3.3.2. Theoretical Waveforms for Single-Switch Quadratic Boost Converter (SSQB)

The theoretical waveforms of the proposed Single-Switch Quadratic Boost (SSQB) topology are illustrated in Figure 9. As shown in Figure 5a, when switch S 2 is in the ON state, the gate–source voltage V GS is high, and the current through the switch equals the sum of the inductor currents, I L 1 + I L 2 , as seen in Figure 9a. During this interval, the diodes D 1 and D 2 are reverse-biased and do not conduct. As a result, the voltage across D 1 is equal to V in + V C 1 , and the voltage across D 2 is equal to the output voltage, as illustrated in Figure 9b and Figure 9c, respectively.
In this mode, the inductor L 1 is charged with V in , while L 2 is charged with approximately 2 V in , demonstrating the quadratic voltage-boosting effect. The total input current equals the sum of I L 1 and I L 2 and flows entirely through the switch S 2 . During this interval, the diode D 3 is forward-biased and conducts current I L 1 , effectively replicating the function of the switch S 1 in the MQB topology, as seen in Figure 8a and Figure 9d.
In the subsequent OFF state (Figure 5b), the gate–source voltage drops to zero, turning OFF the switch S 2 and consequently blocking the diode D 3 . This transition mirrors the OFF-state behavior of S 1 in MQB, confirming the functional equivalence between D 3 and the actively controlled switch in MQB. During this interval, the reverse voltage across D 3 becomes V D 3 = V L 2 = 2 V in , as confirmed by Figure 9d,f. A similar pattern is seen in MQB, where V S 1 = V in V L 1 , and with V L 1 = V in , the result is V S 1 = 2 V in (see Figure 8a,e).
During the OFF state, the diodes D 1 and D 2 are forward-biased and conduct the discharging currents of L 1 and L 2 , respectively, as shown in Figure 9b,c. The voltage and current waveforms of the inductors L 1 and L 2 , shown in Figure 9e,f, verify that the converter operates in CCM, with characteristic triangular current ripple and no discontinuities across the switching cycle.
Furthermore, the inductor voltages alternate symmetrically between positive and negative values in each mode: V L 1 swings from + V in to V in , while V L 2 varies between + 2 V in and 2 V in . These waveform transitions not only validate the expected voltage gain characteristics but also reinforce the mode boundaries used in the analytical derivations.
In Figure 8 and Figure 9, the theoretical waveforms do not include the average output voltage and current values, as these quantities are constant over time and would appear as flat lines. Displaying them would not contribute additional interpretive value to the plots. For practical comparison, the average input and output voltages are shown in the simulation and experimental results.

4. Semiconductor Stresses and Ripple Analysis (Ideal Conditions)

This section provides a theoretical evaluation of the electrical stresses experienced by the semiconductor components and examines the ripple characteristics of the proposed converter under ideal conditions. Voltage and current stresses refer to the maximum electrical loads that semiconductor components, such as switches and diodes, must endure during circuit operation without failure. Accurate assessment of these stresses is critical for proper device selection, thermal management, and ensuring long-term reliability of the converter. In this section, the normalized voltage and current stresses are analytically derived for both the MQB and SSQB topologies.

4.1. Analysis of Normalized Voltage and Current Stresses in Modified Quadratic Boost Converter (MQB)

For the MQB topology, the normalized voltage and current stresses on the switches S 1 , S 2 , and the diodes D 1 , D 2 are summarized in Table 1 and Table 2, and illustrated in Figure 10.
As illustrated in Figure 10a, S 1 and D 1 experience a voltage stress of ( 1 D ) V out , which decreases linearly with duty cycle. In contrast, S 2 and D 2 are exposed to the full output voltage V out throughout the range of D, indicating an asymmetric stress distribution between the components.
Figure 10b shows that S 1 carries the entire input current, while S 2 and D 1 experience current stresses proportional to D ( 1 D ) and ( 1 D ) , respectively. The diode D 2 , whose current during conduction is ( 1 D ) 2 I in , undergoes a rapidly decreasing stress as D increases. In particular, the current stress on S 2 reaches a maximum at D = 0.5 due to the quadratic nature of D ( 1 D ) and decreases thereafter.
These findings highlight the trade-offs associated with component stress distribution and underscore the importance of duty cycle optimization. A well-chosen operating point can minimize component derating, improve thermal behavior, and enhance the overall reliability of the MQB converter.

4.2. Analysis of Normalized Voltage and Current Stresses in Single-Switch Quadratic Boost Converter (SSQB)

The SSQB topology simplifies the converter architecture by using only one active switch S 2 , with diodes D 1 , D 2 , and D 3 managing energy transfer in the two stages. The normalized voltage and current stresses for these components are summarized in Table 3 and Table 4, and illustrated in Figure 11.
As shown in Figure 11a, S 2 and D 2 are subjected to the full output voltage V out , while D 1 sees a reduced stress of ( 1 D ) V out . The diode D 3 , which replaces S 1 from the MQB design, experiences a linearly increasing voltage stress of D V out as D increases.
The current stress profile in Figure 11b exhibits a parabolic response for S 2 , following the relation D ( 2 D ) , with a peak near D = 1 . The diode D 1 carries ( 1 D ) I in , and D 2 conducts ( 1 D ) 2 I in , both of which decrease with the higher duty cycle. The diode D 3 carries a linearly increasing current stress of D I in , reflecting its growing contribution as the main energy pathway in the first stage.
These results indicate that although the switch S 2 in the SSQB topology exhibits a voltage stress profile comparable to that of the MQB, the substitution of S 1 with diode D 3 leads to a more predictable and manageable stress distribution, particularly in lower duty cycles.

4.3. Comparison of Stress Profiles

The comparative analysis of semiconductor stresses between the MQB and SSQB topologies highlights a key architectural advantage: substituting switch S 1 in MQB with diode D 3 in SSQB. In MQB, S 1 experiences voltage and current stresses that vary significantly with the duty cycle, including a linearly increasing current stress that peaks when maximum power delivery is typically required. This places substantial demands on gate driving, thermal management, and device selection.
In contrast, SSQB avoids these drawbacks by employing D 3 as a passive substitute. As illustrated in Figure 11a,b, D 3 exhibits a linear increase in voltage and current stresses with D, which are easier to predict and manage. For D < 0.5 , D 3 operates under a voltage stress lower than S 1 in the MQB while maintaining equivalent current stress throughout the full range of the duty cycle. Since D 1 and D 2 show similar behavior in both topologies, the main stress advantage lies in this single substitution.
The voltage stress on S 2 is identical in both topologies, as shown in Figure 11a,b. However, in the SSQB, the current stress on S 2 is three times higher than in the MQB at D = 0.5 , increasing further as D approaches 1. This trade-off must be taken into account when choosing this substitution.

4.4. Inductor Currents and Capacitor Voltage Ripples

By analyzing the differential equations in Equations (1) and (2), the ripple magnitudes of the inductor currents and capacitor voltages can be analytically derived. In this context, ripple is defined as half the difference between the maximum and minimum values of a periodic waveform. The voltage ripple is primarily influenced by the capacitance, switching frequency ( f s ), duty cycle (D), and output current ( I o u t ), whereas the current ripple depends on the inductance, switching frequency, duty cycle, and input voltage ( V in ).
It is important to note that these ripple expressions are derived under ideal assumptions using linear waveform approximations. Parasitic elements such as ESR, diode forward voltage drops, and switching non-linearities are not considered in this analysis. While such simplifications are standard practice in the early stages of converter design for clarity and ease of component sizing, they may introduce discrepancies compared to real-world behavior. Future work will address these limitations by incorporating non-ideal effects into the ripple analysis for more accurate modeling and design optimization.
These relationships are mathematically expressed in Equation (10), which depicts the ripple characteristics under ideal conditions for both MQB and SSQB topologies.
Δ v C 1 = D I o u t ( 1 D ) C 1 f s Δ v o u t = D I o u t C 0 f s Δ i L 1 = D V in 2 L 1 f s Δ i L 2 = D V in 2 ( 1 D ) L 2 f s
The results highlight the critical role of component selection in minimizing ripple effects and ensuring stable operation in both MQB and SSQB topologies.

4.5. Conditions for Continuous Conduction Mode

CCM occurs when the inductor current remains strictly positive throughout the entire switching period, enabling uninterrupted energy transfer. In contrast, discontinuous conduction mode (DCM) arises when the current in one or both inductors drops to zero during part of the cycle, resulting in intermittent power delivery. This distinction significantly affects converter efficiency, output voltage stability, and transient performance.
In CCM, each inductor current consists of a steady average value superimposed with ripple. To ensure operation remains within CCM, the average current must exceed half of the peak-to-peak ripple amplitude. This criterion can be expressed as:
I L 1 = I o ( 1 D ) 2 Δ i L 1 = D V in 2 L 1 f s , I L 2 = I o 1 D Δ i L 2 = D V in 2 ( 1 D ) L 2 f s .
By rearranging the expressions in Equation (11), the minimum inductance values required to ensure continuous conduction mode can be derived, as shown in Equation (12):
L 1 D ( 1 D ) 4 R 2 f s , L 2 D ( 1 D ) 2 R 2 f s .
These relations demonstrate the strong dependence of inductor sizing on the duty cycle, switching frequency, and load resistance. Ensuring that L 1 and L 2 meet these minimum requirements guarantees operation in CCM, thereby improving stability, efficiency, and dynamic response in the proposed converter topologies.

4.6. Boundary Condition Between CCM and DCM

To evaluate the transition between CCM and DCM, it is assumed that one of the inductor currents, typically I L 2 , drops to zero during part of the switching cycle, while I L 1 remains continuous. This typically occurs under light-load or low-duty-cycle conditions when stored energy is depleted before the end of the switching period.
The normalized inductor time constants are defined as:
τ L 1 = L 1 f s R , τ L 2 = L 2 f s R
The minimum normalized values required to ensure CCM can be derived as:
τ L 1 b = D ( 1 D ) 4 2 , τ L 2 b = D ( 1 D ) 2 2
These expressions define the critical CCM boundaries for the SSQB converter. If either τ L 1 or τ L 2 drops below the threshold, the circuit enters DCM. Figure 12 illustrates these boundaries. The curves reach their maximum near D = 0.5 , which indicates that converters operating at mid-range duty cycles require the largest normalized inductance to maintain CCM. In contrast, at very low or very high duty cycles, the boundary values decrease, making it easier to stay in continuous conduction without large inductors.
Compared to the topology in [7], where L 2 is considered for the CCM/DCM transition with the boundary τ L 2 b = D 2 ( 1 D ) 2 4 , the proposed SSQB ensures continuous conduction in all energy paths, which leads to improved current symmetry, reduced peak stress, and enhanced stability across a wide range of operating conditions. This dual-boundary approach is particularly advantageous in photovoltaic and energy-harvesting systems, where variable loads and fluctuating input conditions demand robust and balanced inductor utilization.

5. Study Under Non-Ideal Conditions

This section examines how the proposed converter performs when real-world losses are taken into account. First, the voltage gain is recalculated by including the effects of resistive losses in components, as explained in Section 5.1. Then, Section 5.2 compares this performance with other converters from the literature. Finally, Section 5.3 and Section 5.4 analyze the efficiency of the converter and compare it to other high-gain designs.

5.1. Voltage Ratio Re-Evaluation

In real-world conditions, the voltage gain of a DC-DC converter is reduced due to parasitic losses in the inductors, switches, and diodes. These losses can be modeled as series resistances: r L for inductors, r S for the switch, and r D for the diodes, all normalized to the load resistance R. The actual voltage gain G non-ideal can be expressed as a degraded version of the ideal gain G ideal due to these resistive losses:
v o u t v i n = G ideal · ( 1 Loss terms )
Substituting G ideal = 1 ( 1 D ) 2 and calculating the loss terms from the equivalent series resistances yields the non-ideal gain expression:
v o v i n = 1 ( 1 D ) 2 1 r L R · D 2 2 D + 2 ( 1 D ) 4 r S R · D ( 2 D ) 2 ( 1 D ) 4 r D R · 2 D ( 1 D ) 3
This expression highlights how each parasitic element degrades the gain differently, with increasing impact at higher duty cycles. Accurate modeling of these effects is crucial for realistic performance prediction and converter optimization under non-ideal operating conditions.

5.2. Comparative Study of Non-Ideal Voltage Ratio

Figure 13 illustrates the non-ideal voltage gain versus duty cycle for the proposed MQB, SSQB, conventional boost converter, and the topologies presented in [8,23]. All converters experience performance degradation due to parasitic resistances, particularly at high duty cycles.
Although the converters from [8,23] demonstrate high theoretical gains, their increased structural complexity and multiple conduction paths result in greater sensitivity to loss mechanisms as the duty cycle approaches 0.9. In contrast, MQB and SSQB exhibit more gradual degradation due to their simpler and more efficient current paths.
The MQB and SSQB curves are nearly identical, reflecting their shared current conduction characteristics. However, SSQB shows a slightly higher gain near D = 0.7 , primarily due to the replacement of one active switch with a diode, which reduces conduction losses associated with switch operation. At lower duty cycles, SSQB achieves the highest non-ideal gain among all compared topologies, making it particularly suitable for applications requiring moderate voltage step-up and high efficiency under light-load or variable-input conditions.
Although a gain of 4 is theoretically achievable with a conventional boost converter, doing so requires a duty cycle close to 75%. This operating point introduces significant current stress, increases conduction losses, and reduces control margin and overall efficiency. By comparison, the proposed SSQB achieves the same gain at a much more moderate duty cycle of 50%, resulting in lower device stress and improved system reliability. Figure 13 confirms this advantage by presenting the experimentally measured voltage gain across a range of duty cycles, highlighting the SSQB’s superior performance in non-ideal conditions.

5.3. Efficiency Analysis

This subsection evaluates the efficiency of the proposed SSQB converter by accounting for key non-ideal losses: conduction losses in inductors and the MOSFET, diode forward conduction losses, and switching losses. For simplicity, magnetic core losses and gate driving losses are neglected. In addition, diode reverse recovery losses are ignored due to the use of Schottky diodes, which have negligible reverse recovery characteristics.
The major loss components are expressed as follows:
η SSQB : P L = 1 ( 1 D ) 4 r L 1 + 1 ( 1 D ) 2 r L 2 · P o R , P s c = 4 D 4 D 2 + D 3 ( 1 D ) 4 · r S R · P o , P s s = 1 2 · D ( 2 D ) ( 1 D ) 4 · V i n · I o · f s · t off , P D = 2 2 D + D 2 ( 1 D ) 2 · V D F · I o ,
where
  • P o is the output power delivered to the load.
  • P L represents the conduction losses in the inductors, where r L 1 and r L 2 denote the equivalent series resistances of the first and second inductors, respectively.
  • P s c represents conduction losses in the switch, modeled with its on-resistance r S .
  • P s s is the switching loss of the MOSFET, where t off is the turn-off transition time.
  • P D denotes forward conduction loss in the diodes, where V D F is the diode’s forward voltage drop.
The overall efficiency of the SSQB converter can be calculated using:
η SSQB = P o P o + P L + P s c + P s s + P D
As illustrated in Figure 14a, the MQB and SSQB converters maintain high efficiency across a wide range of duty cycles. To provide a clearer view of the performance details, particularly in the regions of interest, a zoomed-in plot is presented in Figure 14b. This performance advantage arises from their single-switch structure, which significantly reduces switching and conduction losses compared to multi-switch or magnetically coupled high-gain topologies. The simplified architecture ensures high efficiency, especially under moderate load conditions, while delivering a substantial voltage gain.

5.4. Efficiency Comparative Analysis

Figure 14 presents a comparative efficiency analysis of the proposed MQB and SSQB converters alongside two advanced high-gain topologies from [28,30]. All the curves are plotted using the same parameters ( V in = 5 V and P o 0.5 W ) for all converters, ensuring a fair and rigorous evaluation. The MQB converter exhibits slightly higher efficiency in the lower duty cycle region compared to the SSQB. However, the overall efficiency curves of both MQB and SSQB remain closely aligned across the entire duty cycle range. Furthermore, both converters outperform the complex topology in [28], which suffers from increased losses due to its intricate design.
Regarding the converter introduced in [30], it should be noted that this topology experiences inrush current due to the direct connection of the first capacitor in parallel with the input source, which is located very close to the input. As a result, the magnitude of the inrush current is relatively high and can lead to significant losses. In the theoretical efficiency analysis presented in [30], these capacitor-related losses have not been considered. If they were included, the efficiency curve of that converter would deteriorate further. In contrast, our proposed converters (SSQB and MQB) do not experience inrush current due to their structural design, which eliminates this loss mechanism and prevents the associated efficiency reduction. Thus, they are specifically optimized for low-voltage energy harvesting, demonstrating that a high voltage gain with good efficiency is achievable in such low-voltage scenarios.
At higher duty cycles ( D > 0.7 ), the efficiency of the SSQB converter drops more sharply. This decline is primarily attributed to increased conduction losses in the main switch S 2 , which experiences higher RMS current as D increases. Additionally, the forward conduction loss in diode D 3 becomes more significant at higher duty cycles, as it conducts for a longer portion of the switching cycle. Both effects contribute to the reduced efficiency in this region.
As shown in Figure 15, the efficiency of the SSQB converter is evaluated at a fixed output voltage of V o = 20 V . In Figure 15a, the efficiency exhibits a slight downward trend as the output power increases from 10% to 100% of the rated value at a fixed V i n = 5 V . This behavior is mainly due to the rise in conduction-related losses in the inductors and MOSFET ( P L + P s c I 2 ) with increasing load current, while the remaining loss components vary more mildly. In Figure 15b, keeping the output power constant, the efficiency increases with the input voltage because the duty ratio D = 1 V i n / V o decreases, which reduces RMS currents and thereby lowers P L , P s c and P s s . Overall, the converter maintains high efficiency (about 90–93%) across the required 10–100% load range and the ± 40 % input-voltage variation, confirming its suitability for applications with variable input and load.
Figure 16 illustrates the distribution of the main losses in the SSQB converter, including inductor conduction losses ( P L ), switch conduction losses ( P s c ), switching losses ( P s s ), and diode losses ( P D ). It can be observed that inductor and diode losses dominate the overall distribution, while switch conduction and switching losses remain comparatively lower.

6. Simulation Results and Theoretical Validation

To evaluate the performance of the proposed converter, time-domain simulations were carried out using the MATLAB/Simulink (2023) environment. Both the MQB and SSQB converters were simulated under identical operating conditions. The input voltage was set to 5 V, and the switching frequency was set to 50 kHz to achieve a practical balance between switching losses, thermal performance, and the physical size of passive components. While higher frequencies can reduce inductor and capacitor size, they tend to increase switching losses and electromagnetic interference (EMI). The selected frequency also aligns with the electrical and thermal limitations of the commercially available inductors used in the prototype, ensuring stable and efficient operation. The values of the inductors and capacitors are selected according to the design constraints in (10) and (12), ensuring continuous conduction mode operation and compliance with the specified ripple limits. The system parameters are summarized in Table 5. It is noted that the value of the second inductor L 2 is relatively high. This choice was deliberate to guarantee continuous conduction mode (CCM) across the entire operating range and to minimize current ripple, which improved the accuracy of both the theoretical and experimental analysis. While such a large inductance can limit power density and increase component cost in higher-power applications, for the low-power prototype presented in this work, it was feasible, and a commercially available component was used without thermal or integration issues. In future designs, the size of L 2 can be reduced by operating at higher switching frequencies or by employing coupled-inductor or integrated magnetic structures.

6.1. Simulation Results for Modified Quadratic Boost Converter (MQB)

The operation of the MQB converter was simulated using the MATLAB/Simulink environment. The resulting waveforms, including voltage and current profiles across key components such as switches ( S 1 , S 2 ), diodes ( D 1 , D 2 ), and inductors ( L 1 , L 2 ), are presented in Figure 17.
A comparison with the theoretical waveforms shown in Figure 8 demonstrates strong agreement, confirming the expected two-mode operation over the D · T s and ( 1 D ) · T s intervals. The voltage waveforms across S 1 and S 2 alternate clearly between high and low states, while V L 1 and V L 2 exhibit the anticipated positive and negative swings. The inductor currents remain continuous, as evident in Figure 17e,f, verifying that the converter operates in CCM.
According to the theoretical analysis (Figure 8a), the voltage stress across switch S 1 is given by V S 1 = V in + | V L 1 | . During the ( 1 D ) · T s interval, | V L 1 | = V in , resulting in V S 1 = 2 V in . With V in = 5 V, the simulation confirms V S 1 = 10 V, as shown in Figure 17a.
Similarly, for S 2 , Figure 8b shows that the voltage stress is V S 2 = V in + V C 1 + | V L 2 | . Given V C 1 = V in and V L 2 = 2 V in during the ( 1 D ) · T s interval, this yields V S 2 = 4 V in = 20 V. The simulation result in Figure 17b corroborates this prediction.
During the first mode of operation, the current through switch S 1 is equal to the inductor current I L 1 , while the current through S 2 equals I L 2 . In the second mode, both switches turn OFF, and the diodes conduct instead: D 1 carries I L 1 and D 2 carries I L 2 . The simulation waveforms—Figure 17a–d—match the inductor current waveforms in Figure 17e,f precisely. This confirms that the current paths align with the theoretical predictions and validates the correct mode operation of the converter.
Finally, the simulation confirms the quadratic voltage gain behavior of the MQB converter. As depicted in Figure 17g, the output voltage follows the expected relationship V out = V in / ( 1 D ) 2 , even in the presence of parasitic resistances and switching delays. With V in = 5 V and D = 0.5 , the theoretical output voltage is V out = 20 V, which is fully consistent with the simulation results. These findings validate the theoretical model and demonstrate the effectiveness of the MQB converter for high step-up applications.

6.2. Simulation Results for Single-Switch Quadratic Boost Converter (SSQB)

The simulation results for the SSQB topology, shown in Figure 18, are in strong agreement with the theoretical predictions presented in Figure 9. Since most of the voltage and current waveforms are identical to those discussed for the MQB converter in Section 6.1, detailed explanations are omitted to avoid redundancy. The primary distinction lies in the replacement of the switch S 1 with the diode D 3 . During the second mode of operation, the diode D 3 becomes reverse-biased and turns off. In the first mode, it is forward-biased and conducts the inductor current I L 1 . Based on theoretical analysis, the voltage stress across D 3 during the OFF interval is V D 3 = | V L 2 | = 2 V in = 10 V. This behavior is confirmed by the simulation waveform shown in Figure 18d, validating the passive substitution of the switch S 1 with the diode D 3 .
In addition, the simulation waveforms for switch S 2 (Figure 18a) show the expected voltage stress of V S 2 = 4 V in = 20 V during the OFF state, while the switch current equals the sum of the inductor currents, I L 1 + I L 2 , during the ON state. The behavior of diodes D 1 and D 2 in Figure 18b,c mirrors that of the MQB case: both are forward-biased and conduct during the OFF mode and are reverse-biased during the ON mode. Their conduction currents match I L 1 and I L 2 , respectively.
The inductor voltage and current waveforms shown in Figure 18e,f confirm that both L 1 and L 2 operate in CCM, with characteristic positive and negative voltage swings and continuous inductor currents across switching intervals.
Finally, the SSQB converter exhibits the same quadratic voltage gain characteristic as the MQB topology. As shown in Figure 18g, the output voltage follows the ideal relationship V out = V in / ( 1 D ) 2 . For an input voltage of V in = 5 V and duty cycle D = 0.5 , the theoretical output is V out = 20 V, which aligns perfectly with the simulation results. These findings confirm that the SSQB converter achieves high step-up performance while reducing the number of active switches.

6.3. Comparative Analysis Between MQB and SSQB for the Simulation Results

To rigorously validate the simulation performance of the MQB and SSQB converters, key electrical parameters—including gate–source voltage ( V G S ), drain–source voltages ( V S 1 , V S 2 ), drain currents ( I S 1 , I S 2 ), inductor voltages ( V L 1 , V L 2 ) and currents ( I L 1 , I L 2 ), diode voltages ( V D 1 , V D 2 , V D 3 ) and currents ( I D 1 , I D 2 , I D 3 ), as well as output voltage ( V o u t )—were extracted from the simulations and compared against their theoretical expectations. The waveforms, shown in Figure 17 and Figure 18, demonstrate the time-domain responses of both topologies under identical operating conditions.
The simulation results for both converters show excellent agreement with theoretical predictions. In each case, the switching transitions occur precisely at the expected duty ratio intervals. The drain–source voltages and currents follow the derived expressions for both S 1 and S 2 in MQB, and for S 2 and D 3 in SSQB. The key structural distinction lies in the replacement of S 1 by diode D 3 in the SSQB, shifting the conduction role from an actively controlled switch to a passive diode.
In both converters, the inductor currents remain continuous, verifying operation in CCM. Voltage and current ripple levels, conduction timing, and waveform symmetry for L 1 and L 2 are nearly identical. Capacitor voltage behavior and diode conduction intervals also match across both topologies.
As observed in the simulations, the substitution of S 1 with D 3 in SSQB slightly modifies the current stress distribution among components but does not affect voltage gain or dynamic output performance. Both converters achieve the same quadratic voltage gain, consistent with V out = V in / ( 1 D ) 2 .

7. Experimental Validation

This section presents the experimental validation of the proposed converter topologies. Section 7.1 describes the hardware setup and the selected components used for implementation. Section 7.2 and Section 7.3 provide the measured voltage and current waveforms for the MQB and SSQB converters, respectively. Finally, Section 7.4 offers a comparative analysis of the experimental performance of the MQB and SSQB converter topologies, delivering a comprehensive evaluation of their practical viability.

7.1. Experimental Setup and Prototype Details

To maintain consistency with the simulation environment, the voltage and current waveforms of all critical circuit components were measured and analyzed under identical operating conditions. The experimental prototype, shown in Figure 19, was constructed to ensure that the component values closely adhered to those derived from theoretical design equations, particularly the inductance requirements expressed in Equation (12).
The magnetic components consisted of 1140-681K-RC (680 µH) and 1140-562K-RC (5.6 mH) inductors. Capacitor values were selected to meet the minimum criteria established during the design phase to maintain voltage stability and minimize ripple.
The proposed converter can be operated over a wide range of duty ratios. However, due to its quadratic voltage gain characteristic, all experimental results have been provided at a duty ratio of 50%. This operating point was selected to demonstrate high voltage gain while maintaining moderate component stress and reliable steady-state performance.
The system parameters used in the experimental setup are identical to those in the simulations, ensuring consistent behavior and accurate validation. These parameters are summarized in Table 5.
For the switching devices, the IRFP4110 N-channel MOSFET was selected due to its low R DS ( on ) and high current handling capability, which contribute to efficient power conversion. The switching frequency was set to 50 kHz to achieve a practical balance between switching losses, thermal performance, and the physical size of passive components. While higher frequencies can reduce inductor and capacitor size, they tend to increase switching losses and EMI. The selected frequency also aligns with the electrical and thermal limitations of the commercially available inductors used in the prototype, ensuring stable and efficient operation. A TC4427 dual MOSFET driver was employed to deliver reliable and synchronized gate signals for proper switching control.
The MBR10100 Schottky diode was selected due to its fast reverse recovery behavior and low forward voltage drop, making it well-suited for high-frequency switching applications such as 50 kHz. While reverse recovery losses can become a concern at elevated frequencies, Schottky diodes inherently have negligible reverse recovery charge compared to standard PN diodes. As a result, these losses were considered negligible in the analytical derivations. However, while reverse recovery loss in such diodes is typically lower than the turn-on loss of MOSFETs at similar frequencies, this trade-off should still be considered in high-frequency designs. These losses are inherently captured in the simulation and experimental results. In future work, the influence of switching frequency on diode behavior and overall efficiency will be further explored, particularly for higher power or faster-switching applications.
The experimental testbench setup, including the oscilloscope, pulse generator, power supply, and current/voltage probes, is illustrated in Figure 19. The measured voltage and current waveforms for key components are presented in Figure 20 and Figure 21, corresponding to the MQB and SSQB converters, respectively.

7.2. Experimental Results for Modified Quadratic Boost Converter (MQB)

The experimental performance of the MQB converter was evaluated using the prototype described in Section 7.1. The measured waveforms, shown in Figure 20, include voltage and current profiles for key components such as switches, diodes, and input/output terminals, under the same operating conditions as used in the simulations ( V in = 5 V, D = 0.5 ).
Figure 20a presents the gate–source voltage ( V G S ), drain–source voltage ( V S 1 ), and current ( I S 1 ) of switch S 1 . The switch turns ON and OFF with clean transitions, and the peak voltage stress reaches approximately 10 V, consistent with the theoretical expectation V S 1 = 2 V in . The current waveform corresponds to the inductor current I L 1 , confirming proper conduction during the ON interval and the current peak is around 100 mA.
The performance of the switch S 2 is shown in Figure 20b. The voltage stress peaks at approximately 20 V, validating the relation V S 2 = V in + V C 1 + | V L 2 | . The drain current I S 2 also matches I L 2 and the current peak for this switch is almost 40 mA, and the switching behavior aligns with expectations.
Figure 20c,d display the voltage and current waveforms for the diodes D 1 and D 2 , respectively. Both diodes conduct during the OFF state of the switches, with current waveforms mirroring the respective inductor discharge currents. The voltage waveforms show reverse blocking during the ON phase, validating the expected diode behavior.
The input and output voltages are shown in Figure 20e. The output voltage reaches approximately 20 V, confirming the quadratic gain relationship V out = V in / ( 1 D ) 2 for V in = 5 V and D = 0.5 .

7.3. Experimental Results for Single-Switch Quadratic Boost Converter (SSQB)

The experimental performance of the SSQB converter was evaluated using the same operating parameters as those used for the MQB prototype. The measured waveforms are shown in Figure 21, illustrating the voltage and current behaviors of key components under steady-state operation.
Figure 21a shows the gate–source voltage, drain–source voltage, and drain current of the switch S 2 . The switching action is clearly defined, with sharp transitions and consistent timing. The observed voltage and current levels verify the expected switching stress and current conduction behavior.
Figure 21b,c display the voltage and current waveforms of the diodes D 1 and D 2 . Both diodes conduct during the OFF state of S 2 and exhibit clean reverse-blocking behavior during the ON state. The measured current profiles are continuous and correspond well with the respective inductor currents, confirming operation in CCM.
Figure 21d presents the waveforms for the diode D 3 , which replaces the role of the switch S 1 in the MQB topology. The measured results show that D 3 conducts during the ON period and blocks during the OFF period, with a voltage stress level matching expectations. This behavior validates the intended passive replacement of the switch.
Finally, Figure 21e provides the input and output voltage waveforms. The output voltage is stable and accurately reflects the high step-up ratio characteristic of the SSQB topology, demonstrating its suitability for applications requiring significant voltage boosting with minimal component complexity.

7.4. Comparative Analysis Between SSQB and MQB

As evidenced by the theoretical, simulation, and experimental waveforms, the operational behavior of the SSQB converter closely aligns with that of the MQB converter. The only topological difference lies in the replacement of the actively controlled switch S 1 in the MQB with the diode D 3 in SSQB. Experimental results confirm that D 3 conducts and blocks in the same manner as S 1 across the two switching modes, effectively replicating its role without requiring additional control circuitry.
This functional equivalence ensures that the SSQB maintains the same voltage gain, current continuity, and switching behavior as the MQB topology, while benefiting from reduced component count and control complexity. The absence of an additional gate driver not only simplifies the design but also enhances reliability and efficiency, particularly in low-power or cost-sensitive applications.
Therefore, it can be concluded that the SSQB topology offers a reliable and practical alternative to the MQB, preserving the performance advantages of a two-switch quadratic boost structure with the simplicity and robustness of a single-switch design.

7.5. Measured Efficiency and Voltage Gain of the SSQB Converter

The measured voltage gain and efficiency of the SSQB converter are shown in Figure 22a,b, respectively. As seen in the results, the voltage gain closely follows the analytical prediction shown in Figure 13. Additionally, the gain is not significantly affected by changes in the input voltage. After about 40% duty cycle, the gain curves corresponding to the two input voltage levels become nearly identical.
In contrast, the efficiency shows a clear dependency on the input voltage. As illustrated in Figure 22b, higher input voltages lead to higher efficiency. This is particularly important for energy harvesting applications, where the converter typically operates at low input voltages, such as 5 V. Under this condition, the peak efficiency is around 85%. The >90% theoretical curve was obtained using a simplified loss set P L (inductor DC copper), P s c (MOSFET conduction), P s s (switching loss of the MOSFET), and P D (forward conduction loss in the diodes) only; omitted mechanisms such as core/AC copper losses, C o s s and diode reverse recovery, driver/control consumption, PCB/ESR losses, and measurement offsets lower the realized efficiency to approximately 85%. When the input voltage is increased to 10 V , the peak efficiency increases slightly to ≈86%.

8. Conclusions

This paper proposed and validated a high-gain Single-Switch Quadratic Boost (SSQB) DC–DC converter, which offers a simplified and reliable structure compared to conventional dual-switch cascaded boost topologies. The design replaces one of the active switches in the MQB converter with a passive diode, thereby reducing control complexity, component count, and switching losses.
A comprehensive theoretical analysis under CCM was presented, and the expected converter behavior was confirmed through detailed simulation in MATLAB/Simulink. Experimental results from a laboratory prototype further validated the predicted voltage stresses, current conduction profiles, and high step-up voltage gain, confirming consistency across theoretical, simulated, and real-world performance. Additionally, the converter’s robustness was demonstrated under transient conditions, including variations in load resistance and input voltage.
The SSQB converter delivers the same quadratic gain as the MQB topology while requiring only one gate driver, making it an attractive solution for high-efficiency, compact, and cost-sensitive applications. The use of Schottky diodes and a reduced switch count contributes to lower conduction and switching losses, enhancing the overall power conversion efficiency.
The primary contribution of this work lies in presenting a structural design that replaces one of the two switches typically used in cascaded converters, such as quadratic boost structures, with a single switch. This simplification reduces circuit complexity and provides a solid foundation for future research on fault-tolerant converter topologies, where minimizing the number of active devices is a key requirement.
Overall, the consistency between the theoretical analysis, simulation results, and experimental data demonstrates the practical viability and robustness of the proposed SSQB converter. Future work may explore the integration of closed-loop control strategies to further enhance regulation and dynamic performance. Additionally, the concept of replacing an active switch with a passive diode may be extended toward developing fault-tolerant topologies. Furthermore, soft-switching techniques such as resonant gate drivers or zero-voltage switching may be considered in future designs to reduce switching losses and improve efficiency at higher frequencies.

Author Contributions

Conceptualization, N.D. and P.P.; Methodology, N.D., S.J. and P.P.; Software, N.D.; Validation, N.D.; Formal analysis, N.D. and P.P.; Investigation, N.D.; Writing—original draft, N.D.; Writing—review & editing, N.D., S.J. and P.P.; Supervision, S.J. and P.P.; Funding acquisition, P.P. All authors have read and agreed to the published version of the manuscript.

Funding

This work is funded by the French National Research Agency (ANR project HYDRES, ANR-21-CE50-0003).

Data Availability Statement

The data presented in this study are contained within the paper.

Conflicts of Interest

The authors declare no conflicts of interest.

References

  1. Asghari, P.; Rahmani, A.M.; Haj Seyyed Javadi, H. Internet of Things applications: A systematic review. Comput. Netw. 2019, 148, 241–261. [Google Scholar] [CrossRef]
  2. Almeida, J.; Mendonça dos Santos, P.; Caldinhas Vaz, J.; Marques Lameirinhas, R.; Pinho Correia Valério Bernardo, C.; Torres, J. Step-Up DC-DC Converter Supplied by a Thermoelectric Generator for IoT Applications. Energies 2024, 17, 5288. [Google Scholar] [CrossRef]
  3. Ghazanfarian, J.; Mohammadi, M.M.; Uchino, K. Piezoelectric Energy Harvesting: A Systematic Review of Reviews. Actuators 2021, 10, 312. [Google Scholar] [CrossRef]
  4. Bhansali, K.; Akki, P.; Heeneth Sai, A.V.; Bodepudi, N.D.; Krishnan, A. Smart Agriculture: IOT-Based Smart Application for Agriculture. In Proceedings of the 2024 2nd International Conference on Networking and Communications (ICNWC), Chennai, India, 2–4 April 2024; pp. 1–12. [Google Scholar] [CrossRef]
  5. Hao, D.; Qi, L.; Tairab, A.M.; Ahmed, A.; Azam, A.; Luo, D.; Pan, Y.; Zhang, Z.; Yan, J. Solar energy harvesting technologies for PV self-powered applications: A comprehensive review. Renew. Energy 2022, 188, 678–697. [Google Scholar] [CrossRef]
  6. Gholizadeh, H.; Sharifi Shahrivar, R.; Hashemi, M.; Afjei, E.; Gorji, S. Design and Implementation of a Single-Switch Step-Up DC-DC Converter Based on Cascaded Boost and Luo Converters. Energies 2021, 14, 3584. [Google Scholar] [CrossRef]
  7. Zaid, M.; Lin, C.H.; Khan, S.; Ahmad, J.; Tariq, M.; Mahmood, A.; Sarwar, A.; Alamri, B.; Alahmadi, A. A Family of Transformerless Quadratic Boost High Gain DC-DC Converters. Energies 2021, 14, 4372. [Google Scholar] [CrossRef]
  8. Gholizadeh, H.; Gorji, S.; Afjei, E.; Sera, D. Design and Implementation of a New Cuk-Based Step-Up DC–DC Converter. Energies 2021, 14, 6975. [Google Scholar] [CrossRef]
  9. Yi, F.; Wang, F. Review of Voltage-Bucking/Boosting Techniques, Topologies, and Applications. Energies 2023, 16, 842. [Google Scholar] [CrossRef]
  10. Forouzesh, M.; Siwakoti, Y.P.; Gorji, S.A.; Blaabjerg, F.; Lehman, B. Step-Up DC–DC Converters: A Comprehensive Review of Voltage-Boosting Techniques, Topologies, and Applications. IEEE Trans. Power Electron. 2017, 32, 9143–9178. [Google Scholar] [CrossRef]
  11. Haider, Z.; Ulasyar, A.; Khattak, A.; Zad, H.S.; Mohammad, A.; Alahmadi, A.A.; Ullah, N. Development and Analysis of a Novel High-Gain CUK Converter Using Voltage-Multiplier Units. Electronics 2022, 11, 2766. [Google Scholar] [CrossRef]
  12. Deraz, S.; Zaky, M.; Tawfiq, K.; Mansour, A. State Space Average Modeling, Small Signal Analysis, and Control Implementation of an Efficient Single-Switch High-Gain Multicell Boost DC-DC Converter with Low Voltage Stress. Electronics 2024, 13, 3264. [Google Scholar] [CrossRef]
  13. Mumtaz, F.; Yahaya, N.; Meraj, S.; Singh, N.; Abro, G. A Novel Non-Isolated High-Gain Non-Inverting Interleaved DC–DC Converter. Micromachines 2023, 14, 585. [Google Scholar] [CrossRef] [PubMed]
  14. Ding, S.; Wang, F. A New Negative Output Buck–Boost Converter with Wide Conversion Ratio. IEEE Trans. Ind. Electron. 2017, 64, 9322–9333. [Google Scholar] [CrossRef]
  15. Miao, S.; Wang, F.; Ma, X. A New Transformerless Buck–Boost Converter with Positive Output Voltage. IEEE Trans. Ind. Electron. 2016, 63, 2965–2975. [Google Scholar] [CrossRef]
  16. Maroti, P.; Padmanaban, S.; Blaabjerg, F.; Martirano, L.; Siano, P. A Novel Multilevel High Gain Modified SEPIC DC-to-DC Converter for High Voltage/Low Current Renewable Energy Applications. In Proceedings of the 2018 IEEE 12th International Conference on Compatibility, Power Electronics and Power Engineering (CPE-POWERENG 2018), Doha, Qatar, 10–12 April 2018; pp. 1–6. [Google Scholar] [CrossRef]
  17. Maroti, P.; Padmanaban, S.; Wheeler, P.; Blaabjerg, F.; Rivera, M. Modified High Voltage Conversion Inverting Cuk DC-DC Converter for Renewable Energy Application. In Proceedings of the 2017 IEEE Southern Power Electronics Conference (SPEC), Puerto Varas, Chile, 4–7 December 2017; pp. 1–5. [Google Scholar] [CrossRef]
  18. Shaabani, M.; Mirzaei, A.; Rezvanyvardom, M.; Khosravi, F.; Gorji, S. A Hybrid Switched-Inductor/Switched-Capacitor DC-DC Converter with High Voltage Gain Using a Single Switch for Photovoltaic Application. Energies 2023, 16, 5524. [Google Scholar] [CrossRef]
  19. Maroti, P.; Padmanaban, S.; Ionel, D.; Siano, P.; Leonowicz, Z. Configurations of Modified SEPIC Converter with Switched Inductor Module (MSCsI) for Photovoltaic Application: Part-II. In Proceedings of the 2018 IEEE International Conference on Environment and Electrical Engineering and 2018 IEEE Industrial and Commercial Power Systems Europe (EEEIC/I&CPS Europe), Palermo, Italy, 12–15 June 2018; pp. 1–6. [Google Scholar] [CrossRef]
  20. Gholizadeh, H.; Ben-Brahim, L. A New Non-Isolated High-Gain Single-Switch DC–DC Converter Topology with a Continuous Input Current. Electronics 2022, 11, 2900. [Google Scholar] [CrossRef]
  21. Aghdam Meinagh, F.; Ranjbarizad, V.; Babaei, E. New Non-Isolated High Voltage Gain Single-Switch DC-DC Converter Based on Voltage-Lift Technique. In Proceedings of the 2019 10th International Power Electronics, Drive Systems and Technologies Conference (PEDSTC), Shiraz, Iran, 12–14 February 2019; pp. 219–223. [Google Scholar] [CrossRef]
  22. Ranganathan, S.; Mohan, A. Formulation and Analysis of Single Switch High Gain Hybrid DC to DC Converter for High Power Applications. Electronics 2021, 10, 2445. [Google Scholar] [CrossRef]
  23. Gholizadeh, H.; Gorji, S.; Sera, D. A Quadratic Buck-Boost Converter With Continuous Input and Output Currents. IEEE Access 2023, 11, 22376–22393. [Google Scholar] [CrossRef]
  24. Tofoli, F.; Carlos, T.; Morais, A. Review, Properties, and Synthesis of Single-Switch Non-Isolated DC-DC Converters with a Wide Conversion Range. Sensors 2024, 24, 2264. [Google Scholar] [CrossRef]
  25. García–Vite, P.M.; Soriano–Rangel, C.A.; Rosas–Caro, J.C.; Mancilla–David, F. A DC–DC converter with quadratic gain and input current ripple cancelation at a selectable duty cycle. Renew. Energy 2017, 101, 431–436. [Google Scholar] [CrossRef]
  26. Mostaan, A.; Gorji, S.; Soltani, M.; Ektesabi, M. A Novel Single Switch Transformerless Quadratic DC/DC Buck-Boost Converter. In Proceedings of the 2017 19th European Conference on Power Electronics and Applications (EPE’17 ECCE Europe), Warsaw, Poland, 11–14 September 2017; pp. P.1–P.6. [Google Scholar] [CrossRef]
  27. de Sá, F.; Ruiz-Caballero, D.; Dal’Agnol, C.; da Silva, W.; Mussa, S. High Static Gain DC–DC Double Boost Quadratic Converter. Energies 2023, 16, 6362. [Google Scholar] [CrossRef]
  28. Gholizadeh, H.; Dizangian, N.; Poure, P.; Jovanovic, S. A High Gain Single-Switch DC-DC Converter Based on Cascaded Boost. In Proceedings of the 2024 IEEE International Conference on Environment and Electrical Engineering and 2024 IEEE Industrial and Commercial Power Systems Europe (EEEIC/I&CPS Europe), Rome, Italy, 17–20 June 2024; pp. 1–6. [Google Scholar] [CrossRef]
  29. Jana, A.; Lin, C.H.; Kao, T.H.; Chang, C.H. A High Gain Modified Quadratic Boost DC-DC Converter with Voltage Stress Half of Output Voltage. Appl. Sci. 2022, 12, 4914. [Google Scholar] [CrossRef]
  30. Gorji, S.; Gholizadeh, H. A Modified Positive Output Super-Lift Luo DC-DC Converter with Improved Voltage Boost Ability. In Proceedings of the 2022 5th International Conference on Renewable Energy and Power Engineering (REPE), Beijing, China, 28–30 September 2022; pp. 282–286. [Google Scholar] [CrossRef]
  31. Huleihel, Y.; Cervera, A.; Ben-Yaakov, S. A High Gain DC-DC Converter for Energy Harvesting of Thermal Waste by Thermoelectric Generators. In Proceedings of the 2012 IEEE 27th Convention of Electrical and Electronics Engineers in Israel (IEEEI), Eilat, Israel, 14–17 November 2012; pp. 1–5. [Google Scholar] [CrossRef]
  32. Monfared, M.; Gholizadeh, H.; Amini, S.; Kalamialhashem, S.; Afjei, S.; Afjei, S. A Modified Zeta DC-DC Converter with Higher Voltage Gain Besides Low Value of the Normalized Current Stresses. In Proceedings of the 2022 13th Power Electronics, Drive Systems, and Technologies Conference (PEDSTC), Tehran, Iran, 1–3 February 2022; pp. 269–274. [Google Scholar] [CrossRef]
  33. Valdez-Resendiz, J.; Rosas-Caro, J.; Mayo-Maldonado, J.; Llamas-Terres, A. Quadratic Boost Converter Based on Stackable Switching Stages. IET Power Electron. 2018, 11, 1373–1381. [Google Scholar] [CrossRef]
  34. Bussa, V.; Singh, R.; Mahanty, R. A Two Switch Non-Isolated High Gain DC-DC Converter. In Proceedings of the 2018 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES), Chennai, India, 18–21 December 2018; pp. 1–6. [Google Scholar] [CrossRef]
  35. Kadri, R.; Gaubert, J.P.; Champenois, G.; Mostefaï, M. Performance analysis of transformless single switch quadratic boost converter for grid connected photovoltaic systems. In Proceedings of the 2010 XIX International Conference on Electrical Machines (ICEM), Rome, Italy, 6–8 September 2010; pp. 1–6. [Google Scholar] [CrossRef]
Figure 1. Illustration of the diode–switch substitution methodology. (a) Two low-side switches; (b) Replacing the first switch with a diode.
Figure 1. Illustration of the diode–switch substitution methodology. (a) Two low-side switches; (b) Replacing the first switch with a diode.
Energies 18 05447 g001
Figure 2. Quadratic boost topologies: (a) conventional quadratic boost converter (CQB) using two cascaded boost stages; (b) modified quadratic boost converter (MQB) employing the lifting capacitor technique (the blue-dotted component in (b) indicates the lifting capacitor).
Figure 2. Quadratic boost topologies: (a) conventional quadratic boost converter (CQB) using two cascaded boost stages; (b) modified quadratic boost converter (MQB) employing the lifting capacitor technique (the blue-dotted component in (b) indicates the lifting capacitor).
Energies 18 05447 g002
Figure 3. Proposed topology of the single-switch quadratic boost converter (SSQB). The red-dotted box highlights the diode–switch substitution method.
Figure 3. Proposed topology of the single-switch quadratic boost converter (SSQB). The red-dotted box highlights the diode–switch substitution method.
Energies 18 05447 g003
Figure 4. Equivalent circuits for the two operation modes of the Modified Quadratic Boost (MQB) converter operating in CCM.
Figure 4. Equivalent circuits for the two operation modes of the Modified Quadratic Boost (MQB) converter operating in CCM.
Energies 18 05447 g004
Figure 5. Equivalent circuits for the two operation modes of the single-switch quadratic boost (SSQB) converter operating in CCM.
Figure 5. Equivalent circuits for the two operation modes of the single-switch quadratic boost (SSQB) converter operating in CCM.
Energies 18 05447 g005
Figure 6. Circuit diagrams of the MQB and SSQB topologies, with labeled electrical variables illustrating the voltage and current relationships for each configuration. (a) Modified quadratic boost converter (MQB); (b) Single-switch quadratic boost converter (SSQB).
Figure 6. Circuit diagrams of the MQB and SSQB topologies, with labeled electrical variables illustrating the voltage and current relationships for each configuration. (a) Modified quadratic boost converter (MQB); (b) Single-switch quadratic boost converter (SSQB).
Energies 18 05447 g006
Figure 7. Ideal voltage gain as a function of duty cycle (D) for both MQB and SSQB quadratic boost converter topologies. Key operating points are highlighted for selected values of D.
Figure 7. Ideal voltage gain as a function of duty cycle (D) for both MQB and SSQB quadratic boost converter topologies. Key operating points are highlighted for selected values of D.
Energies 18 05447 g007
Figure 8. Theoretical waveforms of voltages and currents associated with the switches, diodes, and inductors in the MQB model. The gate–source voltage waveform, shown in green at the bottom, is included to aid in understanding the signal behavior during each operating mode.
Figure 8. Theoretical waveforms of voltages and currents associated with the switches, diodes, and inductors in the MQB model. The gate–source voltage waveform, shown in green at the bottom, is included to aid in understanding the signal behavior during each operating mode.
Energies 18 05447 g008
Figure 9. Theoretical waveforms of voltages and currents corresponding to the switch, diodes, and inductors in the SSQB model. The gate–source voltage waveform, shown in green at the bottom, is included to facilitate understanding each operating mode’s signal behavior.
Figure 9. Theoretical waveforms of voltages and currents corresponding to the switch, diodes, and inductors in the SSQB model. The gate–source voltage waveform, shown in green at the bottom, is included to facilitate understanding each operating mode’s signal behavior.
Energies 18 05447 g009
Figure 10. Normalized semiconductor stresses in the MQB converter: (a) voltage and (b) current stresses.
Figure 10. Normalized semiconductor stresses in the MQB converter: (a) voltage and (b) current stresses.
Energies 18 05447 g010
Figure 11. Normalized semiconductor stresses in the SSQB converter: (a) voltage and (b) current stresses.
Figure 11. Normalized semiconductor stresses in the SSQB converter: (a) voltage and (b) current stresses.
Energies 18 05447 g011
Figure 12. Boundary between CCM and DCM based on normalized inductor time constants τ L 1 b and τ L 2 b defined in Equation (14).
Figure 12. Boundary between CCM and DCM based on normalized inductor time constants τ L 1 b and τ L 2 b defined in Equation (14).
Energies 18 05447 g012
Figure 13. Comparison of non-ideal voltage gains for MQB, SSQB, and selected high-gain converters [8,23].
Figure 13. Comparison of non-ideal voltage gains for MQB, SSQB, and selected high-gain converters [8,23].
Energies 18 05447 g013
Figure 14. Efficiency comparison of MQB and SSQB converters with high-gain topologies from [28,30] across varying duty cycles: (a) for the interval 0.05 < D < 1 ; (b) for the interval 0.05 < D < 0.5 .
Figure 14. Efficiency comparison of MQB and SSQB converters with high-gain topologies from [28,30] across varying duty cycles: (a) for the interval 0.05 < D < 1 ; (b) for the interval 0.05 < D < 0.5 .
Energies 18 05447 g014
Figure 15. Efficiency analysis of the SSQB converter at a fixed output voltage of V o = 20 V : (a) efficiency versus output power variation (expressed as a percentage of the rated output power) at a fixed input voltage V i n = 5 V ; (b) efficiency versus input voltage variation (expressed as a percentage of the nominal input voltage) at a constant output power.
Figure 15. Efficiency analysis of the SSQB converter at a fixed output voltage of V o = 20 V : (a) efficiency versus output power variation (expressed as a percentage of the rated output power) at a fixed input voltage V i n = 5 V ; (b) efficiency versus input voltage variation (expressed as a percentage of the nominal input voltage) at a constant output power.
Energies 18 05447 g015
Figure 16. SSQB loss distribution versus duty cycle, showing inductor loss P L , switch conduction loss P s c , switching loss P s s , and diode loss P D .
Figure 16. SSQB loss distribution versus duty cycle, showing inductor loss P L , switch conduction loss P s c , switching loss P s s , and diode loss P D .
Energies 18 05447 g016
Figure 17. Simulation waveforms of voltages and currents for switches, diodes, inductors, and input/output voltage terminals in the MQB model. Gate–source voltage (green trace) is included to illustrate mode transitions.
Figure 17. Simulation waveforms of voltages and currents for switches, diodes, inductors, and input/output voltage terminals in the MQB model. Gate–source voltage (green trace) is included to illustrate mode transitions.
Energies 18 05447 g017
Figure 18. Simulation waveforms of voltages and currents for the switch, diodes, inductors, and input/output voltage terminals in the SSQB model. Gate–source voltage (green trace) is included to illustrate mode transitions.
Figure 18. Simulation waveforms of voltages and currents for the switch, diodes, inductors, and input/output voltage terminals in the SSQB model. Gate–source voltage (green trace) is included to illustrate mode transitions.
Energies 18 05447 g018
Figure 19. Photo of the experimental setup.
Figure 19. Photo of the experimental setup.
Energies 18 05447 g019
Figure 20. Experimental waveforms of the MQB converter, illustrating key voltage and current characteristics (Time = 20 µs/div): (a) voltage and current of switch S 1 ; (b) voltage and current of switch S 2 ; (c) voltage and current of diode D 1 ; (d) voltage and current of diode D 2 ; (e) input and output voltage waveforms.
Figure 20. Experimental waveforms of the MQB converter, illustrating key voltage and current characteristics (Time = 20 µs/div): (a) voltage and current of switch S 1 ; (b) voltage and current of switch S 2 ; (c) voltage and current of diode D 1 ; (d) voltage and current of diode D 2 ; (e) input and output voltage waveforms.
Energies 18 05447 g020
Figure 21. Experimental waveforms of the proposed SSQB converter, illustrating key voltage and current characteristics (Time = 20 µs/div): (a) voltage and current of switch S 2 ; (b) voltage and current of diode D 1 ; (c) voltage and current of diode D 2 ; (d) voltage and current of diode D 3 ; (e) input and output voltage waveforms.
Figure 21. Experimental waveforms of the proposed SSQB converter, illustrating key voltage and current characteristics (Time = 20 µs/div): (a) voltage and current of switch S 2 ; (b) voltage and current of diode D 1 ; (c) voltage and current of diode D 2 ; (d) voltage and current of diode D 3 ; (e) input and output voltage waveforms.
Energies 18 05447 g021
Figure 22. Experimental performance curves of the SSQB converter: (a) variation of non-ideal voltage gain as a function of duty cycle, and (b) measured efficiency trend with respect to duty cycle.
Figure 22. Experimental performance curves of the SSQB converter: (a) variation of non-ideal voltage gain as a function of duty cycle, and (b) measured efficiency trend with respect to duty cycle.
Energies 18 05447 g022
Table 1. Normalized voltage stresses in the Modified Quadratic Boost converter (MQB).
Table 1. Normalized voltage stresses in the Modified Quadratic Boost converter (MQB).
ComponentVoltage Stress (in Terms of V in )Voltage Stress (in Terms of V out )Normalized Voltage Stress V V out
MOSFET S 1 V D S 1 = V i n 1 D V D S 1 = ( 1 D ) V o u t V D S 1 V o u t = 1 D
MOSFET S 2 V D S 2 = V i n ( 1 D ) 2 V D S 2 = V o u t V D S 2 V o u t = 1
Diode D 1 V D 1 = V i n 1 D V D 1 = ( 1 D ) V o u t V D 1 V o u t = 1 D
Diode D 2 V D 2 = V i n ( 1 D ) 2 V D 2 = V o u t V D 2 V o u t = 1
Table 2. Normalized current stresses in the Modified Quadratic Boost converter (MQB).
Table 2. Normalized current stresses in the Modified Quadratic Boost converter (MQB).
ComponentCurrent Stress (in Terms of I out )Current Stress (in Terms of I in )Normalized Current Stress I I in
MOSFET S 1 I D S 1 = D I o u t ( 1 D ) 2 I D S 1 = I i n I D S 1 I i n = D
MOSFET S 2 I D S 2 = D I o u t 1 D I D S 2 = D ( 1 D ) I i n I D S 2 I i n = D ( 1 D )
Diode D 1 I D 1 = I o u t 1 D I D 1 = ( 1 D ) I i n I D 1 I i n = 1 D
Diode D 2 I D 2 = I o u t I D 2 = ( 1 D ) 2 I i n I D 2 I i n = ( 1 D ) 2
Table 3. Normalized voltage stresses in the Single-Switch Quadratic Boost converter (SSQB).
Table 3. Normalized voltage stresses in the Single-Switch Quadratic Boost converter (SSQB).
ComponentVoltage Stress (in Terms of Vin)Voltage Stress (in Terms of Vout)Normalized Voltage Stress V V out
MOSFET S 2 V D S 2 = V i n ( 1 D ) 2 V D S 2 = V o u t V D S 2 V o u t = 1
Diode D 1 V D 1 = V i n ( 1 D ) V D 1 = ( 1 D ) V o u t V D 1 V o u t = 1 D
Diode D 2 V D 2 = V i n ( 1 D ) 2 V D 2 = V o u t V D 2 V o u t = 1
Diode D 3 V D 3 = D V i n ( 1 D ) 2 V D 3 = D V o u t V D 3 V o u t = D
Table 4. Normalized current stresses in the Single-Switch Quadratic Boost converter (SSQB).
Table 4. Normalized current stresses in the Single-Switch Quadratic Boost converter (SSQB).
ComponentCurrent Stress (in Terms of I out )Current Stress (in Terms of I in )Normalized Current Stress I I in
MOSFET S 2 I D S 2 = D ( 2 D ) I o u t ( 1 D ) 2 I D S 2 = D ( 2 D ) I i n I D S 2 I i n = D ( 2 D )
Diode D 1 I D 1 = I o u t 1 D I D 1 = ( 1 D ) I i n I D 1 I i n = 1 D
Diode D 2 I D 2 = I o u t I D 2 = ( 1 D ) 2 I i n I D 2 I i n = ( 1 D ) 2
Diode D 3 I D 3 = D I o u t ( 1 D ) 2 I D 3 = D I i n I D 3 I i n = D
Table 5. Converter parameters used for simulation and experimental validation.
Table 5. Converter parameters used for simulation and experimental validation.
ParameterValue
V in (V)5
f s (kHz)50
R ( Ω )1500
D (%)50
Δ i L (%)30
Δ v C (%)5
L 1 ( μ H)680
L 2 (mH)5.6
C 1 ( μ F)2.2
C o ( μ F)10
Disclaimer/Publisher’s Note: The statements, opinions and data contained in all publications are solely those of the individual author(s) and contributor(s) and not of MDPI and/or the editor(s). MDPI and/or the editor(s) disclaim responsibility for any injury to people or property resulting from any ideas, methods, instructions or products referred to in the content.

Share and Cite

MDPI and ACS Style

Dizangian, N.; Jovanovic, S.; Poure, P. Modeling and Experimental Verification of a Single-Switch Quadratic Boost DC–DC Converter with High Voltage Gain for Energy Harvesting. Energies 2025, 18, 5447. https://doi.org/10.3390/en18205447

AMA Style

Dizangian N, Jovanovic S, Poure P. Modeling and Experimental Verification of a Single-Switch Quadratic Boost DC–DC Converter with High Voltage Gain for Energy Harvesting. Energies. 2025; 18(20):5447. https://doi.org/10.3390/en18205447

Chicago/Turabian Style

Dizangian, Niloufar, Slavisa Jovanovic, and Philippe Poure. 2025. "Modeling and Experimental Verification of a Single-Switch Quadratic Boost DC–DC Converter with High Voltage Gain for Energy Harvesting" Energies 18, no. 20: 5447. https://doi.org/10.3390/en18205447

APA Style

Dizangian, N., Jovanovic, S., & Poure, P. (2025). Modeling and Experimental Verification of a Single-Switch Quadratic Boost DC–DC Converter with High Voltage Gain for Energy Harvesting. Energies, 18(20), 5447. https://doi.org/10.3390/en18205447

Note that from the first issue of 2016, this journal uses article numbers instead of page numbers. See further details here.

Article Metrics

Back to TopTop