1. Introduction
Over the past decade, research endeavors have yielded significant advancements in the domain of two-dimensional (2D) materials. These materials, characterized by their layered structure, exhibit remarkable and industrially relevant properties when reduced to a thickness of just a few atomic layers. Molybdenum disulfide (MoS
2), a quintessential example of 2D materials, has garnered considerable attention for its superior mechanical, optical, and electrical properties [
1]. Notably, MoS
2 is distinguished by its energy bandgap, which ranges between 1.2 and 1.8 eV, offering a distinct advantage over graphene, which lacks an intrinsic bandgap. This characteristic endows MoS
2 with great potential for application in field-effect transistors (FETs) and other electronic devices.
The Schottky barrier [
2] refers to a rectifying barrier formed at the metal–semiconductor interface, characterized by a lower interface voltage and a relatively thin depletion layer at the metal end, affecting current flow and posing an obstacle to device performance. These device performances generally refer to the on/off current, mobility, contact resistance, and subthreshold slope of the device. The Schottky barrier between metal and MoS
2 presents a significant obstacle to device performance [
3], exacerbated by MoS
2’s propensity to adsorb airborne contaminants due to its two-dimensional nature [
4]. This interaction not only compromises device integrity but also hinders its operational efficiency. To mitigate the impact of the metal–MoS
2 barrier, various strategies have been devised, such as implementing highly doped semiconductor contacts [
5] and employing scandium electrodes [
6]. However, these solutions face their own sets of challenges: the instability of highly doped contacts and the complexity and cost associated with scandium electrodes limit their industrial applicability. In contrast, annealing techniques have emerged as a widely adopted solution for removing adsorbed impurities from thin film [
7]; during annealing, metal atoms are capable of diffusing to the surface or interface region of the semiconductor, filling interface defects. This mechanism enhances the adhesion between the metal and semiconductor, minimizes the density of interface states, and subsequently lowers the contact resistance [
8]. Thermal annealing can also reduce these interface defects and states, enhancing carrier transport at the interface [
9]. Furthermore, it triggers phase transformations or chemical reactions in the interface region, forming new phases or compounds with lower contact resistance [
10]. Techniques such as rapid thermal annealing [
11], high-vacuum annealing [
12], and laser annealing [
8] have been extensively utilized for this purpose, offering a more practical approach to enhancing device performance and longevity.
However, the annealing methods commonly employed are not compatible with flexible MoS
2 devices, as the typical annealing temperatures exceed 150 °C [
13,
14]. Such high temperatures can easily damage flexible devices and require prolonged processing times, often exceeding 30 min. Although laser annealing offers the advantage of selective heating, its efficiency is notably low. Moreover, the equipment necessary for laser annealing is costly, rendering it impractical for uniform annealing of devices in large batches. Microwave annealing (MWA), a novel technique emerging in recent years, offers the advantage of a low thermal budget. This method facilitates a reduction in contact resistance for devices and aids in the removal of contaminants adsorbed onto the MoS
2 channels [
15,
16,
17]. These outcomes stem from the heat generated by electromagnetic loss between the material and the microwaves, similar to the effect of thermal annealing. However, current research on microwave annealing primarily focuses on dopant activation and the formation of ultra-shallow junctions [
18], with limited investigations into its effects on MoS
2 devices.
In the current field of MWA research, the majority of experiments are conducted using limited samples, as demonstrated in studies [
15,
19]. These investigations have confirmed that microwave annealing has a positive effect on the performance of MoS
2 devices. However, there is a notable absence of comprehensive research based on large datasets examining the uniform effects of MWA on the performance of MoS
2 devices. This research gap primarily arises from the challenges associated with fabricating numerous devices and standardizing parameters, which present significant operational difficulties. Particularly in the production of MoS
2 devices, the inconsistency in film thickness due to the use of the mechanical exfoliation method poses a major issue.
The impact of MWA can vary drastically with differences in film thickness. Thus, ensuring uniform thickness is critical for the reliability of the research findings. CVD can grow uniform MoS
2 films on large-area substrates, which is essential for mass production and industrial applications [
20]. Additionally, CVD process parameters (such as temperature, pressure, gas flow, etc.) can be precisely controlled to adjust the thickness, grain size, and morphology of the MoS
2 films [
21]. Despite CVD’s excellent scalability for industrial-scale production [
22], the MoS
2 films produced by this method may contain more defects and grain boundaries, affecting their electronic and optical properties [
23]. In contrast, MoS
2 sheets prepared by mechanical exfoliation typically exhibit higher crystal quality and lower defect density, making them suitable for research on high-performance electronic devices [
24]. Currently, MoS
2 devices prepared using the mechanical exfoliation method require film thickness to be measured individually using Atomic Force Microscopy (AFM), a process that becomes particularly cumbersome when handling large batches of samples. As a result, visual inspection of film thickness during the exfoliation process is the prevalent method, though this approach relies heavily on human experience and can lead to significant variances in accuracy between individuals. Therefore, there is an urgent need to develop a new technological method to assist in the mechanical exfoliation process, enabling accurate identification and classification of film thickness, thereby improving the accuracy of recognition while reducing experimental costs. Furthermore, clear guidance on how to effectively apply MWA to enhance the performance of MoS
2-based devices is currently lacking.
In this study, we prepared MoS2 devices on a large scale via mechanical exfoliation. It was crucial to collect comprehensive data and maintain consistency in parameters to effectively analyze the impact of microwave annealing. To enhance the accuracy of film thickness identification and reduce the time required for device fabrication, we employed a neural network method based on the HSV color space. This approach not only improved accuracy compared to traditional visual inspection but also significantly reduced the time needed for mass fabrication, ensuring uniformity of the films throughout the experimental process. Subsequently, we subjected the devices to MWA and extracted their electrical performance parameters. Statistical analysis of these parameters allowed us to determine an optimal MWA power setting that significantly enhanced device performance, achieving maximal improvement in their electrical characteristics.
3. Results and Discussion
Table 3 presents the temperature variations observed during various MWA procedures, as measured by an infrared thermometer positioned underneath the equipment. Within a nitrogen atmosphere, the recorded peak temperatures corresponding to microwave powers of 210 W, 490 W, 700 W, and 980 W are 60.1 °C, 87.5 °C, 121.2 °C, and 148.8 °C, respectively. From
Table 3, it is evident that the peak temperatures achieved during our MWA process are consistently lower than the glass transition temperatures commonly associated with flexible semiconductor substrates, such as polyimide (PI) and polyethylene naphtholate (PEN).
To evaluate the impact of MWA at varying power levels on the performance of MoS
2 transistors, we performed experiments to examine the transfer characteristics of multilayer MoS
2 transistors as influenced by the annealing power. As illustrated in
Figure 6,
Figure 6a presents an optical photograph of a typical MoS
2 device, accompanied by precise thickness measurements obtained through AFM; the exact value of its film thickness is 7.9 nm.
Figure 6b displays Raman spectroscopy characterizations of the device before and after annealing, with the black line representing pre-annealing and the red line post-annealing. From the Raman spectroscopy characterization, we can observe that the peak positions for
and
are at 382.6 cm
−1 and 408.4 cm
−1, respectively, with a difference of 25.8 cm
−1. This difference characterizes the features of multilayer MoS
2 film. Additionally, a lower peak position at 1122.5 cm
−1 signifies the peak corresponding to silicon (Si). From the Raman spectroscopy analysis conducted before and after annealing, it is observable that there are virtually no changes in the peak values. This comparison suggests that MWA in a nitrogen atmosphere has a minimal impact on the structural integrity of the multilayer MoS
2 film, as demonstrated by the negligible differences in the Raman spectra pre- and post-annealing [
30].
3.1. Results of Transfer and Output Characteristic Curves
Figure 7 and
Figure 8 present the transfer characteristic curves and output characteristic curves of typical multilayer MoS
2 transistors under four different annealing power settings. The transfer characteristic curves clearly demonstrate n-type behavior in the channels of the fabricated multilayer MoS
2 transistors, indicating that the drain current increases with the rise in gate voltage.
Figure 7 presents schematic diagrams of the typical transfer characteristics of MoS
2 at varying power levels in our dataset. From the transfer characteristic curves shown in
Figure 7a,b, we observe an increase in the on-state current from
to
, a 14% improvement, under 210 W annealing power. Similarly, at a power level of 490 W, shown in
Figure 7c,d, the on-state current increased from
to
, marking a 71% improvement. The enhancement is even more pronounced at 700 W power, where the on-state current escalated from
to
, an increase of 178% in
Figure 7e,f. Although at 980 W power, the on-state current rose from
to
, a 166% increase, the improvement is still substantial in
Figure 7g,h.
However, it is important to note that the off-state current also experienced a significant rise at this level. The off-state current increased from A to A, leading to a severe degradation in the on/off ratio; the on/off ratio is only after microwave annealing. From the transfer characteristic curves of MoS2 devices, it is evident that MWA has a significant positive correlation with the device’s on-state current. This means that as the annealing power increases, the on-state current also gradually increases. However, an increase in annealing power is not always beneficial. Specifically, when the annealing power exceeds 700 W, there is a noticeable increase in the off-state current, which is disadvantageous for achieving an ideal on/off ratio in the device.
Figure 8 illustrates the output characteristic curves of MoS
2 devices before and after MWA at various power levels. It is evident from the figure that, under the same gate voltage, the source–drain current increases post-annealing compared to its pre-annealed state, with the most significant enhancements observed following annealing at 700 W and 980 W microwave power. This observation is consistent with the analysis of the transfer characteristic curves presented in
Figure 8, underscoring the pronounced effect of MWA on enhancing the on-state current.
3.2. Results of Other Electrical Parameters
Additionally, we evaluated the average of the normalized on-state current across four few-layer MoS
2 transistors subjected to annealing in an N
2 atmosphere as a function of the annealing power, depicted in
Figure 9a. The on-state current is identified as the maximal output current achieved within a high gate voltage range. The reference point for normalizing the on-state current is its value for the corresponding multilayer MoS
2 transistor prior to annealing. It is evident that the on-state current of MoS
2 devices increases with escalating annealing power, indicating a positive correlation between MWA and the on-state current of the devices. Subsequently, we investigated the relationship between the subthreshold swing (SS), defined as
, and the annealing power.
Figure 9b showcases statistical data across various microwave powers, and it reveals that the subthreshold swing decreases with increasing annealing power; however, a notable increase in the subthreshold swing is observed when the annealing power exceeds 700 W, indicating a deterioration in device performance at excessively high annealing powers.
Further investigations were conducted on the variation in field-effect and intrinsic mobility with annealing power; field-effect mobility is a critical parameter for assessing the performance of MOSFETs. A high field-effect mobility indicates that the MOSFET possesses superior switching speeds and lower power consumption. The field-effect mobility can be calculated using the following equation [
16,
31]:
Compared to field-effect mobility, intrinsic mobility values are not influenced by contact resistance. Consequently, intrinsic mobility can be utilized to determine whether the MWA effects on MoS
2 transistors occur at the metal–semiconductor interface or within the MoS
2 channel itself. The value of intrinsic mobility can be calculated using the Y-function formula described in the literature [
8]:
Figure 9c,d display the statistical distribution of field-effect mobility and intrinsic mobility data. It can be observed that the field-effect mobility gradually increases with the rise in annealing power until it reaches 700 W, beyond which it begins to decline. The trend in intrinsic mobility mirrors that of field-effect mobility, albeit with a relatively lower rate of increase. This indicates that the impact of MWA on the metal–semiconductor contact area is significantly greater than its effect on the MoS
2 channel. There are two main reasons for this. Firstly, MoS
2 is a material with low electromagnetic loss. Thus, it does not generate heat through electromagnetic losses in a microwave field; its temperature primarily relies on thermal conduction. Secondly, the MoS
2 thin films in our experiment were prepared using a mechanical exfoliation technique, ensuring high film quality from the start. The annealing process primarily serves to remove contaminants adsorbed due to the two-dimensional nature of the material.
To further analyze the impact of MWA on device performance, we extracted trends in contact resistance and trap density as functions of annealing power.
Figure 9e,f display the statistical data of contact resistance and trap density variations with annealing power, respectively. The generation of contact resistance primarily arises from the interaction between metals and n-type semiconductors. This is due to the work function of metals often being lower than that of semiconductors, leading to a flow of electrons from the semiconductor to the metal to balance the Fermi levels. This process results in the formation of a depletion zone at the semiconductor surface where electron concentration is diminished, subsequently creating an energy barrier known as the Schottky barrier. In the off and on states of MoS
2 transistors, thermionic emission and tunneling through the Schottky barrier, respectively, restrict charge injection. As observed in
Figure 9e, the contact resistance initially shows a decreasing trend with increasing microwave power until it surpasses 700 W, after which it begins to increase. This pattern aligns with our previous analysis of mobility changes, further validating the accuracy of the annealing trend. According to the output characteristics curve and statistical data on contact resistance, the reduction in contact resistance is primarily attributed to MWA potentially increasing the carrier concentration at the interface, thereby reducing the width of the tunneling barrier. The explanation for this phenomenon is discussed in [
8], mainly attributed to the post-annealing diffusion of Cr into MoS
2, forming a Cr-MoS
2 solid solution. The doped MoS
2 becomes more conductive as a result. The reduction in the tunnel barrier width by forming such solid solutions at the interface is the primary mechanism behind the decrease in contact resistance following microwave annealing. When microwave power exceeds 700 W, an increase in contact resistance is observed, potentially due to the high microwave power causing temperature increases that damage the metal–semiconductor interface. Although the measured temperatures are not high, the unique loss mechanism of microwaves in a 5.8 GHz electromagnetic environment leads to the metal electrodes, which are thinner than the skin depth, becoming efficient microwave absorbers [
16]. As the microwave power gradually increases, the electrode temperature may exceed the tolerance temperature of MoS
2, thereby damaging the metal–semiconductor interface. The formula for calculating trap density is derived from the literature [
17], and the results shown in
Figure 9f, we observed that variations in trap density across different microwave power settings were not significant; a modest decrease in trap density was noted as the annealing power increased. Since the variation in trap density was not significantly evident, and considering the substantial correlation between trap density and the interface of the dielectric layer with the MoS
2 film, we further characterized the dielectric layer before and after annealing (700 W) to investigate the differences in the surface of SiO
2 dielectric layer pre- and post-annealing.
3.3. AFM Results of the SiO2 Dielectric
Figure 10 presents the AFM images of a typical SiO
2 dielectric layer before and after annealing. From the AFM images, it can be observed that the roughness average (Ra) value decreased from 0.795 nm before annealing to 0.483 nm afterward, and the root mean square (Rq) value dropped from 0.553 nm to 0.361 nm post-annealing. This suggests a minor improvement in the surface quality of the SiO
2 dielectric layer due to annealing, although the changes are almost negligible. This phenomenon is understandable, given that silicon dioxide is not an effective microwave-absorbing material. Therefore, it does not generate heat from electromagnetic loss in a microwave field. Only the thermal conduction at the metal–semiconductor junction has a certain impact on the nearby SiO
2 substrate layer. We hypothesize that the significant enhancement observed in the SiO
2 dielectric layer following MWA is primarily attributable to the elimination of impurities. These impurities, predominantly residues such as adhesives from mechanical exfoliation, are effectively removed during the process. Additionally, the procedure also eliminates water molecules adsorbed on the surface of MoS
2 [
30]. Consequently, the impact of MWA on trap density is also extremely limited.