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Article

Analysis and Parameter Design of SiC-Based Current Source Inverter (CSI)

1
Academy for Engineer & Technology, Fudan University, 220, Handan Road, Shanghai 200433, China
2
School of Automation, Nanjing University of Science and Technology, No. 200, Xiaolingwei Street Xuanwu District, Nanjing 210094, China
3
School of Information Science and Engineering, Fudan University, 220, Handan Road, Shanghai 200433, China
*
Authors to whom correspondence should be addressed.
World Electr. Veh. J. 2022, 13(10), 187; https://doi.org/10.3390/wevj13100187
Submission received: 3 September 2022 / Revised: 25 September 2022 / Accepted: 26 September 2022 / Published: 12 October 2022
(This article belongs to the Special Issue Modern Charging Techniques for Electrical Vehicles)

Abstract

:
Current source inverters (CSIs) use inductors as the major component to store energy. Compared with voltage source inverters (VSIs), CSIs have two advantages: 1. They can avoid the converter failure caused by capacitor failures, and 2. The load current does not increase with load mutation or even short-circuit failure. Therefore, CSIs can be a promising technology for EV charging. However, the waveforms, parameter design procedure, and power efficiency are still unclear. Therefore, it is unclear if CSIs are suitable for EV chargers. This article derives the closed-loop equations of the critical components, including the inductor current waveforms and the voltage ripple. Especially, the load over-voltage phenomenon is derived and verified to further ensure the reliability of the CSI system. Based on the derived equations and reliability requirements, the parameter design procedure is proposed. The power efficiency of both the Si- and SiC-based converters are derived and compared to remove the barrier of applying CSIs in EV chargers in the industry. Our simulations and experiments verify the correctness of the system modeling, over-voltage phenomenon, and power efficiency. All the simulation files (using PLECS) and calculation files (using MATLAB) are attached for the readers to verify and/or further modify.

1. Introduction

Source inverters are widely used in advanced electric vehicle (EV) chargers [1,2,3,4,5,6], grid-tied photovoltaic (PV) systems [6,7,8,9,10,11], wind turbine generator (WTG) systems [6], motor drives [12,13], data center power supplies [14,15,16,17], etc. In EV charging technology, bidirectional vehicle-to-grid and grid-to-vehicle charging can make full use of the internal power cells of EVs and employ them in the microgrid as mobile energy storage units [18]. Figure 1 gives two examples: the grid-connected PV-EV battery charging system [19] and the grid-connected wind turbine generator (WTG)-EV battery charging system [20]. As shown in Figure 1, a bidirectional inverter is necessary for transferring power from PV array to grid because the output of PV generators is DC; and as shown in Figure 1. (b), a bidirectional inverter is used for transferring power from the DC chargers to wind generators because the output of wind generators is AC. Moreover, the bidirectional chargers adopt the reflex charging control strategy [21,22], considering traditional DC–DC charging processes have the problems of incomplete reaction, excessive thermal generation, and a short battery life cycle due to long-lasting charging [23]. Moreover, bipolar pulses produced by inverters can be used in the reflex charging mode [24]. Compared with the traditional DC power charging process, the reflex charging mode can speed the charging process up and extend the life of batteries [21,25,26,27]. Generally, inverters are classified into voltage source inverters (VSIs) and current source inverters (CSIs) by considering the structure of the inverters [28,29,30,31]. Figure 2 shows the typical topologies of VSIs and CSIs [28]. For VSIs, the DC voltage is an AC/DC rectifier, and a large capacitor is used to maintain the DC-link voltage stability; as for CSIs, the DC current source is an AC/DC rectifier with a large inductor that is used to maintain a constant current [28,29]. VSIs use DC-link capacitors as the major components to store energy, while CSIs use inductors to store energy [31].
Meanwhile, CSIs are mostly used in reliability-sensitive applications, such as electric field welding [32,33]. The authors of [34] evaluated the mean time between failure (MTBF) and concluded that the MTBF of capacitors could dominate the MTBF of the whole converter. Therefore, medical grade products (e.g., electric field welding [32,33] and electrosurgical generators [35]) still prefer CSIs.
Furthermore, CSIs are also widely used in applications that suffer load mutation [35]. Because CSIs use inductors as the major components to store energy, they tend to keep the current constant during load mutation or even a short-circuit fault without extra high-speed feedback control. Alternatively, because VSIs tend to keep the voltage constant, VSIs suffer from a large current if circuits encounter a short-circuit fault.
These advantages in reliability and short-circuit protection are promising in EV chargers. Firstly, EV chargers are automation grade application and require high reliability. CSIs as capacitorless converters can have a high MTBF [34] and can operate with high environmental temperatures. Furthermore, when the batteries encounter a short-circuit fault, a high current should be strictly forbidden. Therefore, CSIs are inherently suitable for EV chargers and battery protection.
On the other hand, wide band-gap (WBG) semiconductor technologies such as silicon carbide (SiC) and gallium nitride (GaN) recently have received increased attention for their superior characteristics [36,37,38,39,40,41], as Figure 3 [42] shows. Specifically, applications such as electric vehicles (EVs) demand that WBG semiconductors meet their stringent specifications [42].
The physical properties of SiC, Si, and GaN materials are given in Table 1 [43], SiC MOSFETs have a higher breakdown electric field, which allows higher and thinner doped voltage blocking layers [44]. It makes SiC MOSFETs have a lower voltage drop and smaller on-state resistance than those of Si at the same voltage rating [45]. In addition, a higher breakdown electric field results in a smaller die area, which makes the junction capacitance of SiC MOSFETs smaller than that of Si MOSFETs. Therefore, SiC MOSFETs have a reduced switching loss. Therefore, replacing Si MOSFETs with SiC MOSFETs can improve the efficiency of the inverter.
Figure 4 shows the structure of a cell of Si MOSFET, SiC MOSFET and GaN HEMT [46,47]. The SiC MOSFET is a vertical trench construction similar to Si MOSFETs, while GaN is a lateral construction [46,47]. Therefore, SiC parts are usually available in a compatible package style, such as TO-247 and TO-220, allowing them to drop in as replacements for MOSFETs and IGBTs in existing designs, giving immediate advantages [47]. While GaN HEMTs have a different structure and mechanism, they still need further analysis on aspects such as dynamic on-state resistance [48,49]. Therefore, applications with high reliability requirements prefer SiC MOSFETs.
The authors of [35] proved CSIs’ ability in the transition between the three control modes: the constant voltage, current, and power modes. Therefore, [35] forms the foundation for the CSIs’ application in EV chargers. The authors of [24] demonstrated that CSIs can be applied to EV chargers and proposed a drive circuit to prevent output voltage overshoot. However, two basic questions remain that prohibit CSIs’ application in the industry: 1. The parameter design procedure is unclear; 2. The power loss is unclear. Especially with SiC MOSFETs’ wide application, both the volume and power loss of CSIs would be reduced. Theoretic analyses would be important to discuss the possibility to use CSI topology as the EV charger.
This paper comprehensively derives the expressions of the critical waveforms in CSIs. Wherein, the output voltage and its ripple are critical for overvoltage protection; the inductor current and its ripple can be used to calculate the volume and power loss of the inductors. Therefore, the comprehensive parameter design diagram is given. Furthermore, the power loss as well as the power efficiency calculation is presented. With the power loss equations, this paper also compares the power efficiency between the converters with Si MOSFETs and the converters with SiC MOSFETs, and hence verifies the advantages of applying SiC MOSFETs in CSIs.
In this research, the circuit operating condition analysis and the formulas of output characteristics were studied, including the output voltage and its ripple, which are necessary for proper overvoltage protection design. The parameter design is presented as well. Moreover, the power loss calculation and efficiency estimation are discussed, especially for its application based on SiC power devices, providing the possibility for its application in the industry. Finally, the correctness of those theoretical analyses was verified through both simulations and experiments.
The rest of the article is organized as follows: Section 2 presents the circuit topology and the operation principles. With the derived expressions, the article analyzes the reason for the voltage overshoot and the magnitude and shape of the current ripple. Furthermore, Section 2 discusses the parameter design procedure. Section 3 derives the equation of the power conversion efficiency and compares the power efficiency between Si- and SiC-based CSIs. Furthermore, Section 4 presents the simulations and experiments that verified the waveforms and the power conversion efficiency. Finally, Section 5 concludes the article. And all parameters in this paper are symbolized according to the following nomenclature, as shown in Table 2.

2. Operation and Modeling of CSIs

The topology of the capacitor-free CSI is shown in Figure 5 [24]. Ref. [24] describes the operation principle of the circuit but could not provide the detailed waveform equations. Section 2 presents the circuit, operation principles, and modulation scheme, and then derives the waveform equations with both the simplified and precise models. Moreover, the difference between the precise and accurate models is compared. Based on all the equations, the parameter design procedure is proposed as well.

2.1. Circuits, Operation Principles, and Modulation Scheme

As shown in Figure 6, the CSI was operated in switching period Ts corresponding to the frequency fs of S5, and S1S4 operated at a higher frequency fsw to produce bipolar pulses. The D denotes the duty cycle of S5. Under this operation scheme in Figure 6, four circuit stages of the inverter are shown in Figure 7. It also shows the current flow in each mode.

2.2. Operation Principles and Two Models

2.2.1. Simplified Model

Firstly, a simplified model was constructed with ideal switches. In this model, the ideal switches were short circuit in the on-state and open circuit in the off-state.
(1)
The charging stage: (t0 − t1)
As shown in Figure 7a, when S1S5 were ON and the freewheel diode was OFF, the inductor was charged by the input DC source. Because S5 was modeled as an ideal switch, there was no voltage across it. The circuit voltage equation based on KVL is:
v L ( t ) = U D C = L d i L d t = L Δ i L D T s
where UDC is the input DC voltage, and ΔiL is the inductor current ripple defined as the difference between the inductor current peak and valley values. The decrease of the inductor current was equal to the increase of the inductor when the inverter worked in a steady state and can be expressed as:
Δ i L = D U D C L f s
(2)
The discharging stage: (t1t4)
As shown in Figure 7b,c, S5 was always OFF in this stage, and S1, S4 and S2, S3 were two pairs of switches operating in complementary control. Since the freewheel diode and S1–S4 were modeled as ideal switches, the circuit voltage equation based on KVL is:
v L ( t ) + v o ( t ) = 0
The average voltage across inductors was zero when the circuit was in a steady state:
1 T s 0 T s v L ( t ) d t = 1 T s 0 D T s U d c d t + 1 T s 0 ( 1 D ) T s v l o a d ( t ) d t = 0
U D C D T s I L R l o a d ( 1 D ) T s = 0
Moreover, the average current of inductor IL can be expressed as:
I L = D U D C ( 1 D ) R l o a d

2.2.2. Precise Model

This section proposes a precise model where the MOSFETs were modeled as a constant resistor Rds(on), and on-state and freewheel diodes were modeled as a constant voltage drop VF in the on-state. They were both modeled as an open circuit in the off-state. The equivalent circuit of the charging and discharging states are shown in Figure 8.
As shown in Figure 8, both stages can be described as an RL fist-order circuit with one excitation, and the differential equation that describes the inductor current can be expressed as (7) and (8):
L d i L d t + 2 R d s ( o n ) i L = U D C
L d i L d t + i L ( 2 R d s o n + R l o a d ) = V F
The peak and valley values of the inductor current are denoted as Il.max and IL.min, respectively. By solving the differential Equations (7) and (8), the inductor currents in the charging and discharging states can be expressed as (9) and (10), respectively:
i L _ C h ( t ) = I L . min e 2 R d s o n t / L + U D C 2 R d s o n ( 1 e 2 R d s o n t / L )
i L _ D i s ( t ) = I L . max e ( 2 R d s o n + R l o a d ) t / L + V F 2 R d s o n + R l o a d ( 1 e ( 2 R d s o n + R l o a d ) t / L )
The energy discharged by the inductor and charged from the inductor reached a balance when the inverter worked in the steady state, as shown in (11) and (12), respectively:
| Δ i L + | = | Δ i L |
i L _ C h ( D T c ) i L _ C h ( 0 ) = i L _ D i s ( 0 ) i L _ D i s ( ( 1 D ) T c )
By solving (11), the peak and valley values of the inductor currents IL.max and IL.min can be obtained according to Equations (13) and (14), respectively:
I L . min = U d c e ( 2 R d s ( o n ) + R l o a d ) ( 1 D ) / ( L f s ) 2 R d s ( o n ) ( 1 e 2 R d s ( o n ) D / ( L f s ) ) V F e ( 2 R d s ( o n ) + R l o a d ) ( 1 D ) / ( L f s ) 2 R d s ( o n ) + R l o a d 1 e 2 R d s ( o n )( D / ( L f s ) ( R l o a d + 2 R d s ( o n ) ) ( 1 D ) / ( L f s )
I L . max = I L . min e 2 R d s ( o n ) D / ( L f s ) + U d c 2 R d s o n ( 1 e 2 R d s ( o n ) D / ( L f s ) )

2.3. Model Comparison and Error Analysis

The simplified model was based on the condition that all switches were ideal switches, while in the precise model, the diode was modeled as constant voltage VF and the MOSFET was modeled as resistor Rds(on). Therefore, the simplified model was valid for all kinds of switches (SiC MOSFETs, Si MOSFETs, and GaN HEMTs). However, GaN HEMTs’ dynamic on-state resistance was different compared with those of MOSFETs. Therefore, the precise model was valid for SiC and Si MOSFETs, but less valid for GaN HEMTs. The errors of the two models are discussed below.
Figure 9a,b show the comparison of the inductor current waveforms between simulations, the simplified model, and the precise model. As shown in Figure 9a, the results calculated by the simplified and precise models both matched the simulation results when the inverter was on the rated conditions. However, when the inverter was under a low load, as shown in Figure 9b, the error of the results calculated by the simplified model was great, but the results calculated by this precise model matched the simulation results very well.
The error of the inductor current ripple ΔiL and the inductor average current IL solved by the proposed two models are shown in Figure 10, where IL* and ΔiL * were solved by the simplified model, and IL and ΔiL were solved by the precise model. As shown in Figure 10, the error between these two models increased with the increase of IL, and the error was positively correlated with RDS(on). The error of IL and ΔiL were both within 10% when Rds(on) was less than 500 mΩ and IL was less than 30 A. When the Rds(on) of the MOSFETs was smaller than one milliohm of resistance, the error of IL and ΔiL were both less than 5%.
In the precise model, MOSFETs were modeled as a constant resistor, but the MOSFETs’ resistance changed with ID. However, this variation was small, especially for SiC MOSFETs (within 16.67%). With the parameter variation shown in Table 3 [50,51], simulation results with a typical, minimum, and maximum Rds(on) were conducted. The results are shown in Figure 11. It indicated that the precise model was still valid when Rds(on) changed with ID.

2.4. Parameter Design Based on Simplified Model

2.4.1. Inductor Design

Inverter Working in CCM Mode

Because CSIs work in the CCM mode, iL is always larger than zero, and its minimal value IL.min is zero:
I L . min = I L 1 2 Δ I L = 0
L c = ( 1 D ) R l o a d 2 f s

The Current Ripple

The current ripple was calculated by (2). As shown in (2), the inductor current ripple ΔiL was determined by the inductance when the input DC voltage UDC was constant and the charge–discharge frequency fs and duty cycle D were fixed. The current ripple was reversely correlated with the inductance. To ensure that the ripple of the inductance current met the ripple current limits within the full input voltage range, the maximum value of inductance under different modes was:
Δ i L = D U D C L f s γ I L . max
where γ is the ripple quotient defined as the ratio of ΔiL to IL.
The inductance should be designed to satisfy both the above conditions:
L max { L c , L min }

2.4.2. Active Switches Selection

Voltage Stress

During the discharge state, S5 was turned off, as shown in Figure 7b–d, and the voltage potential of its drain is Udc; the voltage potential of its source is −VF, so the voltage stress of S5 was:
V D S , S 5 = U d c + V F
During the discharge state, the voltage of the turn-off switch was the sum of the voltage of load resistance and the conduction voltage of the on-state switch, so the voltage stress of S1–S4 can be expressed as:
v D S , S 1 ~ S 4 = i L ( R L o a d + R D S ( o n ) )
From the previous analysis, the inductance current decreased during the discharging state; thus, the maximum VDS was at the start point of the discharge state:
V D S . max ( S 1 ~ S 4 ) = I L . max ( R l o a d + R D S ( o n ) ) U l o a d . max

Current Capability of Switches

The drain source current of S5 was equal to the inductance current during the charge state, and could be turned off during the discharge state, so the average current in each charging period was:
I D ( p u l s e ) , S 5 = I L . max
I D ( a v ) , S 5 = 1 T 0 D T s ( i L ) d t = D I L
The active switches S1S4 were always ON during the charge state, and two pairs of switches were alternatively turned on and off during the discharge state with a high frequency fsw. S1 and S4 were turned on to output a positive pulse; S2 and S3 were turned on to output a negative pulse if the output pulse widths of the positive and negative pulses were equal, i.e., the conduction times of S1/S4 and S2/S3 were equal to half the discharge state:
I D ( S 1 ~ S 4 ) = 1 T s [ 0 D T s ( 1 2 i L ) d t + 0 ( 1 D ) T s ( i L ) d t ] = 1 + D 2 I L

2.4.3. Freewheeling Diode Selection

During the charging state, as Figure 7a shows, the diode was turned off by the reverse voltage, vreverse:
v r e v e r s e = U D C i L R D S ( o n )
The inductance current increased during the charge state, and thus VR reached its maximum at the end point of the discharge state and fell to its minimum when the inductance charging finish time was:
V R . max = U D C I L . min R D S ( o n )
The diode could only be turned on during the discharge state and when its current was equal to the inductance current.
The average current in each charging period was:
I F = 1 T s 0 ( 1 D ) T s ( i L ) d t = ( 1 D ) I L

3. Power Loss Estimation Based on the Precise Model

3.1. Conduction Loss

The conduction losses of MOSFETs were usually expressed using their on-state resistance Rds(on), while the conduction losses of freewheel diodes were usually expressed using their forward threshold voltage VF. Moreover, from the analysis in Section 2.2, we know there was current flowing through S5 only in the charging state, and this current flowed through two circuit branches consisting of S1/S3 and S2/S4 on average. However, there was current flowing through the freewheel diode only in the discharging state, and this current also flowed through S1/S4 or S2/S3 by turns. Therefore, the conduction of each switch can be expressed as:
p c o n d , S 5 = ( 0 D T s i L _ C h 2 R d s ( o n ) d t ) f s
p c o n d , S 1 = S 2 = S 3 = S 4 = [ 0 D T s ( i L _ C h 2 ) 2 R D S ( o n ) d t + 1 2 0 ( 1 D ) T s i L _ D i s 2 R d s ( o n ) d t ] f s
p c o n d , D i o d e = ( 0 ( 1 D ) T s V F i L _ D i s d t ) f s

3.2. Switching Loss

The switching process of MOSFETs took some time when the voltage and current waveforms overlapped, which produced the switching loss. Therefore, the energy loss can be expressed as:
p s w = ( E o n T s + E o f f T s ) f s = [ 0 t o n u 1 ( t ) i 1 ( t ) d t + 0 t o f f u 2 ( t ) i 2 ( t ) d t ] f s
where ton is the time interval of the turn-on stage, while toff is the time interval of the turn-off stage. Moreover, u1 and i1 are the voltage and current of MOSFETs when they are turned on, respectively, while u2 and i2 are the voltage and current of MOSFETs when they are turned off, respectively.
Here, parasitic inductances of MOSFETs were not taken into consideration, and the switching behavior was determined by the parasitic capacitance consisting of Cgd, Cgs, and Cds.
Figure 12 shows the waveforms when the MOSFETs were turning on and off. Combining (30), the power loss of the turn-on and -off stages, respectively, can be calculated as:
E o n = 0 t r i V D S 1 ( I 1 t r i t ) d t + 0 t r r V D S 1 ( I r r t r r t ) d t + 0 t f u ( V D S 1 V D S 1 t f u t ) I 1 d t = 1 2 V D S 1 I 1 ( t r i + t f u ) + 1 2 V D S 1 I R R t r r
E o f f = 0 t r u ( V D S 2 t r u t ) I 2 d t + 0 t f i V D S 2 ( I 2 I 2 t f i t ) d t = 1 2 V D S 2 I 2 ( t r u + t f i )
where tri and tfu are the times of current rising and voltage falling during the turn-on transient, respectively, and tru and tfi are the times of voltage rising and current falling during the turn-off transient, respectively, which can be calculated from (32)–(35).
t r i = R g C i s s ln ( V g V g V m )
t f u = R g C g d , a v V D S V o n V g V m
t r u = R g C g d , a v V D S V o n V m
t f i = R g C i s s V m V t h V m
(a)
Analysis of Communication between the Charging and Discharging States
When the CSI transited between the charging and discharging states, S1S4 stayed ON and there was no power loss consumed from S1–S4 during this process. The current communication was between the freewheel diode and S5, as shown in Figure 13.
S5 stayed ON in the charging state when IL increased, and S5 stayed OFF in the discharging state when IL decreased. Therefore, as for S5, I1 and I2 in (30) and (31) were the minimum values of the inductor current IL.min and the maximum of inductor current IL.max, respectively, and VDS can be calculated with (17). Then, the switching loss of S5 can be calculated as:
p s w , S 5 = f s { 1 2 ( V D C + V F ) [ I L . min ( t r i + t f u ) + I L . max ( t r u + t f i ) ] + Q g V G }
where IL.min and IL.max can be calculated from (11) in the precise model.
(b)
Analysis of Communication between the P- and N-Modes during the Discharging State
During the discharging state, S1/S4 and S2/S3 turned on and off when the working state changed between the P- and N-modes by turns. As shown in Figure 14, the current did not pass through the body diode of S1S4 in this interval; thus, there was no reverse recovery effect for S1S4.
Ng denotes the number of bipolar pulses in one discharging state, so S1 and S4 turned on and off for Ng times. The current of S1S4 was the current of the inductor that changed during the discharging state given in (6), so the switching loss for each time was different and should be calculated respectively. For the kth switching stage, the switching loss of S1S4 can be calculated as:
E s w , S 1 = S 4 ( k ) = 1 2 ( R l o a d + R d s ( o n ) ) [ i L ( t = k / f s w ) 2 ( t r i + t f u ) + i L ( t = ( 0.5 + k ) / f s w ) 2 ( t r u + t f i ) ] + Q g V G
E s w , S 2 = S 3 ( k ) = 1 2 ( R l o a d + R d s ( o n ) ) [ i L ( t = ( 0.5 + k ) / f s w ) 2 ( t r i + t f u ) + i L ( t = ( k 1 ) / f s w ) 2 ( t r u + t f i ) ] + Q g V G
Moreover, the total switching loss of S1–S4 in a period of Ts can be calculated as:
p s w , S 1 = S 4 = f s { ( R l o a d + R d s ( o n ) ) k = 1 N g [ i L ( t = k / f s w ) 2 ( t r i + t f u ) + i L ( t = ( 0.5 + k ) / f s w ) 2 ( t r u + t f i ) ] + Q g V G }
p s w , S 2 = S 3 = f s { ( R l o a d + R d s ( o n ) ) k = 1 N g [ i L ( t = ( 0.5 + k ) / f s w ) 2 ( t r i + t f u ) + i L ( t = ( k 1 ) / f s w ) 2 ( t r u + t f i ) ] + Q g V G }
Then, the total loss for the CSI can be calculated as:
p l o s s - t o t a l = p c o n d , S 5 + 4 p c o n d , S 1 = S 2 = S 3 = S 4 + p c o n d , D i o d e + p s w , S 5 + 2 p s w , S 1 = S 4 + 2 p s w , S 2 = S 3

3.3. Efficiency Comparison between Si- and SiC-Based CSIs

To identify the main cause of losses in the inverter, two kinds of power MOSFETs were used in the proposed topology, and their switching and conduction losses were compared. The main electrical characteristics of these two devices are shown in Table 4.
Figure 15 compares the power losses between the SiC- and the Si-based CSIs. The input DC voltage was specified as 100 V, while the output power and the switching frequency varied in value. Figure 15a–d points out that when the inverter transferred low power, the switching loss totally dominated the power loss, and the all-SiC CSI had a great advantage in power loss reduction. This power loss reduction was more pronounced at a high switching frequency. Figure 16a–d showed the curves of the efficiency versus the output power and the switching frequency in the all-Si- and the all-SiC-based CSIs. Figure 16a gives the efficiency curves when the input DC voltage was 100 V and the output power was 100, 150, 200, 250, 300, 350, 400, and 500 W; Figure 16b gives the efficiency curves when the input DC voltage was 400 V and the output power was 2, 2.5, 3, 3.5, 4, and 4.5 kW. Figure 16c shows the efficiency curves when the input DC voltage was 100 V and the switching frequency was 10, 20, 30, 40, and 50 kHz, and Figure 16d shows the curves when the input DC voltage was 400 V. As shown in Figure 16a, under all kinds of load conditions, the efficiencies of the all-SiC-based CSI were all higher than those of the all-Si-based CSI. Figure 16b shows the efficiencies of the all-SiC-based CSI were all higher than those of the all-Si-based CSI.

4. Simulation and Experimental Verification

To verify the analysis and proposed models about output characteristics and power loss properties, the simulation and experiments were conducted based on the CSI designed in Section 2. Moreover, the parameters in this simulation and experiment are given in Table 5.

4.1. Simulation Results

The simulations were based on PLECS. Actual physical models downloaded in the official website were used in this simulation. The switching frequency of the all-SiC-based CSI was maintained at 10 kHz. The simulation waveforms are shown in Figure 17 where (a) and (b) show the output waveforms when Udc = 100 V and D = 0.5, respectively; (c) and (d) show the waveforms when Udc = 200 V; and (e) and (f) show the results when D = 0.9 and D = 0.1, respectively. Furthermore, Figure 17f,g present the waveforms when the inverter worked with unbalanced bipolar pulses to verify that the system can work with the reflex charging mode.

4.2. Experiments Results

To validate the circuit analysis in Section 2 and the calculation and simulation results in Section 3, a 100 V all-SiC-based CSI and power efficiency testing platform were built in the lab based on the design. The physical picture of the CSI prototype and the test platform are shown in Figure 18. S1S5 in Figure 18a were C3M0025065D, and the input voltage was supplied by an AMP SP200VDC4000W. The load was non-inductance, the inductance of which was measured to be smaller than 1 μF. The waveforms were collected by a Tektronix MSO46, and the power losses were measured by an HIOKI PW6001.
Figure 19 shows the experimental waveforms of the all-SiC-based CSI when the load resistance was 20 and 50 Ω. As it shows, the experimental waveforms agreed with the simulation results, and they were also consistent with the analysis and formulas previously proposed.
The power loss and efficiencies were measured by a power analyzer, and the efficiencies of the CSI were measured when the load resistance was 10, 20, 50, and 100 Ω. Moreover, the inductor losses that were measured were involved. According to the experimental results, the efficiency versus the output power could be plotted as shown in Figure 20. The curves based on the calculated and simulation results are also given for comparison, where the inductor loss of the calculation and simulation results were thought to be equal to the experimental results.

5. Conclusions

CSIs have a high MTBF due to their capacitorless features and short-circuit tolerance ability. Therefore, CSIs can be a promising technology for EV chargers. However, the waveforms, the output voltage ripple, and the current ripple have not yet been fully analyzed. This study derived the closed-loop equations of the waveforms to comprehensively understand the operating principles and all the waveforms. Furthermore, based on the derived output ripple equation, this paper points out that the output voltage would encounter the voltage overshoot under a light load condition. Based on the derived equations and the over-voltage condition, this article proposes the parameter design procedure. Furthermore, the power efficiency of both the SiC- and Si-based CSIs were derived. The results showed that SiC-based CSIs could achieve an 11.02% peak efficiency increase, 16.52% light load efficiency increase, and 4.02% full load efficiency increase. Therefore, with the wide use and the fast development of SiC MOSFETs, CSIs will become increasingly attractive in EV chargers. Our simulations and experiments validated the correctness of both the equations and the power conversion efficiency.

Author Contributions

Conceptualization, X.Y.; methodology, X.Y. and Z.Z.; software, J.X.; validation, K.L. and C.W.; formal analysis, X.Y.; investigation, K.L.; resources, C.W.; data curation, Z.Z.; writing—original draft preparation, X.Y.; writing—review and editing, K.L. and C.W.; visualization, X.Y.; supervision, K.L. and J.Q.; project administration, K.L.; funding acquisition, K.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by Pioneering Project of Academy for Engineering and Technology of Fudan University (No. gyy2018-002); National Natural Science Foundation of China (No. 51877406).

Data Availability Statement

Not applicable.

Acknowledgments

The authors would like to thank professors and companions in the Research Team of High Power Electronics, Fudan University, for their experimental assistance.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. (a) EV charging system with PV array and grid, and (b) WTG-EV battery charging system. Adapted from [19,20].
Figure 1. (a) EV charging system with PV array and grid, and (b) WTG-EV battery charging system. Adapted from [19,20].
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Figure 2. Typical topologies of inverters: (a) voltage source inverter, and (b) current source inverter.
Figure 2. Typical topologies of inverters: (a) voltage source inverter, and (b) current source inverter.
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Figure 3. Emerging of WBG semiconductor devices in transportation applications. Adapted from [42].
Figure 3. Emerging of WBG semiconductor devices in transportation applications. Adapted from [42].
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Figure 4. The structures of (a) Si MOSFET, (b) SiC MOSFET, and (c) GaN HEMT. [46] Adapted from [46,47].
Figure 4. The structures of (a) Si MOSFET, (b) SiC MOSFET, and (c) GaN HEMT. [46] Adapted from [46,47].
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Figure 5. Topology of the capacitor-free inverter.
Figure 5. Topology of the capacitor-free inverter.
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Figure 6. Sequence diagram of the proposed inverter.
Figure 6. Sequence diagram of the proposed inverter.
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Figure 7. Inverter topology transformation among different stages: (a) the charging stage; (b) positive pulse; (c) negative pulse; (d) deadtime.
Figure 7. Inverter topology transformation among different stages: (a) the charging stage; (b) positive pulse; (c) negative pulse; (d) deadtime.
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Figure 8. The equivalent circuit: (a) the charging state, and (b) the discharging states.
Figure 8. The equivalent circuit: (a) the charging state, and (b) the discharging states.
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Figure 9. The comparison of the inductor current waveforms between simulations, the simplified model, and the precise model: (a) when Rload = 10 Ω, and (b) Rload = 100 Ω.
Figure 9. The comparison of the inductor current waveforms between simulations, the simplified model, and the precise model: (a) when Rload = 10 Ω, and (b) Rload = 100 Ω.
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Figure 10. The error between the simplified and precise model: (a) the error of ΔiL, and (b) the error of IL.
Figure 10. The error between the simplified and precise model: (a) the error of ΔiL, and (b) the error of IL.
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Figure 11. Simulation results: (a) when Rload = 10 Ω, and (b) Rload = 100 Ω.
Figure 11. Simulation results: (a) when Rload = 10 Ω, and (b) Rload = 100 Ω.
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Figure 12. Waveforms when MOSFETs turned on and off: (a) the turning on transient; (b) the turning off transient.
Figure 12. Waveforms when MOSFETs turned on and off: (a) the turning on transient; (b) the turning off transient.
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Figure 13. The communication between the charging and discharging states: (a) the charging state, and (b) the dead-time of the discharging state.
Figure 13. The communication between the charging and discharging states: (a) the charging state, and (b) the dead-time of the discharging state.
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Figure 14. The communication between the P- and N-modes during the discharge state: (a) the P-mode of the discharge state; (b) dead-time of the discharge state, and (c) N-mode of the discharge state.
Figure 14. The communication between the P- and N-modes during the discharge state: (a) the P-mode of the discharge state; (b) dead-time of the discharge state, and (c) N-mode of the discharge state.
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Figure 15. The comparative calculation results of the total power loss of CSI based on Si and SiC power devices: (a) fs = 10 kHz, and (b) fs = 20 kHz.
Figure 15. The comparative calculation results of the total power loss of CSI based on Si and SiC power devices: (a) fs = 10 kHz, and (b) fs = 20 kHz.
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Figure 16. The power efficiency comparison between the SiC- and Si-based CSIs: (a) the power efficiency versus the output power (when fs = 10 kHz, Udc = 100 V); (b) the power efficiency versus the switching frequency (when Rload = 20 Ω, Udc = 100 V); (c) the power efficiency versus the output power (when fs = 10 kHz, Udc = 400V); (d) the power efficiency versus the switching frequency (when Rload = 20 Ω, Udc = 400 V).
Figure 16. The power efficiency comparison between the SiC- and Si-based CSIs: (a) the power efficiency versus the output power (when fs = 10 kHz, Udc = 100 V); (b) the power efficiency versus the switching frequency (when Rload = 20 Ω, Udc = 100 V); (c) the power efficiency versus the output power (when fs = 10 kHz, Udc = 400V); (d) the power efficiency versus the switching frequency (when Rload = 20 Ω, Udc = 400 V).
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Figure 17. Simulation results: (a) Udc = 100 V, Rload = 20 Ω, D = 0.5; (b) Udc = 100 V, Rload = 50 Ω, D = 0.5; (c) Udc = 200 V, Rload = 20 Ω, D = 0.5; (d) Udc = 200 V, Rload = 50 Ω, D = 0.5; (e) Udc = 100V, Rload = 20 Ω, D = 0.9; (f) Udc = 100 V, Rload = 20 Ω, D = 0.1. The reflex charging mode simulations: (g) Udc = 100 V, Rload = 20 Ω, D = 0.5 and (h) Udc = 100 V, Rload = 50 Ω, D = 0.5.
Figure 17. Simulation results: (a) Udc = 100 V, Rload = 20 Ω, D = 0.5; (b) Udc = 100 V, Rload = 50 Ω, D = 0.5; (c) Udc = 200 V, Rload = 20 Ω, D = 0.5; (d) Udc = 200 V, Rload = 50 Ω, D = 0.5; (e) Udc = 100V, Rload = 20 Ω, D = 0.9; (f) Udc = 100 V, Rload = 20 Ω, D = 0.1. The reflex charging mode simulations: (g) Udc = 100 V, Rload = 20 Ω, D = 0.5 and (h) Udc = 100 V, Rload = 50 Ω, D = 0.5.
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Figure 18. Photograph of the CSI and the testing platform: (a) power module of CSI; (b) efficiency testing platform.
Figure 18. Photograph of the CSI and the testing platform: (a) power module of CSI; (b) efficiency testing platform.
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Figure 19. The experimental waveforms of the all-SiC-based CSI: (a) Rload = 20 Ω, and (b) Rload = 50 Ω.
Figure 19. The experimental waveforms of the all-SiC-based CSI: (a) Rload = 20 Ω, and (b) Rload = 50 Ω.
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Figure 20. The experimental efficiency of the SiC-based CSI, the efficiency simulated by PLECS, and calculated results of the SiC- and Si-based CSIs.
Figure 20. The experimental efficiency of the SiC-based CSI, the efficiency simulated by PLECS, and calculated results of the SiC- and Si-based CSIs.
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Table 1. Physical Properties of SiC, GaN, and Si materials.
Table 1. Physical Properties of SiC, GaN, and Si materials.
Electrical PropertySiSiCGaN
Band Gap Energy (eV)1.13.263.4
Electric Field (×106 V/cm)0.333.5
Electron Mobility (×103 cm2/V·s)1.30.90.9–2
Thermal Conductivity (W/cm·K)1.53.71.3
Saturation Drift Velocity (×107 cm/s)1.02.02.5
Table 2. Nomenclature.
Table 2. Nomenclature.
SymbolParameter
LPower Inductor
S1~S5Switches
UDCInput DC Voltage
RloadLoad Impedance
ILAverage Inductor Current
IL.maxInductor Current Peak Value
IL.minInductor Current Valley Value
ΔiLInductor Current Ripple
fsSwitching Frequency of S5
TsInverter Working Period
fswSwitching Frequency of S1–S4
DDuty Cycle of S5
Rds(on)MOSFET On-State Resistance
VFDiode Forward Voltage
pconMOSFET Conduction Loss
pswiMOSFET Switching Loss
EonMOSFET Turn-On Switching Energy
EoffMOSFET Turn-Off Switching Energy
EswiMOSFET Switching Energy
Table 3. The comparison between SiC and Si MOSFETs.
Table 3. The comparison between SiC and Si MOSFETs.
Rds(on) @25 °CSiC MOSFET
(C3M0025065D, Vgs = 15 V)
Si MOSFET
(IPW60R037P7, Vgs = 10V)
Minimum24 (ID = 10A)60 (ID = 0 A)
Typical Value25 (ID = 33.5A)37 (ID = 29.5 A)
Maximum28 (ID = 135A)95 (ID = 135 A)
Table 4. Main electrical characteristics of power devices.
Table 4. Main electrical characteristics of power devices.
ParameterSiC MOSFET
CREE C3M0025065D
Si MOSFET
Infineon IPW60R037P7
Vds (V)650650
d (A)9776
Id(pulse) (A)251280
Rdson (mΩ)2537
Ciss (pF)29805243
Coss (pF)17885
Crss (pF)12156
Qg (nC)108121
trr (ns)51300
Tj,Tstg (°C)−55~150−40~175
Price @ quantity = 1 ($) Note 127.8713.92
Note 1: the prices were obtained from Digikey.com on 21 September 2022.
Table 5. Related parameters in the simulation and experiment.
Table 5. Related parameters in the simulation and experiment.
ParameterValue
L (mH)1.25
Vdc (V)100, 200
Rload (Ω)10, 20, 50, 100
fs (kHz)10
D0.1~0.9
fsw (kHz)100
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Yang, X.; Zhao, Z.; Wang, C.; Xu, J.; Liu, K.; Qiu, J. Analysis and Parameter Design of SiC-Based Current Source Inverter (CSI). World Electr. Veh. J. 2022, 13, 187. https://doi.org/10.3390/wevj13100187

AMA Style

Yang X, Zhao Z, Wang C, Xu J, Liu K, Qiu J. Analysis and Parameter Design of SiC-Based Current Source Inverter (CSI). World Electric Vehicle Journal. 2022; 13(10):187. https://doi.org/10.3390/wevj13100187

Chicago/Turabian Style

Yang, Xingjian, Zhennan Zhao, Cheng Wang, Jianzhi Xu, Kefu Liu, and Jian Qiu. 2022. "Analysis and Parameter Design of SiC-Based Current Source Inverter (CSI)" World Electric Vehicle Journal 13, no. 10: 187. https://doi.org/10.3390/wevj13100187

APA Style

Yang, X., Zhao, Z., Wang, C., Xu, J., Liu, K., & Qiu, J. (2022). Analysis and Parameter Design of SiC-Based Current Source Inverter (CSI). World Electric Vehicle Journal, 13(10), 187. https://doi.org/10.3390/wevj13100187

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