Unified Modeling and Double-Loop Controller Design of Three-Level Boost Converter

Abstract

A new small-signal modeling of a three-level boost (TLB) converter, as well as the design methodology for a double-loop controller, are presented in this paper. Unlike the conventional modeling of the TLB converter, which involves three state variables, the suggested modeling is based on two state variables; hence, simple transfer functions can be obtained. The proposed method is operable at a full duty ratio using unified modeling approaches, regardless of the mode changes. The analysis shows that the transfer functions of the two operation modes are identical. This suggests that the small-signal modeling of the TLB converter is identical to that of a conventional single-level boost converter. Hence, this implies that a linear feedback controller is applicable for all operational ranges. The method to design a double-loop controller using a proportional-integral controller is shown in a stepwise sequence. In addition, a capacitor voltage unbalancing controller is described. Simulations and experimental verifications are conducted to verify the effectiveness of the small-signal analysis and control system design.

1. Introduction

Recently, the use of renewable energy sources such as photovoltaic (PV) and fuel cells have increased steadily, owing to environmental pollution and soaring oil prices. These renewable energy sources must be boosted up to high DC voltages of 350 to 400 [V] for linkage in a grid-connected system, owing to their relatively low DC voltage output of 20 to 50 [V]. A conventional single-level boost converter is typically used for this purpose. However, contrary to the theoretical five- to six-fold boost in voltage, the boost ratio is limited to two to three times, owing to the equivalent series resistance (ESR) component of the inductor. In addition, the voltage and current stress on the switch increase with the power level, thereby increasing the price of the switch or disenabling an appropriate switch to be obtained [1,2,3].

Many converter topologies for high-conversion-ratio and high-voltage applications have been studied to overcome the aforementioned problems [4,5,6,7,8,9]. Among them, the three-level boost (TLB) converter is a topology typically used, owing to its advantages compared with single-level boost converters [10,11], i.e., (i) the reduced inductor size because the equivalent switching frequency applied to the inductor current is doubled; and (ii) the reduced voltage and current stress because the voltage applied by each switch is half the output voltage. The TLB converter circuit is shown in the upper part of Figure 1.

However, the TLB converter topology has several disadvantages, such as the voltage imbalance and a complex control structure. The voltage imbalance occurs in the output capacitors, owing to their mismatched components, such as the duty ratio, capacitance, and ESR [12,13,14,15]. A TLB converter requires a complex controller because two different current paths are formed when the duty ratio is less than or larger than 0.5 [16,17,18]. The controller gains should be switched when the duty ratio crosses the boundary of 0.5. This renders it difficult to design a linear controller that is operable at a full duty ratio. Previous related studies are based on the third-order state-space equation, which complicates the system transfer functions.

Moreover, the TLB converter has a right-half-plane zero and hence a non-minimum phase system, resulting in unstable voltage regulation. Additionally, it can be a significant problem when the TLB converter is operated in the voltage regulation mode, owing to the uncontrolled inductor current, which can damage the switching device if the duty ratio increases. Therefore, a double-loop controller comprising a current controller in the inner loop and a voltage controller in the outer loop should be developed. Most previous studies do not address the problems of TLB converters.

The objective of this paper is to introduce a unified modeling method that is applicable to a full duty ratio. The proposed modeling method assumes a continuous conduction mode (CCM) of the inductor current. The unified state-space equation is derived by considering the output voltage instead of the capacitor voltage as a state variable. The suggested state-space equation becomes a second-order system that is operable at a full duty ratio, regardless of the boundary of 0.5. Therefore, the transfer functions are simple and easy to implement in a linear controller. The method for the voltage regulation system based on a double loop is presented in a stepwise sequence herein.

The proposed controller configuration of the TLB converter is shown in Figure 1. The controller is composed of a double-loop controller and a voltage-balancing controller. The double-loop controller controls the inductor current and the capacitor output voltage simultaneously, whereas the voltage-balancing controller controls the output capacitor voltages to the same voltage level. The sum or subtraction of these two controller outputs is used as the comparator inputs to generate the PWM signal of each switch.

The main section is composed as follows: First, the average state-space equation of each mode is analyzed, and a unified equation is obtained by combining each mode operation. Subsequently, the design of the double-loop controller is presented as a stepwise procedure in the next section. Finally, the simulation and experimental results are presented in the final section to demonstrate the validity of the proposed modeling methods and controller design.

The proposed modeling method is unique and original. The merit of the proposed method is simple and utilizes an easy to design controller using a unified modeling approach.

2. Proposed Unified Modeling of TLB Converter

In actual applications, each switch in the TLB converter is controlled by a combination of the control duty (d) determined by a double-loop controller, and the compensator duty ($\Delta \mathrm{d}$) determined by the voltage unbalancing controller, as shown in Figure 1. Switch S1 is controlled by the control signal, ${\mathrm{V}}_{\mathrm{cont}1}$, which is expressed as (d − $\Delta \mathrm{d}$), whereas S2 is controlled by the control signal, ${\mathrm{V}}_{\mathrm{cont}2}$ which is expressed as (d + $\Delta \mathrm{d}$) [19,20,21,22]. The compensator signal $\Delta \mathrm{d}$ can be considered as zero because its values are extremely small in the steady state. Therefore, the control signals of switches 1 and 2 in each mode can be considered to have the same value and are operated on a phase shift of 180°. The average state-space equation of the TLB converter model can be obtained as follows: Two modes (Modes 1 and 2) exist depending on the duty ratio boundary of 0.5. Because three operation states exist for each mode, the state-space equation of each mode can be obtained by averaging the three-state operation. The ideal operation waveforms of each mode of the TLB converter are shown in Figure 2. Mode 1 (Figure 2a) corresponds to a duty ratio of more than 0.5, whereas Mode 2 (Figure 2b) corresponds to a duty ratio of less than 0.5.

When deriving the state-space equation of the converter, the capacitor voltage and inductor current are generally defined as state variables, i.e., for N status variables, N-th order equations are obtained. Because two capacitors are connected to the output stage in the TLB converter, the state-space equations will be expressed as third-order equations. Complex mathematical calculations are required for small-signal analysis owing to the high-order system. Consequently, a linear controller that is operable at a full duty range becomes difficult to design.

Unlike the conventional method, the following were assumed in this study to analyze the converter operation using only two state variables. The capacitor voltage (${\mathrm{v}}_{\mathrm{c}1},{\mathrm{v}}_{\mathrm{c}2}$) can be expressed as a continuous linear voltage at each operation state.

Therefore, the output voltage (${\mathrm{v}}_{\mathrm{o}}$) can be expressed as the sum of each capacitor voltage in Equation (1):

$${\mathrm{v}}_{\mathrm{o}}\left(\mathrm{t}\right)={\mathrm{v}}_{\mathrm{c}1}\left(\mathrm{t}\right)+{\mathrm{v}}_{\mathrm{c}2}\left(\mathrm{t}\right)$$

(1)

Differentiating the equation above, the Equation (2) can be derived:

$$\frac{{\mathrm{dv}}_{\mathrm{o}}\left(\mathrm{t}\right)}{\mathrm{dt}}=\frac{{\mathrm{dv}}_{\mathrm{c}1}\left(\mathrm{t}\right)}{\mathrm{dt}}+\frac{{\mathrm{dv}}_{\mathrm{c}2}\left(\mathrm{t}\right)}{\mathrm{dt}}$$

(2)

The new state variable ${\mathrm{v}}_{\mathrm{o}}$ is used instead of ${\mathrm{v}}_{\mathrm{c}1},{\mathrm{v}}_{\mathrm{c}2}$ to analyze the TLB operation at each state. Because two state variables are used, the steady-state operating characteristics of the inductor current and output voltage can be easily analyzed; hence, the second-order state-space equation can be derived.

The operating characteristics of the detailed section of each state variable must be analyzed during the switch-on/off time to obtain the average state-space equation. Because the TLB converter operates in the CCM, the switch duty ratio can be easily derived, where the control signal d refers to the duty ratio, as shown in Figure 2.

Mode Analysis

The operation circuit of the TLB converter is shown in Figure 3. The Mode 1 and Mode 2 are defined as according to the duty boundary of 0.5. The Mode 1 is defined when the duty ratio is >0.5. The Mode 2 is defined when the duty ratio is <0.5.

A. 

Mode 1 operation analysis

The operating circuit when the duty ratio is > 0.5 is shown in Figure 3a. In state (a), which corresponds to the time interval [${\mathrm{t}}_1-{\mathrm{t}}_2,{\mathrm{t}}_3-{\mathrm{t}}_4$] of Figure 2a, ${\mathrm{S}}_1{\mathrm{and}\mathrm{S}}_2$ are turned on, ${\mathrm{D}}_1{\mathrm{and}\mathrm{D}}_2$ are turned off, and the conducting time is [2d-1]$T_s$. The inductor is charged with energy by the input voltage, and capacitors 1 and 2 supply the energy charged in the previous step to the load. In states (b) and (c), which correspond to time interval [${\mathrm{t}}_2-{\mathrm{t}}_3,{\mathrm{t}}_4-{\mathrm{t}}_5$], (b) [${\mathrm{S}}_1,{\mathrm{D}}_2$- charging $C_2$] and (c) [${\mathrm{S}}_2,{\mathrm{D}}_1$- charging $C_1$] are turned on in order, and the other switches and diodes are turned off. While one capacitor is charged for each step, the other capacitors transfer energy to the load, and the inductor charged in the previous step supplies energy to the load with the power; therefore, the conducting time of each becomes [1−d]$T_s$. Through the sum of each differential equation of ${\mathrm{v}}_{\mathrm{c}1},{\mathrm{v}}_{\mathrm{c}2}$ and Equation (2), the state-space equation of each step for $v_o$ can be derived. Therefore, the inductor current and output voltage equations for each state are expressed as Equations (3)–(5):

State (a): [S1, 2 On, D 1, 2 Off]; conducting time: (2d−1)$T_s$

$$\frac{d{i}_L}{dt}=\frac{v_{in}}{L}-\frac{r_L{i}_L}{L}, \frac{d{v}_o}{dt}=-\frac{1}{R{C}_t}{v}_o$$

(3)

State (b): [S1, D2 On, S2, D1 Off]; conducting time: (1−d)$T_s$

$$\frac{d{i}_L}{dt}=\frac{v_{in}}{L}-\frac{v_{c2}}{L}-\frac{r_L{i}_L}{L},\frac{d{v}_o}{dt}=\frac{1}{C_2}{i}_L-\frac{1}{R{C}_t}{v}_o$$

(4)

State (c): [S2, D2 On, S2, D1 Off]; conducting time: (1−d)$T_s$

$$\frac{d{i}_L}{dt}=\frac{v_{in}}{L}-\frac{v_{c1}}{L}-\frac{r_L{i}_L}{L}, \frac{d{v}_o}{dt}=\frac{1}{C_1}{i}_L-\frac{1}{R{C}_t}{v}_o$$

(5)

where $C_t$ is expressed as $\frac{C_1{C}_2}{{\mathrm{C}}_1+{\mathrm{C}}_2}$.

B. 

Mode 2 system analysis

The operating circuit when the duty ratio is <0.5 is shown in Figure 3b. In states (e) and [${\mathrm{t}}_6-{\mathrm{t}}_7,{\mathrm{t}}_8-{\mathrm{t}}_9$], ${\mathrm{S}}_1{\mathrm{and}\mathrm{S}}_2$ are both turned off, ${\mathrm{D}}_1{\mathrm{and}\mathrm{D}}_2$ are turned on, and the conducting time is [1−2d]$T_s$. ${\mathrm{C}}_1{\mathrm{C}}_2$ are charged with energy, and the inductor charged in the previous step supplies energy to the load with the power. In states (f) and [${\mathrm{t}}_7-{\mathrm{t}}_8,{\mathrm{t}}_9-{\mathrm{t}}_{10}$], (e) [${\mathrm{S}}_1,{\mathrm{D}}_2$- charging $C_2$] and (f) [${\mathrm{S}}_2,{\mathrm{D}}_1$- charging $C_1$] are turned on in order, and other switches and diodes are turned off. While one capacitor is charged for each step, the other capacitor transfers energy to the load. The inductor is charged with energy by the power source, and the conducting time for each becomes [d]$T_s$. The differential equations of the inductor current and output voltage for each stage are expressed as Equations (6)–(8):

State (e): [S1, 2 Off, D 1, 2 On]; conducting time: (1−2d)$T_s$

$$\frac{d{i}_L}{dt}=\frac{v_{in}}{L}-\frac{1}{L}{v}_o-\frac{r_L{i}_L}{L},\frac{d{v}_o}{dt}=\frac{1}{C_t}{i}_L-\frac{1}{R{C}_t}{v}_o$$

(6)

State (f): [S1, D2 On, S2, D1 Off]; conducting time: (d)$T_s$

$$\frac{d{i}_L}{dt}=\frac{v_{in}}{L}-\frac{1}{L}{v}_{c1}-\frac{r_L{i}_L}{L},\frac{d{v}_o}{dt}=\frac{1}{C_1}{i}_L-\frac{1}{R{C}_t}{v}_o$$

(7)

State (f): [S2, D2 On, S2, D1 Off]; conducting time: (d)$T_s$

$$\frac{d{i}_L}{dt}=\frac{v_{in}}{L}-\frac{1}{L}{v}_{c2}-\frac{r_L{i}_L}{L},\frac{d{v}_o}{dt}=\frac{1}{C_2}{i}_L-\frac{1}{R{C}_t}{v}_o$$

(8)

C. 

Unified small-signal modeling

Even if the output voltage equations contain capacitor voltages $v_{c1 }\mathrm{and}{v}_{c2}$, they can be expressed with $C_t$ and the state variables $v_o$ through the state-space averaging method. The state averaging equation of Mode 1 can be obtained by multiplying the state equation of each state by their conducting time, and then averaging over one sampling period Ts. Summarizing Equations (3)–(5), the state averaging equation of Mode 1 within one switching period $T_s$ is expressed as Equation (9):

$$\left[\begin{array}{c}\frac{d{i}_L}{dt}\\ \frac{d{v}_o}{dt}\end{array}\right]=\left[\begin{array}{cc}-\frac{r_L}{L}& -\frac{1}{L}\left(1-d\left(t\right)\right)\\ \frac{1}{C_t}\left(1-d\left(t\right)\right)& -\frac{1}{R{C}_t}\end{array}\right]\left[\begin{array}{c}{i}_{L\left(t\right)}\\ v_o\left(t\right)\end{array}\right]+\left[\begin{array}{c}\frac{1}{L}\\ 0\end{array}\right]v_{in}$$

(9)

The state averaging equation of Mode 2 can be obtained using Equations (6)–(8). It is clear that the same result as that obtained using Equation (9) can be achieved. Even though Modes 1 and 2 are formed by the duty change, their state-space averaging equations are identical. Because identical state-space averaging equations are derived for each mode, mode switching need not be considered when designing the controller. Hence, the same controller gain can be used in all operation domains regardless of the duty change. However, because it is a nonlinear model in which the control input (duty) d is included in the system matrix, the small-signal model must be obtained for linearization at the operating point. For the analysis of small-signal responses, each input voltage, output voltage, inductor current, and duty ratio can be divided by the DC operating point and AC perturbation to obtain the Equation (10):

$$d=D+\widehat{d},i_L=I_L+{\widehat{i}}_L,v_o=V_o+{\widehat{v}}_o,v_{in}=V_{in}+{\widehat{v}}_{in}$$

(10)

By substituting Equation (10) into Equation (9), and then linearizing by disregarding the higher-order nonlinear term, followed by removing the DC term, the small-signal model can be expressed as a 2 × 2 matrix, as shown in Equation (11):

$$\left[\begin{array}{c}\frac{d\left({\widehat{i}}_L\right)}{dt}\\ \frac{d\left({\widehat{v}}_o\right)}{dt}\end{array}\right]=\left[\begin{array}{cc}-\frac{r_L}{L}& -\frac{1}{L}\left(1-D\right)\\ \frac{1}{C_t}\left(1-D\right)& -\frac{1}{R{C}_t}\end{array}\right]\left[\begin{array}{c}{\widehat{i}}_L\left(t\right)\\ {\widehat{v}}_o\left(t\right)\end{array}\right]+\left[\begin{array}{c}\frac{V_o}{L}\\ -\frac{I_L}{C_t}\end{array}\right]\widehat{d}\left(t\right)$$

(11)

The steady-state values of $V_o$ and $I_L$ are expressed as Equation (12):

$$I_L=\frac{V_{in}}{r_L+R{\left(1-D\right)}^2},V_o=\frac{V_{in}}{\left(1-D\right)+\frac{r_L}{R{\left(1-D\right)}^2}}$$

(12)

It is evident that the small-signal model of the TLB converter is exactly the same as that of the conventional single-level boost converter, except that the output capacitances, C₁ and C₂, are replaced by the equivalent capacitance, C_t. The operation of the TLB converter is complicated, owing to two switch operations; however, the mathematical representation is expressed by the same equation as that of a conventional boost converter. It can be assumed that the TLB converter is equivalent to two boost converters connected in a parallel-input and series-output configuration, and that they operate in a phase-shift mode. Therefore, the mathematical expressions involved are the same as those presented in Equations (11) and (12).

Because Equation (11) is a representation of the linear differential equation, it can be expressed as $\widehat{\dot{x}}=\mathrm{A}\widehat{\mathrm{x}}+\mathrm{Bu}$ state-space equation. The control-to-current, control-to-voltage, and voltage-to-current transfer functions can be derived by applying Laplace transformations, as expressed in Equations (13)–(15):

Control-to-current transfer function: $G_1\left(s\right)$

$$\frac{{\widehat{i}}_L\left(s\right)}{\widehat{d}\left(s\right)}=\frac{\frac{V_o}{L}\left(s+\frac{1}{R{C}_t}+\frac{\left(1-D\right)I_L}{V_o{C}_t}\right)}{s^2+\left(\frac{r_L}{L}+\frac{1}{R{C}_t}\right)s+\frac{r_L}{RL{C}_t}+\frac{{\left(1-D\right)}^2}{L{C}_t}}$$

(13)

Control-to-voltage transfer function: $G_2\left(s\right)$

$$\frac{{\widehat{v}}_o\left(s\right)}{\widehat{d}\left(s\right)}=\frac{\frac{I_L}{C_t}\left(-s+\frac{\left(1-D\right)}{L{I}_L}{V}_o-\frac{r_L}{L}\right)}{s^2+\left(\frac{r_L}{L}+\frac{1}{R{C}_t}\right)s+\frac{r_L}{RL{C}_t}+\frac{{\left(1-D\right)}^2}{L{C}_t}}$$

(14)

Current-to-voltage transfer function: $G_3\left(s\right)$

$$\frac{{\widehat{v}}_o\left(s\right)}{{\widehat{i}}_L\left(s\right)}=\frac{\frac{I_L}{C_t}\left(-s+\frac{\left(1-D\right)}{L{I}_L}{V}_o-\frac{r_L}{L}\right)}{\frac{V_o}{L}\left(s+\frac{1}{R{C}_t}+\frac{\left(1-D\right)I_L}{V_o{C}_t}\right)}$$

(15)

3. Controller Design

The proposed TLB controller comprises a double-loop controller, balancing controller, and PWM generator, as shown in Figure 1. The double-loop controller controls the output voltage and inductor current using a proportional-integral (PI) controller, whereas the balancing controller controls the voltage difference between the capacitors to zero through a proportional (P) controller. Each control signal determined by the two controllers generates PWM1 and PWM2 through the comparator. The PWM signals with a phase difference of 180° to activate each switch to prevent an imbalance in the capacitor voltage and to control the output voltage. The principle of PWM generation is shown in Figure 4. The PWMs of Modes 1 and 2 are shown in Figure 4a and Figure 4b, respectively.

A. 

Double-loop controller design

The double-loop controller block diagram of the TLB converter is shown in Figure 5. The output of the voltage compensator serves as the current reference, and the output of the current compensator becomes the control duty d. Block $G_1\left(s\right)$ is the transfer function of the inductor current-to-input duty; $G_3\left(s\right)$ is the transfer function of the output voltage-to-inductor current; $G_{cv}\left(s\right)$ and $G_{ci}\left(s\right)$ are the voltage and current compensators, respectively; and $H_1$ and $H_2$ are the sensor gains, which were set to one in the design. The current control loop ($T_i$) and voltage control loop ($T_v$) can be expressed as shown in Equations (16) and (17), respectively. To calculate $T_v$, it is assumed that the magnitude of $T_i$ is one because $G_{ci}\ast G_1$is much larger than one:

$$T_i=\frac{I_L\left(s\right)}{I_{L\_ref}\left(s\right)}=\frac{G_{ci}\ast G_1}{1+G_{ci}\ast G_1\ast H_2}$$

(16)

$$T_v=\frac{V_o\left(s\right)}{V_{o\_ref}\left(s\right)}=\frac{G_{cv}\ast G_3}{1+G_{cv}\ast G_3\ast H_1}$$

(17)

Each controller of the double loop uses a PI compensator with a switching frequency of 20 [kHz]. The design specifications of each compensator are listed in

Table 1. The specification of controller.

Symbol	Quantity	Value
Voltage compensator
${\mathsf{\omega }}_{\mathrm{c}}$	Cutoff bandwidth	10 [rad/s]
PM	phase margin	90 [deg]
Current compensator
${\mathsf{\omega }}_{\mathrm{c}}$	Cutoff bandwidth	3000 [rad/s]
PM	phase margin	60 [deg]

, where ${\mathsf{\omega }}_c$ is the cutoff bandwidth and PM is the phase margin. The phase margin was selected to be at least 45° considering the controller stability, and the cutoff bandwidth was selected as 1/10 of the switching frequency. Accordingly, the phase margin was set to 60° by the current controller to achieve fast response characteristics, whereas the voltage controller was set to 90° to achieve a zero overshoot. Because the switching frequency was 20 [kHz], the cutoff bandwidth for the current controller was set to 3000 [rad/s], which is less than 2 [kHz]. The cutoff bandwidth of each controller should be selected appropriately because the inner and outer loops are closely coupled when designing a double-loop controller.

Generally, the maximum cutoff bandwidth of the outer loop is set to 1/10 of the inner loop cutoff bandwidth to avoid interference between the controllers, and the interference decreases as the bandwidth separation increases. Theoretically, the bandwidth of the voltage controller is stable below 300 [rad/s], but the bandwidth separation between the controllers should be designed larger in consideration of the switching noise, unmodeled parasite elements, and parameter errors, which are not considered in the actual system. Therefore, in this study, the voltage controller bandwidth was set to less than 1/50 of the current controller’s bandwidth to guarantee a stable operation.

Based on the design goal and Equation (16), each PI controller was designed based on the following procedure: (i) the pole was added to the origin (0 Hz) to remove the steady-state error; (ii) the zero pole was added for a secure phase margin at the resonance frequency; (iii) the crossover frequency was placed at a point ten times lower than the resonant frequency to guarantee a stable operation; (iv) the DC gain was determined. The circuit parameters are listed in

Table 2. Circuit Parameter for the simulation.

Parameter	Quantity	Unit
$V_o$	Output voltage	217 [V]
$V_{in}$	Input voltage	100 [V]
$r_L$	Inductance ESR	0.3 [$\mathsf{\Omega }$]
$L$	Inductance	1.0 [mH]
$C_1$	Capacitance1	1200 [$\mathsf{\mu }$F]
$C_2$	Capacitance2	1200 [$\mathsf{\mu }$F]
$f_{sw}$	Switching frequency	20 [kHz]

.

It is difficult to determine the appropriate gains of both compensators to satisfy the design specifications. SISOTOOL in MATLAB can be used to easily design compensator gains in a double-loop system. Furthermore, SISOTOOL can simultaneously display the root locus graph in the time domain and the open-loop Bode plot in the frequency domain for gains ${\mathrm{G}}_{\mathrm{cv}}\left(\mathrm{s}\right)$ and ${\mathrm{G}}_{\mathrm{ci}}\left(\mathrm{s}\right)$ in a double-loop system. The compensators for satisfying the design specification are expressed in Equation (18).

$${\mathrm{G}}_{\mathrm{cv}}\left(\mathrm{s}\right)=0.014191\times \frac{\left(\mathrm{s}+31.1\right)}{\mathrm{s}}, {\mathrm{G}}_{\mathrm{ci}}\left(\mathrm{s}\right)=0.011021\times \frac{\left(\mathrm{s}+2134.5\right)}{\mathrm{s}}$$

(18)

The frequency response characteristics of each transfer function before and after compensation are shown in Figure 6. The frequency response of the transfer function of the inductor current to the control duty in an open loop is shown in Figure 6a. As shown, the current controller achieved a sufficient gain margin at 3000 [rad/s] and a phase margin of 60.2°, thereby satisfying the design goal. The frequency response of the output voltage to the inductor current is shown in Figure 6b.

As shown, a sufficient gain margin at 10 [rad/s] and a phase margin of 91.1° were achieved, thereby satisfying the design goal. The closed-loop response of the double-loop system, which is the step response of the output-to-reference voltage using MATLAB, is shown in Figure 7. As shown, the rising time was 0.22 [s], and a steady value was reached at 0.39 [s] and subsequently stabilized.

B. 

Capacitor-voltage-balancing controller design

Theoretically, the capacitor voltages $v_{c1}$ and $v_{c2}$ of the TLB converter are balanced. However, $v_{c1}$ and $v_{c2}$ are not exactly balanced in the actual applications owing to their mismatched components, such as the ESR of the capacitor or the duty difference. Therefore, capacitor-voltage-balancing controllers are essential. The average capacitor currents for one sampling period $T_S$ in Mode 1 are denoted as $\langle I_{C1}{\rangle }_{T_S}$ and $\langle I_{C2}{\rangle }_{T_S}$, which are expressed in Equations (19)–(20) based on Figure 1:

$$\langle I_{C1}{\rangle }_{T_S}=-\frac{v_{c1}+v_{c2}}{R}+i_L\left(1-v_{cont1}\right)$$

(19)

$$\langle I_{C2}{\rangle }_{T_S}=-\frac{v_{c1}+v_{c2}}{R}+i_L\left(1-v_{cont2}\right)$$

(20)

Because the output of the voltage-balancing controller is $\Delta \mathrm{d}$, the difference between the two average capacitor currents can be obtained from Equations (19) and (20) as follows in Equation (21):

$$\langle I_{C1}{\rangle }_{T_S}-\langle I_{C2}{\rangle }_{T_S}=i_L\left(v_{cont1}-v_{cont2}\right)=2\Delta \mathrm{d}{i}_L$$

(21)

Each capacitor $C_1$ and $C_2$ can be expressed as C because its values are the same. Therefore, the transfer function for balancing the control-to-unbalancing voltage (${\mathrm{G}}_{\Delta C}$) is expressed as Equation (22):

$${\mathrm{G}}_{\Delta C}=\frac{\Delta v_c\left(s\right)}{\Delta \mathrm{d}\left(s\right)}=\frac{2}{sC}{I}_L$$

(22)

where $\Delta v_c\left(s\right)=v_{c1}-v_{c2}$.

Similarly, the ${\mathrm{G}}_{\Delta C}$ of Mode 2 can yield the same result as using Equation (22). The block diagram of the voltage-balancing controller is shown in Figure 8a, where a P controller is used. The closed-loop transfer function of $\Delta v_c\left(s\right)$ can be expressed as Equation (23):

$$\frac{\Delta v_c\left(s\right)}{\Delta v_{c_{ref}}\left(s\right)}=\frac{\frac{2k_p}{\mathrm{C}}{I}_L}{s+\frac{2k_p}{\mathrm{C}}{I}_L}$$

(23)

where $\Delta v_{c_{ref}}\left(s\right)=0$.

Because Equation (23) describes a first-order system, the steady-state error is zero and overshoot does not occur. Therefore, the P controller can be used to balance the capacitor voltage. The design requirement is given by the cut-off bandwidth and set to ${\mathsf{\omega }}_{\mathrm{c}}=500$ [rad/s]. The designed gain is $K_{\mathrm{p}}=0.05$ by the bode diagram. The step response of the balancing controller is given in Figure 8b. It can be seen that the steady-state error is zero and there is no overshoot.

4. Simulation Results

The suggested design for the TLB controllers began with state-space averaging models. These mathematical models were converted into frequency-domain expressions and transfer functions. The controller gains were selected based on requirements, such as the cutoff frequency and phase margin. Subsequently, the frequency response was shown using the MATLAB software. The design was based on mathematical analysis instead of real hardware. Therefore, it should be verified experimentally to validate the frequency response in real circuits.

Experiments involving hardware are challenging because highly complicated experimental systems are required, e.g., a network analyzer, a high-frequency signal generator, and high accuracy measurement systems. Additionally, the correct response data are difficult to obtain because of switching noise. Hence, it is preferable to rely on circuit simulation rather than experiments to validate the design results.

Many circuit-based simulation programs are available. Among them, Powersim is a typically used software in power electronics that can perform frequency analysis from circuit drawings. In this study, the AC sweep library from Powersim was applied as the perturbation input to obtain the open-loop gain. Subsequently, the double-loop controller gains of Equation (18) were applied in the simulation. The simulation parameters used were the same as those listed in Table 2. The simulation results of MATLAB and Powersim are shown in Figure 9 and Figure 10, respectively. The open-loop gains of the voltage and current loops are shown in Figure 9 and Figure 10, respectively. Because the unit used in Powersim is “Hz,” the unit from MATLAB was converted from “rad/s” to “Hz” to match the scales. the dot marker in the Powersim plot corresponds to the frequency at which the simulation was performed.

The simulation frequency of the open-loop voltage is presented from 1 to 100 [Hz] to clearly show the response around the cutoff frequency (see Figure 9). Using MATLAB, the cutoff frequency was 1.59 [Hz], which corresponds to 10 [rad/s], and the phase margin was 90° with a 49.5 [dB] of gain margin, as shown in Figure 9a. The same cutoff frequency was obtained in Powersim with a phase margin of 90° and a gain margin of 49 [dB], as shown in Figure 9b.

A comparison of the open-loop current results is shown in Figure 10. Using MATLAB, the cutoff frequency was 478 [Hz], which corresponds to 3000 [rad/s], and the phase margin was 60° with an infinite gain margin, as shown in Figure 10a. The same cutoff frequency was obtained in Powersim with a phase margin of 60° and an infinite gain margin, as shown in Figure 10b. Hence, it is clear that the design method is effective and applicable to real circuits. The step response of the output voltage is shown in Figure 11 to verify the performance of the controller. The command was stepped up from 150 to 217 [V] and stepped down from 217 to 150 [V] to verify the controller performance when the duty crossed the mode boundary. The waveforms of the output voltage and inductor current are shown in Figure 11 using Powersim.

The step-up response from 150 to 217 [V] is shown in Figure 11a, whereas the step-down response from 217 to 150 [V] is shown in Figure 11b.

The waveforms of the output voltage and inductor current reached the steady-state value rapidly without any overshoot. It was observed that the step response of the output voltage using MATLAB matched exactly with the Powersim result by comparing Figure 7 and Figure 11. As shown, the settling time and rising times were completely matched, thereby validating the designed controller in the time domain.

The steady-state wave forms of the inductor current, output voltage, capacitor voltage, and PWM signal are plotted in Figure 12. The steady-state waveforms at 217 and 150 [V] are shown in Figure 12a and 12b, respectively. Both capacitor voltages indicated one-half the average value of the output voltage V_o, even though V_con2 was imposed with a slight phase delay, as shown in Figure 12.

The voltage difference between v_c1 and v_c2 approached zero in the steady state. In addition, the inductor current had an error range within 5%, whereas the output voltage had an error range within 1% when the PWM operated at each phase difference of 180°.

The performance of the unbalancing controller is verified through PSIM simulation. The capacitance of each capacitor is set to have different values such as $C_1=2400$ and $C_2=1800 \left[uF\right]$. The simulation results are shown in Figure 13. The voltage unbalance that happened without the balancing controller as shown in Figure 13a. The balanced voltage is achieved with the balancing controller, as shown in Figure 13b.

5. Experimental Validation

Experiments were conducted using a hardware setup, as shown in Figure 14, to validate the proposed modeling and controller design method. A 320F28069 DSP was used as a controller, and the experimental hardware was built using the circuit parameters shown in Table 2. A DC power supply was used for the input voltage, and measurements were performed using the same conditions as in the simulation, i.e., from 150 to 217 [V] and from 217 to 150 [V].

The experimental results for the voltage-balancing controller at 150 and 217 [V] are plotted in Figure 15 and Figure 16, respectively. Both capacitor voltages indicated one-half the output voltage V_o even though $V_{cont2}$ was imposed with a slight phase delay, as shown in Figure 13. The voltage difference between ${\mathrm{v}}_{\mathrm{c}1}$ and ${\mathrm{v}}_{\mathrm{c}2}$ approached zero at the steady state. The performance of the balancing controller can be proven from these figures.

The experimental results of the step response are shown in Figure 17 and Figure 18. The step-up waveform from 150 to 217 [V] is shown in Figure 17, whereas the step-down waveform from 217 to 150 [V] is shown in Figure 18. As shown in the figures, the steady-state values of the output voltage transition from 217 and 150 [V] were attained within 0.4 [s] without an overshoot, even during the mode change period. These results were almost identical to the simulation results from Powersim and MATLAB. In addition, the current waveform reached the steady state value rapidly without an overshoot, which is consistent with the results from Powersim. Hence, the controller design based on the proposed modeling method is validated.

6. Discussion

The mathematical expression of the three-level boost converter using thr unified modeling approach has been presented in the main section of the paper. In addition, the way of designing the double loop controller is shown in a step-by-step sequence.

The frequency responses of the converter using the real circuit are analyzed to prove the validity of the suggested mathematical model approaches. Since both responses are exactly the same, the proposed method is effective and definite. This process is necessary because there have not been any references or papers for the unified modeling method which can be operable for the full duty range. Therefore, it is required for the verification process of the proposed method.

The time responses for the full duty variations are obtained through computer simulations and verified from the experiments. It can be seen that the actual responses are exactly matched to the design specifications. The controller design methodology has been verified from the time response of the simulation and experimental results.

The whole design procedures and the verification methods are presented and proved to be effective in real circuits. Since the three-level boost converter is commonly used in the power converters, such as solar PCS (Power Conditioning System) and ESS (Energy Storage System), the suggested design method can be very effective in the renewable energy conversion systems.

7. Conclusions

A new modeling method for a TLB converter based on a unified modeling approach was presented herein. The state-space equations were derived from only two state variables rather than three state variables. Furthermore, the mathematical expansions proved that the unified model can be obtained regardless of the mode changes. The proposed modeling method is based on the concept that the output voltage, instead of two capacitor voltages, can be used as a new state variable. This suggests that the small-signal modeling of the TLB converter is exactly the same as that of the conventional single-level boost converter, except for the capacitance parameter. Therefore, the linear controller can be used for the double-loop configuration. A method for designing a double-loop controller based on the frequency design method with fast response characteristics without overshoot was proposed using the suggested modeling equation. The simulation and experimental results were consistent with the theoretical predictions, thereby validating the proposed modeling method and the double-loop controller designed using the suggested method. The proposed modeling and controller design methods are unique and practical; hence, they are applicable to practical systems such as solar inverters and energy-storage systems.

The parallel connection of the TLB converter can be found in the high-power applications. It is quite challenging work to design parallel-connected converters due to the circulation current of parallel converters. It is a further research topic for the parallel connected TLB converters using the unified approach.