1. Introduction
During the last decades, the microelectronics industry has been exploring a technological diversification, which allows the possibility of developing specific electronic systems for nontraditional areas, like medical and health care systems, environmental, biological applications, detection systems for chemical or physical signals, etc. Further development of novel materials and fabrication methodologies is required to produce new devices with the desired features. Some of these applications can require substrates, like flexible, transparent, organic, paper, among others [
1]. In this context, film deposition from precursor solutions appears to be a potential tool for novel materials and electronic device fabrication techniques [
2,
3].
On another hand, Schottky barrier diodes (SBD), based on nanostructured oxide semiconductor films, appear to be potential candidates for different kinds of sensor devices. Furthermore, the possibility of using solution-processing techniques for diode manufacture allows the reduction of the fabrication temperatures to levels which make the full fabrication process compatible with flexible substrates. In recent years, the development of SBD based on solution-processes has become an interesting technological approach for manufacturing flexible and paper-based electronic devices, including a variety of sensor devices.
Up to now, for the analysis of low-cost and low temperature processed SBD, (LTP-SBD), thermionic emission was considered the main conduction mechanism. The diode parameters, such as barrier height (ϕb), ideality factor (η), and series resistance (RS), are obtained using parameter extraction methodologies developed for high quality, crystalline semiconductor-based SBD, processed at high temperatures.
In LTP-SBD, three main features have been observed in diode parameters, extracted using above mentioned methodologies [
4,
5,
6,
7,
8,
9,
10,
11]: (i) the rectification ratio (
RR =
ION/
IOFF) is, usually, very small (one or two orders of magnitude); (ii) large ideality factor values (
η > 2), and (iii) relatively large series resistances (
RS). Regarding
η, values close to 2, even greater than 7, can be found in the literature [
4,
5,
6,
7,
8,
9,
10,
11]. For SBD processed using high vacuum techniques, like sputtering deposition at room temperature, values of
η near to 1 have been found [
12,
13].
Trying to understand the differences observed in the extracted diode parameters for LTP-SBD, with respect to those obtained for standard SBD, different explanations have been considered, among which are the impact of
RS, the presence of different conduction mechanisms, barrier height inhomogeneities, and interfacial states [
5,
6,
7]. However, the physical reasons behind the wide range of values obtained for the LTP-SBD ideality factor are not clear, nor are the strong differences in parameter values observed in different film deposition methods.
In addition to the possible causes of this observed behavior, low temperature processing could jeopardize the semiconductor film quality, since it is well known that noncrystalline materials present a density of localized states (DOS) within the energy gap, which can strongly affect the behavior of devices based on these materials.
In this work, the behavior of the I–V characteristic of solution processed, ZnO LTP-SBD is studied. Main diode parameters, obtained by four extraction methods used for standard SBD fabricated at higher temperatures, are analyzed to evaluate the possibility of using them to characterize LTP-SBD. Additionally, simulated I–V characteristic of SBD, considering the presence of a density of localized states inside the semiconductor gap, were obtained to analyze the origin of the main characteristics of diodes performance.
4. Results and Discussion
Figure 1 shows the
JD–
VD characteristics of measured devices with different
L. As can be seen, the rectification ratio
RR, obtained as diode current at +1 V divided by the current at −1 V, is about one order of magnitude. Contrarily, for crystalline devices,
RR can be greater than six orders of magnitude. Moreover, the reverse current density shows a significant dependence on the applied voltage. On the other hand, as expected, the forward current density has similar values for all devices at low applied voltage. Beyond 0.5 V,
JD starts to increase as the device area is reduced.
Diode parameter extractions, using the different strategies explained in
Section 3, were performed with the aim of analysing the diode performance, as well as the unforeseen current density increment, to a deeper level.
Table 2 summarizes the extracted values for
ϕb,
η and
RS. The overall results agree with the main features previously observed for LTP-SBD [
4,
5,
6,
7,
8,
9,
10,
11].
Figure 2 shows the comparison of the extracted barrier height obtained with the different methods. As can be seen, for all devices the extracted values of
ϕb using the ideal method are about 10% smaller than using the other methods. The Cheung and the F–R methods exhibit close values of
ϕb, while Norde´s method shows a small difference for large devices, which increases as
L is reduced. Nevertheless, the different methods used allow the determination of the barrier height with a relatively small variation of ±10 %. It is worth noting that the Norde and Cheung methods allow the extraction of the barrier height after the ideality factor; hence, a reliable
η extraction is of main importance. On the contrary, the F–R method allows the determination of the barrier height in an independent form.
As can be seen from
Table 2, the ideality factor presents abnormally large values when the ideal extraction is used. This occurs because the impact on
RS is neglected. The other methods include the series resistance and, thus, the extracted values of
η are reduced.
Figure 3 shows the comparison of the
η extracted values using the methods which include the series resistance on the extraction methodology. In all cases, the resulting
η values are greater than 2 and a significant dispersion is observed. Additionally, Norde and F–R methods show an opposite trend. In the Norde case, the value of
η increases as the device area is reduced, while with the F–R method, it reduces. However, there is not a physical reason that could support the variation of the diode ideality factor with the device area.
Therefore, the standard SBD extraction methods allow the determination of the barrier height into a reasonable deviation. For the ideality factor, however, a significant dispersion and even different trends when varying the diode area are obtained, depending on the method considered. However, the behavior shown in
Figure 1 suggests that a single set of parameters is required to define the diode performance up to ~0.4 V, and after that bias, the increment on the current density with the area must be explained.
Figure 4 shows the extracted
RS vs. the inverse of the diode area. In the inset, the
RS vs.
L plot is shown. In general,
RS has a linear behavior in respect to 1/
A. As a first approach, the device can be considered a rectangular semiconductor with electrodes on the top and at the bottom, which produce the observed dependence with the diode area. This fact also suggests a constant value of the resistance normalized with diode area (
A.
RS).
The above-mentioned analysis implies an issue on the proper determination of the diode parameters utilizing the traditional methodologies, since a single set of parameters cannot explain the experimental diode current. Because of the observed results, a deeper analysis on the LTP-SBD behavior must be performed, as well as the development of specific extraction methodologies for this kind of devices.
To further analyze the behavior of LTP-SBDs, finite-element numerical simulations were performed.
Figure 5a,b show the
I–
V characteristic for devices simulated in ATLAS, for two doping concentrations and the different DOS parameters shown in
Table 1. For comparison, defect-free simulated devices are included. As can be seen, the reverse current exhibits a negligible impact with the presence of DOS. Contrarily, the tail state’s presence produces an important reduction in the forward diode current. This can be explained due to the electron-trapping on the defects, which implies a reduction in the overall free carriers in the conduction band and, hence, of the device current. The impact, however, is more important for devices with relatively low free carrier concentration, which implies a highly resistive film. In such cases,
ION is reduced by several orders of magnitude, which explains the typical rectification ratio experimentally achieved [
4,
5,
6,
7,
8,
9,
10,
11].
Figure 6 shows the comparison of the
RR vs. the defect densities for two values of
NB. As can be observed, LTP-SBDs with low quality semiconductor films (i.e., high resistivity and high defects densities) exhibit a strong
RR reduction, until around one order of magnitude, which are similar to what is observed in experimental devices [
4,
5,
6,
7,
8,
9,
10,
11]. On the other hand, when the layer has a moderate or high conductivity (which implies a better film quality), the impact of the defects is reduced and the
RR value is only slightly reduced, remaining several orders of magnitude as experimentally observed for high vacuum processing [
12,
13], even for defect densities in the range of 10
20 cm
−3eV
−1. It can be expected that a further increase of the defect densities will produce a stronger
RR reduction.
Figure 7 shows the simulated electron concentration (
ne) inside the semiconductor film for both
NB values vs. forward applied voltage. As can be seen, the impact of the film qualities on
ne is confirmed. Moreover, it is observed that, for high resistivity films,
ne is modulated by the forward bias. Contrarily, for low resistivity films,
ne is constant along most of the film thickness.
As was mentioned above, the diode can be considered as a rectangular semiconductor die. Therefore, the resistance due to a differential film thickness is defined as:
where
μ is the electron mobility and
A is the device area.
The total resistance, due to the semiconductor film, can be calculated integrating (16) along the film thickness (
t):
Considering the electron distribution shown in
Figure 7, it is possible to determine the series resistance contribution caused by the film.
Figure 8 shows the calculated resistance vs. the bias applied for device with
NB = 5 × 10
16 cm
−3 and defect densities of 10
20 cm
−3 eV
−1. In the inset, the calculated resistance for a device with
NB = 5 × 10
18 cm
−3 is also shown. For the case of low resistivity semiconductor film, the resistance shows an abrupt reduction at small forward bias, from about 1 MΩ to few kΩ. When bias is increased above 1 V,
RS becomes almost constant. On the contrary, for a higher resistivity material with a relatively high defect density, the resistance exhibits extremely high values. At the same time, an important dependence on the applied forward voltage is observed. According to
Figure 8,
RS exhibits an exponential dependence on
VD, which, as a first approach, can be expressed as:
where
R0 is the zero bias resistance and
δ can be related to the DOS.
Under this scenario, to better represent the behavior of the
I–V curve for LTP-SBDs, the general diode equation must be modified as:
This series resistance bias dependence can explain the abnormal current density increment observed as
L is reduced in
Figure 1. As diode area is reduced, the resistance value is increased, and, therefore, its reduction with the applied voltage becomes more significant. Hence, beyond 0.4 V, the current density starts to increase, due to the
RS reduction.
Furthermore, the bias-dependent
RS would imply an important concern regarding the correct parameter extraction. In order to verify this assumption,
Figure 9 shows the corresponding
dVD/
dln(
ID) vs.
ID plot, according to Equation (11) of Cheung´s method, for the simulated device shown in
Figure 8. For comparison, in the inset the plot for a defect free device is shown. As can be seen, the extraction procedure can be properly applied for the defect free device getting the extracted value of
η as one. On the contrary, when the high defect density is included in the simulation, the plot does not show a linear behavior at any forward bias region. This fact clearly shows that for low-cost and low-temperature processing SBDs, the film quality compromises the reliable application of the traditional extraction methods due to the bias dependence exhibited by
RS. Therefore, the extracted parameters can exhibit the important variations shown in
Figure 2 and
Figure 3. Thus, proper extraction methodologies for low-cost and low-temperature processed SBD are of main importance to adequately understand the diode behavior.