1. Introduction
Photovoltaic power generation technology has taken a significant leap in the past several decades, due to advances in materials, power converters, and energy storage. Photovoltaic power generation systems usually exist in arid natural environments such as deserts. Various components easily break due to the complex operation environments. The photovoltaic power generation industry is cost-sensitive to the market, and frequent failures may make photovoltaic power generation lose competitiveness [
1]. Therefore, new technologies are necessary to improve the performance and reliability of the system during operation. Power converters consist of IGBT modules, which are one of the most vulnerable components in the system. Due to harsh environments and unpredictable mission profiles, IGBT modules are often subjected to enormous and uncertain temperature fluctuations, leading to degradation of electrical performance and even device damage. Studies show that temperature caused more than 60% of device failures [
2]. In addition, the probability of device failure doubles for every 10 °C increase in temperature [
3]. Therefore, accurately predicting the temperature of the IGBT modules and making the modules run below the safety threshold is a vital means to improve the reliable performance of the device, and it is also a guarantee for the development of the photovoltaic power generation industry.
Real-time junction temperature prediction is the key to extending the reliability of the IGBT modules. The thermal equivalent circuit model is a frequently used temperature prediction approach for long-term load scenarios because of its simplicity and high efficiency. In the past few years, many researchers have improved the performance of thermal equivalent circuit models in many aspects, such as thermal coupling between different layers or adjacent chips, thermal boundary states, temperature-dependent materials, and computational efficiency [
4,
5,
6,
7,
8,
9]. For instance, a lot of research in the literature uses the finite-element analysis method for detailed three-dimensional temperature information to solve the issue of thermal coupling and thermal boundary conditions. In addition, much work has been carried out on computationally efficient thermal behavior modeling for power semiconductor devices when the devices are healthy [
10,
11,
12,
13]. A temperature characteristics-based dynamic model is able to remove the effect of temperature on material properties [
14,
15,
16,
17]. Scognamillo et al. proposed an innovative technique that allows the experimental extraction of the junction-to-ambient thermal impedance (
) of power devices operating in their application environment [
18]. The above-proposed methods improve the performance of thermal equivalent circuit models in different applications.
Unfortunately, the aforementioned means ignore the effect of solder aging on the model parameters. The solder aging changes the thermal path inside the IGBT modules, resulting in a mismatch between the model parameters and the device’s mechanical structure [
19,
20,
21]. The junction temperature prediction based on the model may be much lower than the real chip temperature, resulting in an optimistic evaluation of the module’s operation conditions. Finally, the aging process of the IGBT module is accelerated. Based on the above analysis, a thermal equivalent circuit model that has the ability to remove the effect of solder aging is more necessary. In [
22,
23], model parameters were revised by the variations of thermal impedance due to solder aging. However, these methods still have some limitations: (a) Only the thermal resistance is corrected, and the heat capacity is neglected, due to the lack of research on the influence mechanism of solder aging on model parameters, resulting in the prediction accuracy of junction temperature cannot be completely restored. (b) The calculation of thermal impedance depends on the measurement of chip junction temperature. However, the temperature-sensitive electrical parameters (TSEP) including collector–emitter on-state voltage
and gate-source voltage
are susceptible to the bond wires and gate oxide degradation [
24,
25,
26]. These limitations make it impossible to apply the model to high-precision situations. Therefore, there are still some challenges in correcting the model parameters completely and estimating the thermal impedance economically.
Motivated by the above analysis, this paper proposes an improved thermal equivalent circuit model that can remove the influence of solder aging on temperature prediction. This work includes two aspects: (a) the solder aging process is real-time monitored based on case temperatures and the thermal impedance variations are estimated according to the case temperatures; (b) model parameters consisting of thermal resistance and thermal capacitance are corrected based on linear thermal characteristics. The model parameters are corrected timely to obtain the device’s accurate junction temperature through the above two stages. Finally, the reliability of power converters under various operational states is improved.
Power electronics is a theoretical course that introduces the basic principles, analytical methods, and typical applications of power electronics technology, which is the basis of professional knowledge in electrical disciplines. Power electronics contains the characteristics and use methods of semiconductor power devices, and the working principles and analysis methods of three-phase rectifier, chopper, inverter, and frequency conversion circuits. Structural characteristics and thermal reliability monitoring of semiconductor power devices are hardly involved. As the core component of a photovoltaic power generation system, the thermal reliability of the semiconductor power device affects the reliability of the whole power generation system. The thermal failure principle of semiconductor power devices and how to carry out thermal management are significant methods to improve students’ understanding of power devices. This paper introduces the temperature monitoring method and the thermal failure principle of the power device. At the same time, the finite element analysis method and accelerated aging test method are introduced in the simulation and experiment section. Students can have a more comprehensive understanding of the mechanical structure, failure principle, heat dissipation mechanism, temperature monitoring, and so on.
The remainder of this article is as follows. In
Section 2, the monitoring algorithm of solder aging in real-time and the correction theory of model parameters are introduced. In
Section 3 and
Section 4, the finite-element analysis and experimental analysis are employed to validate the effectiveness of the proposed method, respectively.
3. Simulation Validation
In this section, a finite element analysis (FEA) example is demonstrated to validate the effectiveness of the proposed method. A commercial IGBT module produced by SEMIKRON (Shanghai, China) is modeled through Pro/Engineer software (Version 5.1), as shown in
Figure 5. The IGBT model shown in
Figure 5 is introduced in ANSYS, a commercial FEA software platform (Version 17.2). Transient thermal analysis of the IGBT model is carried out in ANSYS software (Version 17.2). The operation conditions of the IGBT module are as follows: the DC-link voltage is 300 V, the collector current is 60 A, the switching frequency is 10 kHz, the modulation index is 1, and the line frequency is 50 Hz.
The solder fatigue is simulated by changing the thermal conductivity of the partial region in the solder layer. We set up the following aging scenarios to explore the effect of solder fatigue on the module’s thermal behavior. (1) healthy condition without solder aging; (2) slightly aging, i.e., 10% aging region in the solder layer; (3) minor aging, i.e., 20% aging region in the solder layer; (4) intermediate aging, i.e., 30% aging region in the solder layer; (5) extensive aging, i.e., 40% aging region in the solder layer; (6) dangerous aging, i.e., 50% aging region in the solder layer. In addition, it should be noted that the solder aging gradually expanded from the side to the center.
The power loss of the chip is estimated according to the operation conditions of the IGBT module. The transient thermal analysis is processed by applying the power loss on the IGBT models with various aging conditions. The heat flow results under different aging scenarios are in
Figure 6. From
Figure 6, the thermal channel of the heat flow spreading down to the baseplate gradually narrowed from scenarios 1 to 6. The heat flow accumulates in the central area of the solder layer, resulting in a continuous increase in heat flux density in the central area with the degradation of the solder. In scenario 6, the heat flow can only be transferred down to the baseplate through the non-cracked area in the solder layer. Therefore, the heat flow is concentrated in the baseplate’s central area, while reduced in the remaining area. Finally, the case temperatures in the central region of the baseplate increase, while the case temperatures in other regions continue to decrease.
The evolution of
and
during the degradation of solder layer is in
Figure 7.
gradually increases about 5 °C from scenario 1 to 6. Meanwhile,
continues to decrease by about 2.5 °C.
and
are substituted into (
4) to estimate the
values under different solder aging conditions. In addition,
values are estimated by substituting
and
into (
1). The results of
and
are in
Figure 8.
With the deterioration of solder aging, the values of and increase monotonically, indicating that and are only related to the solder aging. Therefore, a database including and is built based on an offline accelerated aging test. In practice, the solder fatigue is monitored in real time by the parameter. The value is acquired through in the database. Compared with other methods, the parameter only relies on the case temperatures, with an advantage in economy and stability.
Then, the effectiveness of the correction algorithm for the model parameters is verified. The parameters of the thermal equivalent circuit model for a healthy IGBT module are extracted based on the work in [
27,
28]. The extracted model parameters are in
Table 1. Firstly, the performance of the original thermal equivalent circuit model during solder aging is tested. The operation condition and case temperature in scenario 5 are given to the original thermal equivalent circuit model to predict junction temperature. The junction temperature results from the original model and FEA are compared in
Figure 9.
The difference between the two temperature results is greater than 12 °C most of the time, which greatly exceeds the tolerable error of the temperature prediction. Continued use of this model may cause the module to operate outside the safety threshold. Therefore, it is necessary to correct the model parameters to remove the influence of solder aging. The model parameters are corrected through (
7) and (
9) based on the information of
. The modified model parameters are in
Table 2.
The results in
Table 2 show that the value of
increases gradually with the deterioration of solder aging, while the value of
continues to decrease. Different material properties of the crack and the solder caused this phenomenon. Compared with solder, the thermal conductivity of the crack is lower, and the specific heat capacity is greater. A low thermal conductivity increases
, and a high specific heat capacity decreases
.
The same operation conditions are applied to the improved thermal equivalent circuit model to predict the junction temperature. The comparison of the junction temperature results from the model and FEA is in
Figure 10.
From
Figure 10, the temperature results from the improved thermal equivalent circuit model can accurately track the temperature results from FEA. The difference between the two temperature results was generally less than 1.2 °C. The correlation between the two signals is more than 0.96. Under the six solder aging scenarios, the mean absolute error (MAE) of junction temperature from the original and improved thermal equivalent circuit models is in
Table 3. From
Table 3, the temperature prediction error from the original model continues to increase with the deterioration of the solder. Under scenario 6, the prediction error of the original model reaches 32 °C, which is far beyond the tolerance of temperature prediction. Compared with the original model, the improved model can significantly reduce the prediction error by about 90%. As a result, the performance of temperature prediction greatly improved.
4. Experimental Validation
In this section, the effectiveness of the improved thermal equivalent circuit model is validated by an experimental case. The test equipment is in
Figure 11, including a commercial IGBT module produced by SEMIKRON (the upper package is removed), an IR camera to measure the chip junction temperature, a recorder for obtaining various electrical signals of the module, a signal generator for offering a driving signal, a DC power supply for the test current, air-cooled equipment to cool the module, and a National Instruments (NI) data acquisition instrument for measuring the case temperatures. Shallow grooves are carved into the upper surface of the heat sink for placing thermal sensors to measure the case temperatures.
To obtain the evolution of various signals that characterize the IGBT module’s aging conditions, we built an accelerated aging test platform for power devices based on the experimental equipment shown in
Figure 11. Applying a 10% overload current to the IGBT module to heat the junction temperature to 180 °C quickly, and then bring down the junction temperature to 60 °C through the air-cooled equipment. In this way, the IGBT module is subject to a 120 °C temperature swing in one thermal cycle.
The starting point of the thermal cycle in
Figure 12 is 0, meaning that the IGBT module is a healthy device without thermal damage. Thermal damage occurs to the solder and bond wires when the IGBT module goes through a thermal cycle. The IGBT fails when the thermal damage accumulates to the threshold value. The
and
are the indicators of solder aging. The values of
and
rely on temperature information such as
,
and
. The case temperatures containing
and
are collected in real time by the NI data acquisition instrument during the test, and
is measured with the IR camera. The collector–emitter on-voltage
indicates the degradation of bond wires, and
is collected in real time by the recorder.
,
and
are substituted into (
1) and (
4) to estimate the values of
and
, respectively. The results of
,
and
are in
Figure 12.
is a core parameter to describe the bond wires’ degradation. The thermal damage to the module containing solder and bond wires has a very slow growth before 3000 thermal cycles. Therefore, the values of , and have a little change. According to the theory of cumulative damage in fatigue, the module’s thermal damage reaches the threshold after 3000 cycles. Accordingly, , and have a rapid growth after 3000 cycles. When one bond wire falls off, increases exponentially, resulting in a big rise in the module’s power loss. As a result, the thermal pressure of the solder layer increases, leading to accelerated solder aging. The growth trend of and is consistent, indicating that and are only related to solder aging. Therefore, the parameter is suited to monitor solder fatigue timely. According to the information of , is acquired during the normal operation of power converter.
A DC pulse current is applied to the IGBT module to examine the performance of the original thermal equivalent circuit model during solder fatigue. The module’s power loss is estimated according to the electrical signal collected by the recorder. The power loss is given to the original thermal equivalent model to predict the junction temperature. The temperature results from the model were compared with that measured by the IR camera, as shown in
Figure 13. The IR camera used in this paper is the FOTRIC series, which can continuously collect temperature at a point and obtain a temperature map.
Figure 14 shows the temperature distribution of the module’s upper surface. From
Figure 14, the temperature at the chip is the highest. The farther away it is from the chip, the cooler it becomes. That is because the chip is the heat source of the IGBT module.
From
Figure 13, the difference between the two temperature results is greater than 15 °C most of the time, with a maximum difference of 17 °C. Continued use of this model may cause the module to operate outside the safety threshold. Therefore, it is necessary to correct the model parameters to remove the effect of solder fatigue. The model parameters are corrected through (
7) and (
9) based on the information of
. The modified model parameters are in
Table 4. From
Table 4, it can be seen that the experimental results are consistent with the simulation results. The different material properties of the solder and crack lead to the variation in
and
. The crack has lower thermal conductivity and higher specific heat capacity, resulting in an increase in
and a decrease in
with the deterioration of the solder.
The same operation conditions are applied to the improved thermal equivalent circuit model to predict the junction temperature. The comparison of the junction temperature results from the model and IR camera is in
Figure 15. From
Figure 15, the temperature results from the improved thermal equivalent circuit model can be seen to accurately track the temperature results from the IR camera. The difference between the two temperature results was generally less than 2 °C. The correlation between the two signals is more than 0.96. The mean absolute error (MAE) of junction temperature from the original and improved thermal equivalent circuit models under the specified solder aging conditions is in
Table 5. The simulation and experimental results are consistent. The junction temperature error of the original model increases with the solder aging. The junction temperature error of the original model reaches 16.2 °C when
rises by 20%. It is no longer helpful for the thermal management of power devices. Compared with the original model, the junction temperature error from the improved thermal equivalent circuit model is reduced by about 90% under the specified aging conditions. As a result, the performance of temperature prediction greatly improved.
In addition, this work can help students of power electronics courses to understand the thermal failure mechanism of semiconductor power devices and how to improve the reliability of power device operation through temperature monitoring. The semiconductor power device is the core component of energy conversion. In power electronics courses, students only learn the principles of energy conversion through power devices. Most experimental courses are arranged around DC-AC conversion. Students cannot understand the internal structure of the power device, the heat generation mechanism, and the heat dissipation process of the power device. This experimental and simulation analysis can help students have an in-depth knowledge of power devices’ mechanical structure, heat dissipation principles, temperature distribution, junction temperature monitoring, and so on. We suggest that this work can be included in the experimental courses of power electronics to give students a more comprehensive understanding of power devices.