UAV Mission Computer Operation Mode Optimization Focusing on Computational Energy Efficiency and System Responsiveness
Abstract
:1. Introduction
- Section 2—‘Domain Overview’ introduces the reader to the mission computers that are the objects of this study, provides an overview of the usage challenges involved in real-time operation systems (RTOS), and describes tools and needs of energy-saving solutions for embedded mission computers.
- Section 3—‘Materials And Methods’ describes the platform for conducting the study experiment, defines a system model in the manner of a power state machine, and describes the exact method for measuring the reactivity and power consumption of different modes of operation.
- Section 4—‘Results’ provides the obtained experiment results.
- Section 5—‘Discussion’ describes and presents the obtained results applied to the proposed system model.
- Section 6—‘Conclusion’ concludes the article by describing the novelty of the research and its further development.
2. Domain Overview
- Select an appropriate ready-to-use avionics platform (including a mission computer).
- Use a microcontroller-specific vendor toolchain.
- Ensure that a real-time operation system is in place and can be easily adapted to the selected computation platform.
- Design and validate the requirements for the flight mission business logic (i.e., what exactly the UAV needs to do).
2.1. UAV Avionics and Mission Computers
- Mission computer (often called an on-board computer or flight controller board).
- Navigation and orientation system (GNSS and GPS).
- Sensor board and sensors.
- Remote control and telemetry system (communications unit).
- Energy and propulsion system (driving unit).
- Payload (sometimes called an off-board module).
2.2. Problems and Researches in the Field of Mission Computers
2.3. Real-Time Systems and Typical Scheduling Algorithms
- By execution reason: periodic and sporadic tasks.
- By constraint nature: tasks with hard or soft deadlines.
- Rate-monotonic scheduling (RMS): Static priority assignment in reverse order of known task periods.
- Earliest Deadline First (EDF): Dynamic priority scheduling, where the highest priority is assigned to the task with the nearest execution deadline.
- Inflexibility, as the scheduler does not actually react to external world events and works exclusively on timer interrupts;
- Difficulty in scheduling sporadic tasks based on the minimum possible period of external events;
- Very large size of the schedule table with appropriate ratios between task periods.
- If all scheduled time constraints of all jobs for all tasks can be met using EDF, then use EDF and finish; otherwise, proceed to Step 2.
- Sort the jobs of all tasks according to the criterion of the number of time constraints of jobs that are still allowed to be violated for the planning time interval. Class “0” will include all tasks that do not allow any misses, while Class “1” will include those that can violate the time constraint once. For example, if () for a task is equal to (2, 4), then it is allowed to violate the time constraint of two jobs out of four consecutive jobs; thus, the task can fall into classes (0, 1, 2) depending on the number of jobs already missed.
- Use EDF first for class 0, then for class 1, etc.
2.4. Methods of Energy Consumption Management
- Dynamic voltage and frequency scaling (DVFS) methods and power-aware scheduling;
- Use of low-power consumption modes, called Power Mode Management (PMM) or Dynamic Power Management (DPM);
- Micro-architectural techniques for energy conservation in individual components such as memory, where the computational context is stored in memory during total or partial processor shutdown;
- Use of non-traditional computers such as DSP or GPU FPGA. This method is suitable for computationally intensive tasks where traditional general-purpose processors perform worse (mW/MIPS).
- Real-time constraints;
- Constraints on the energy consumption of the computer;
- Software methods for ensuring fault tolerance.
- Development of scheduling algorithms that take the probability of failures into account to minimize the active time of tasks and their total failure probability while maintaining schedulability.
- Analyzing the impact of various fault tolerance strategies (re-execution, checkpoints, N-modular redundancy (NMR)) on scheduling. In particular, it is important to integrate different approaches and their optimization in order to improve schedulability and compliance with requirements for failure probability.
- Application of the mixed criticality concept to make systems compatible with industry standards and quantify the probability of transition to high-criticality mode.
- Analysis of the tradeoffs between energy consumption management (DVFS), thermal effects, resistance to various types of failures, and real-time requirements.
- Improving system software reliability, such as scheduler and failure detection mechanisms.
- Use of probabilistic information about execution time to calculate a more accurate estimates of failure probability.
- Consideration of other failure models, such as (k, n), approximate computations, and malicious failures.
- “Soft-error” or “soft fault”: A single-event upset (SEU), i.e., temporary distortion of a bit value in memory or processor register caused by external factors that does not lead to permanent hardware damage.
- “Hard-error” or “hard fault”: Permanent damage to a hardware component caused by wear or degradation of materials due to prolonged operation, for example, radiation exposure. Such errors are classified as single-event latchups (SEL).
- Wake-up delays characterize the time required for full recovery of the processor from sleep mode. They can be measured by determining the time interval from the moment of the interrupt request to the first useful command in the interrupt handler.
- Break-even time is an integral characteristic. The processor must spend the minimum amount of time in low-power consumption mode to compensate for the energy and time costs of transitioning to this mode and back. Break-even time is the sum of the wake-up and transition delays, which characterize the time costs necessary for the processor to transition from active state to sleep mode.
- Procrastination delays: Certain algorithms deliberately postpone the execution of tasks to increase the duration of the idle period and more efficiently use low power consumption modes. These delays are carefully calculated so as not to violate the time constraints of tasks.
- Scheduling delays: The time required to make decisions about changing the power consumption mode and rescheduling tasks.
- Delays associated with calculating optimal moments for transitioning to sleep mode and waking up: Certain algorithms perform complex calculations to determine these moments, which can introduce additional delays.
- Early completion delays: These delays create additional space for energy saving, but require dynamic rescheduling.
2.5. Overview of Existing Methods for Evaluating the Performance and Energy Efficiency of Embedded Systems
- While most existing benchmarks are focused on performance evaluation, the energy efficiency of calculations is critically important for satellite systems due to their strict power constraints.
- Requirements for large memory volumes or use of external files can be problematic for embedded systems with limited memory resources, as some benchmarks require access to the file system.
- There is a lack of open-source code and excessive requirement for paid subscriptions; for example, EEMBC benchmarks require a paid subscription to access test loads.
3. Materials and Methods
3.1. Planning the Experiment
3.2. Limitations and Assumptions
- The supply voltage of the microcontroller is nominal and equal to 3.3 V. This is the most reliable supply voltage for the electronics components of the mission computer and provides the best resistance against one-time failures and electromagnetic interference (EMI). There is a power consumption dependence over the supply voltage; however, this is outside the scope of this research.
- The priorities of the performed tasks are assigned according to the classical theory of Lew and Leyland, called RMS (rate-monotonic scheduling). In this case, each task is periodic and characterized by two numbers:
- For a set of N tasks to be performed,
- The limit on the size of the system tick, which determines the frequency of interruptions from the system timer, is obtained from the FreeRTOS documentation, taking into account the limitations of the MPLAB X IDE development environment for the Atmel ATSAMV71 microcontroller:
- The limits on the microcontroller clock frequency are determined based on the technical documentation for the ATSAMV71 microcontroller and hardware clock configuration of the ‘Boryviter 0.1’ mission computer, and form the following set:
3.3. Experiment Plan
- Dependence of energy consumption on frequency. The dependencies of the consumed electric power on the processor clock frequency must be determined separately for each operating mode m. The set of possible modes includes active mode and three power saving modes:
- Time spent by the operating system to perform functions related to rescheduling and dispatching tasks. These events can originate from forced software requests for rescheduling, system timer interrupts due to the next system tick, or external unplanned interrupt triggering OS synchronization facility (Mutexes, Semaphores, Event Groups, and Queues). The following definitions correspond to the different events identified for the experiment:
- (a)
- Forced software re-scheduling. The FreeRTOS taskYIELD() function is the basic function of cooperative dispatching. It immediately causes rescheduling, forcing the scheduler to check whether another task is ready for execution. If such a task exists and has a priority higher that or equal to the current one, then a context switch to this task is performed. Unlike external or system tick interrupts, taskYIELD() does not rely on hardware interrupts. Instead, it is a software mechanism in which the running task voluntarily yields execution, allowing other tasks to run. As a result, the taskYIELD() function represents a cooperative approach to multitasking wherein tasks manage their own execution time. At the same time, external interrupts and system tick interrupts are part of a preemptive system where the OS can forcefully manage task execution based on real-time events and regular scheduling needs. The time required to perform the function is denoted by .
- (b)
- System timer interrupt. The processor time spent processing interruptions from the system timer depends on the clock frequency of the computing platform. It characterizes the operating system’s overhead for working in the preemptive multitasking mode. System tick interrupts occur regularly, triggering the OS to perform tasks such as updating the system time, managing the scheduling process, and potentially preempting the current task if necessary. The time required to perform the function is denoted by .
- (c)
- External or peripheral interrupt. The time of the system and call of the interrupt service routine (ISR) is the time from the moment of the occurrence of the external or peripheral interrupt to the time of execution of the first command of the interrupt handler. The time required to perform the function is indicated by . When an external interrupt occurs, the Interrupt Service Routine (ISR) handler or the first-level interrupt handler (FLIH) is triggered immediately. This mechanism forces the OS to temporarily stop the current process, handle the interrupt, then return to the interrupted task or switch to a different task based on priority. It is essential to mention that freeRTOS is a very low-footprint RTOS, and in reality the context of the ISR handler and the rest of the RTOS context are not very closely coupled; in other words, the IRQ handling is akin to a regular blocking function with an asynchronous call and primitive calculation context preservation that heavily leans on ARM Cortex M core capabilities.
- The time spent entering and leaving the low-power mode (LPM). The time required to enter and leave a low-power mode defines how much energy can be saved and how much the system reactivity will be decreased. According to the power state-machine definition, two transitions shall be assessed:
- (a)
- Entering. As entering an LPM requires a specific amount of instructions, its time needs to be properly measured. Only specific processor peripherals are shut off depending on the exact LPM. No memory preservation actions are required.
- (b)
- Leaving. Exiting an LPM requires more sophisticated actions; as some LPM modes shut off the internal frequency generator or switch it to the low-power one, a specific stabilization time is required before any processor instruction can be executed.
3.4. Measurement Technique
- A square wave generator (GOOD WILL INSTRUMENT EURO B.V., Veldhoven, The Netherlands), Model: GW Instek GFG-8219A, that generates external interrupt signals with a given period.
- A high-precision power supply unit and power meter (Tektronix UK Ltd., Oldbury, Bershire, UK), Model: Keithley 2281S-20-6, that measures the electric energy consumed. It guarantees the accuracy of the measurements to a measurement error no worse than 15 ms for the time interval and not exceeding 0.0001 W for the electric power.
- A multi-channel storage oscilloscope (Teledyne Technologies, Chestnut Ridge, NY, USA), Model: LeCroy WavePro 7200A, that the measures the time interval between two events: an externally generated interrupt signal from the square wave generator and the first command of the interrupt handler, which is a change in the state of a predefined port (Port 1) to its opposite. Because the command to change the port is atomic, i.e., is executed in one computing cycle in the RISC architecture, the time to change the state of the port can be considered insignificant.
- The hand-modified ‘Boryviter 0.1’ mission computer, where the oscilloscope is connected to the two GPIO outputs (via flying wires) and to the signal generator.
- The high-precision power supply unit and power meter (Keithley 2281S-20-6) used to measure the electric power consumption;
- A multi-channel oscilloscope by Siglent, (SIGLENT Technologies Germany GmbH, Ausburg, Germany), Model: Siglent SDS1204X-E, that measures the trigger event between the processor command “go to low-power mode” and the current consumption response of the microcontroller;
- The modified ‘Boryviter 0.1’ mission computer, where the oscilloscope is connected to the output of the power monitor’s operational amplifier to ensure proper signal linearity and low noise.
- To obtain the dependencies of the energy consumption on the frequency in the available modes of operation of the microcontroller in the stationary mode of operation, it is sufficient to set one of the four operating modes (Active, Sleep, Wait, Backup) and record the electrical power consumed by the Keithley 2281S-20-6 power measurement unit.
- The time spent by the operating system performing functions related to the rescheduling and dispatching tasks was measured in the following way.First, to estimate the preemptive dispatching time, we measured the execution time of the simple predefined calculation algorithm with the known execution time for each CPU frequency. For reliable results, a set of 1000 measurements was executed. It was expected that some iterations of the known algorithm would take longer due to the overhead required for handling external interrupts and interrupts from the system timer. Supposing that the frequency of the external interrupt differs from the frequency of the system timer by 1.5–2 times and that the execution time of one iteration is 20–30 percent of the value of the system tick, we obtain the dependence of the execution time on the iteration number shown in Figure 11. If we suppose that the frequencies of interruptions (external and from the system timer) differ by 1.5–2 times, it is very easy to distinguish their influence on the general graph; in this case, it is sufficient to count the number of measurements that are obtained on the corresponding shelves.We distributed the results of the actual execution time measurements of each iteration onto four shelves depending on whether the cycle was interrupted by processing interruptions. The shelves corresponded to the following situations:
- No interruptions occurred;
- An interrupt from the system timer occurred;
- An external interrupt occurred;
- The iteration was interrupted twice, by the system timer and externally.
The following algorithm was performed for each CPU frequency to estimate the cooperative dispatch time.The program first accumulates an array of data about the execution time of the mutex ‘take’ operation. The FreeRTOS is configured to have only one single task, which blocks and releases the mutex and then records the time required to perform these two operations in the array.In the second stage, several tasks are created, which block the mutex in a loop, records the time and task number in the logEntries shared array, releases the mutex, and then calls the system function taskYIELD() to transfer control to other tasks. These tasks work in parallel, creating conditions for estimating the overhead of switching between tasks. A hardware timer measures the time of operations with a resolution equal to 66.66 ns. The logEntries array stores the execution time of the operations and the task number, which enables analysis of the results after the program is executed.Conditional transition between stages: The second stage begins after completing the first, ensuring the correctness of the accumulated data. - Time spent entering and leaving low-power modes (LPMs). According to the processor datasheet, the ‘Wait’, ‘Sleep’, and ‘Backup’ modes require a specific microcontroller shutdown technique that in return requires a waiting loop to ensure that all peripherals are safely turned off. However, as the ‘deepest’ power saving mode, ’ Backup’ mode can be exited only if a processor resets. To measure this, it is necessary to apply external devices, because when the processor is turned off and the peripheral shutoff process has been initiated it is impossible to obtain information on when exactly the core stopped working. The time for transitions ([1], [3], [5]) in Figure 6 can only be determined using an external oscilloscope, as the program is not executed in the energy-saving mode. In this case, the actual time of entering low-power mode can be assessed by the drop in the supply current consumption registered by the oscilloscope:
- Step 1: The test software toggles the output GPIO port state, allowing the connected oscilloscope to be triggered.
- Step 2: The second channel of the connected oscilloscope, which is connected to the operational amplifier, registers the drop in current consumption based on the trigger event of entering the LPM.
- Step 3: The time required to enter an LPM is obtained by calculating the time difference between the trigger event in Step 1 and the current drop event in Step 2.
The exit time measurement technique for transitions ([2], [4], [6]) in Figure 6 is also rather difficult. Still, by having an external interrupt essentially wake the processor up, it is straightforward enough to measure the time difference between the external interrupt signal from the signal generator and the output pin toggle of the microcontroller.However, because the deepest “Backup” power saving mode can only be exited during a processor reset, for this specific case the test software was modified to make the specific pin toggle the first operation from the start of the software. The exit from the LPM depends heavily on the particular LPM and how it implements the microcontroller’s peripheral shutdowns. The “Sleep” and “Wait” modes are relatively straightforward to measure, as both allow for return to the computational context before the LPM; however, the “Backup” mode is less trivial. Exiting the “Backup” mode requires a RESET vector entrance, which means that the microcontroller software starts from scratch. This behavior requires a more complex software architecture for implementation, and typically requires an external NVRAM that can be used as context memory.Thus, we used two different test software scenarios to measure the exits from the different LPM modes. For both scenarios, an external interrupt from the signal generator was used. This signal triggered the connected oscilloscope to capture the GPIO pin toggle as the first operation after the microcontroller became ready to execute the following command on the program counter (PC):- Scenario 1—Sleep and Wait modes:
- -
- Step 1. The wakeup source is configured to react on the external interrupt from the GPIO pin connected to the signal generator.
- -
- Step 2. The external signal generator is set to generate square pulses of 10 Hz.
- -
- Step 3. The interrupt handler is set up in such a way that the first operation is the appointed GPIO pin toggle.
- -
- Step 4. The time difference between the rising edge of the square pulse from the signal generator and the rising edge at the output GPIO pin can be considered the wakeup time.
- Scenario 2—Backup mode:
- -
- Step 1. The wakeup source is configured to react on the external interrupt from the GPIO pin connected to the signal generator.
- -
- Step 2. The external signal generator is set to generate square pulses of 10 Hz.
- -
- Step 3. As the microcontroller undergoes a reset vector, the GPIO pin toggle is set as the very first operation in the main() function, immediately after the GPIO configuration. As the test software did not contain any major variables, the time for initialization of the “.bss” section can be neglected.
- -
- Step 4. The time difference between the rising edge of the square pulse from the signal generator and the rising edge at the output GPIO pin can be considered the wakeup time.
4. Results
4.1. Dependence of Energy Consumption on the Operating Frequency
4.2. Time Spent by the Operating System to Perform Functions Related to the Rescheduling and Dispatching Tasks
4.3. Time Spent Entering and Leaving the Low-Power Modes (LPMs)
5. Discussion
- Dependence of the power consumption on the clock frequency for both active mode and low-power modes.
- Overhead costs of the operating system to support multitasking, namely, delays in the execution of the scheduler and dispatcher operations of the operating system for the implementation of cooperative and preemptive dispatching.
- Break-even and wake-up times when using low-power modes.
- Ensuring that the mission computer functions in an energy-efficient way, i.e., spending the minimum possible electrical energy on its operation.
- Guaranteeing that the required amount of computational work will be completed within the established time frame.
- Ensuring that the reaction time to external events will not exceed the established threshold required by the end-application (mission) limits.
- Set the clock frequency of the processor so as to be sufficient to guarantee the specified limits.
- Apply a software solution to enable one of the existing low-power modes.
6. Conclusions
- The electrical energy consumed in the active and power-saving modes of the onboard computer.
- The time spent by the operating system to perform functions related to rescheduling and dispatching tasks; we have considered all three possible cases when the OS performs rescheduling and dispatching: cooperative dispatching, crowding out dispatching after an interrupt from the system timer, and external interrupts.
- The time spent to entering energy-saving mode and return to active mode after an external event (interruption) that requires the system to wake up.
- The task of finding a compromise between the reactivity and power consumption of the onboard computer is formulated through a representation in the form of a system model consisting of a power state machine.
- The developed technique for measuring the time spent to push dispatching after an interruption from the system timer and to process an external interruption allows these costs to be quickly and accurately determined.
- The proposed time measurement technique for cooperative dispatching is fast and accurate; in addition, it is scalable, allowing the system’s behavior to be determined with an arbitrary number of tasks.
Author Contributions
Funding
Data Availability Statement
Acknowledgments
Conflicts of Interest
References
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MCU Family | Memories | Temperature | Voltage | Low Power Modes |
---|---|---|---|---|
ATSAMV7x (Cortex-M7) | F = 2 Mb, R = 384 Kb | −40/+125 | 1.8–3.6 Vdc | Sleep, Wait, Backup |
PIC32CZ (MIPS) | F = 2 Mb, R = 512 Kb | −40/+105 | 2.5–3.6 Vdc | Sleep, Wait, Backup |
PIC32MX (MIPS) | F = 512 Kb, R = 128 Kb | −40/+105 | 2.3–3.6 Vdc | Sleep, Idle |
STM32H7 (Cortex-M7) | F = 1 Mb, R = 564 Kb | −40/+125 | 1.62–3.6 Vdc | Sleep, Stop, Standby |
STM32F7 (Cortex-M7) | F = 2 Mb, R = 512 Kb | −40/+105 | 1.7–3.6 Vdc | Sleep, Stop, Standby |
iMX.RT1024 (Cortex-M7) | F = 4 Mb, R = 256 Kb | −40/+105 | 3.0–3.6 Vdc | LPR (24 MHz), Sleep |
Frequency, MHz | taskYield() Latency , uS | System Tick Interrupt Latency , uS | External Interrupt Latency , uS | Capturing and Releasing Non-Blocking Mutexes Latency, uS |
---|---|---|---|---|
30 | 7.27 | 4.02 | 6.42 | 7.73 |
100 | 2.16 | 1.23 | 1.95 | 2.34 |
300 | 0.72 | 0.47 | 0.65 | 0.78 |
Mode | Sleep, uS | Wait, uS | Backup, uS | |||
---|---|---|---|---|---|---|
Frequency | Wake-Up Delays | Break-Even Time | Wake-Up Delays | Break-Even Time | Wake-Up Delays | Break-Even Time |
30 MHz | 5 | 45 | 1800 | 1950 | 5000 | 6500 |
100 MHz | 1.7 | 31 | 1228 | 1388 | 5000 | 6500 |
300 MHz | 0.6 | 21 | 105 | 255 | 5000 | 6500 |
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Liubimov, O.; Turkin, I.; Cheranovskiy, V.; Volobuieva, L. UAV Mission Computer Operation Mode Optimization Focusing on Computational Energy Efficiency and System Responsiveness. Computation 2024, 12, 235. https://doi.org/10.3390/computation12120235
Liubimov O, Turkin I, Cheranovskiy V, Volobuieva L. UAV Mission Computer Operation Mode Optimization Focusing on Computational Energy Efficiency and System Responsiveness. Computation. 2024; 12(12):235. https://doi.org/10.3390/computation12120235
Chicago/Turabian StyleLiubimov, Oleksandr, Ihor Turkin, Valeriy Cheranovskiy, and Lina Volobuieva. 2024. "UAV Mission Computer Operation Mode Optimization Focusing on Computational Energy Efficiency and System Responsiveness" Computation 12, no. 12: 235. https://doi.org/10.3390/computation12120235
APA StyleLiubimov, O., Turkin, I., Cheranovskiy, V., & Volobuieva, L. (2024). UAV Mission Computer Operation Mode Optimization Focusing on Computational Energy Efficiency and System Responsiveness. Computation, 12(12), 235. https://doi.org/10.3390/computation12120235