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Article

Stepped Annealed Inkjet-Printed InGaZnO Thin-Film Transistors

Jilin Provincial Key Laboratory of Architectural Electricity & Comprehensive Energy Saving, Jilin Jianzhu University, 5088 Xincheng Street, Changchun 130118, China
*
Authors to whom correspondence should be addressed.
Coatings 2019, 9(10), 619; https://doi.org/10.3390/coatings9100619
Submission received: 24 August 2019 / Revised: 24 September 2019 / Accepted: 26 September 2019 / Published: 27 September 2019

Abstract

:
The preparation of thin-film transistors (TFTs) using ink-jet printing technology can reduce the complexity and material wastage of traditional TFT fabrication technologies. We prepared channel inks suitable for printing with different molar ratios of their constituent elements. Through the spin-coated and etching method, two different types of TFTs designated as depletion and enhancement mode were obtained simply by controlling the molar ratios of the InGaZnO channel elements. To overcome the problem of patterned films being prone to fracture during high-temperature annealing, a stepped annealing method is proposed to remove organic molecules from the channel layer and to improve the properties of the patterned films. The different interfaces between the insulation layers, channel layers, and drain/source electrodes were processed by argon plasma. This was done to improve the printing accuracy of the patterned InGaZnO channel layers, drain, and source electrodes, as well as to optimize the printing thickness of channel layers, reduce the defect density, and, ultimately, enhance the electrical performance of printed TFT devices.

1. Introduction

In recent years, thin-film transistors (TFTs) have been widely used in large-scale functional integrated circuits owing to their small size, low power consumption, and good thermal stability [1,2,3,4,5]. This has triggered many studies into transistor materials that can exhibit a good electrical performance with regard to their mobility and on–off current modulation [6]. In recent years, the main direction of this research has been oriented toward new structural designs and channel semiconductor active materials for organic transistors [7,8,9] and metal oxide transistors [2,10,11,12,13]. Metal oxide transistors have some advantages regarding environmental stability and large operating voltage compared with organic transistors and have thus become a promising class of TFT active layer materials [14,15]. And metal oxide TFTs have been reported to be used in display [16], nonvolatile memory [17], and photodetector fields [18].
Among these oxide semiconductor active layers, ZnO-based thin-film transistors, in particular, such as ZnO [19,20,21], InZnO [22,23,24], ZnSnO [25,26,27], and InGaZnO [28,29,30], have become the focus of research. Of these, amorphous oxides based on heavy metal oxides with the electronic configuration (n − 1)d10ns0 (n ≥ 4) are particularly promising for use as high-performance TFT channel materials [31,32,33]. Recently, Zhang et al. reported nitrate-complex solution-processed metal oxide TFTs by doping both the In2O3 semiconductor and Al2O3 gate dielectric with boron [34]. For the structures of the channel, a corrugated heterojunction channel structure was proposed and developed by Lee et al. to achieve high mobility, low leakage current, and stable InSnZnO/InGaZnO TFTs [35]. In particular, studies into the mobility, stability, and transmittance of amorphous InGaZnO channel layers as proposed by Hosono and his co-worker group have led to InGaZnO TFTs becoming the primary focus of this type of research [11]. The saturation mobility and on/off ratio (Ion/Ioff) of the conventional annealed (600 °C) solution-processed InGaZnO TFTs were reported as 6.41 cm2·V−1·s−1 and 3.9 × 107, respectively [36]. The InGaZnO TFTs by combustion method (300 °C) could achieve mobility of 2.82 cm2·V−1·s−1 and Ion/Ioff of 4.0 × 103 [37]. The carrier concentration of InGaZnO can be controlled at a low level, which is important for TFTs to operate. Moreover, Ga serves as the suppressor and stabilizer to suppress the generation of oxygen vacancies and decreases the free electron concentration, because Ga–O bonds are much stronger than In–O and Zn–O bonds [38].
However, current, mature preparation processes for TFTs rely on lithography to obtain patterned thin films [39,40,41], but this requires many complicated preparation steps, such as repeated exposure, development, and etching. By contrast, the introduction of inkjet printing technology to prepare devices has the advantage of creating a simple process with less material waste that is environmentally friendly and enables easy, large-scale production [42,43,44,45,46]. The first report of inkjet-printed metal oxide TFTs was given by Chang et al. [47]. However, there are some issues to overcome, such as the poor precision in patterning these thin films, the annealing of the patterned films, and interface defects caused by the adopted printing method. In this study, we, therefore, present a stepped annealing process that can form a complete and undamaged patterned InGaZnO channel layer even after annealing treatment at 550 °C. We also took advantage of a solution method to regulate the type of TFT device created by changing the molar ratios of the elements in the channel ink via the spin-coated and etching method. And we investigated the use of plasma treatment to improve the printing accuracy of the channel layer and to reduce the interface defect density between the drain/source electrodes and the patterned channel layer to achieve a reduction of the threshold voltage (VT).

2. Materials and Methods

2.1. Preparation of Composite Films

The preparation process of printed InGaZnO TFTs is shown in a schematic diagram (Figure 1). First, we used a Si wafer with a SiO2 thickness of 285 nm from HEFEI KEJING Materials Tech Co., Ltd. (Hefei, China) as the bottom gate and insulation layer for the TFT devices. Additionally, colloidal precursors were prepared from indium nitrate [In(NO3)3], gallium nitrate [Ga(NO3)3], and zinc acetate [Zn(CH3COO)2] dissolved in 5 mL of methyl glycol to achieve InGaZnO solutions with indium, gallium, and zinc molar ratios of 6:1:3, 5:1:4, 3:1:6, and 2:1:7. These mixtures were each separately injected into a flask heated by an oil bath (150 °C) with magnetic stirring. Then 1.2 mL of ethanolamine and 300 µL of glacial acetic acid were successively injected into the precursor solution to act as stabilizers. The reaction mixtures were further refluxed at 150 °C for 1 h and then allowed to cool to room temperature and aged for 24 h. The silver nanoparticle printing inks that were used as the raw materials for the drain and source electrodes were purchased from SIJ Technology, Inc. (Ibaraki, Japan). In addition, we adopted a TFT structure with a bottom gate and top contact (drain and source electrodes) as this structure is suitable for ink-jet printing.
Next, The InGaZnO solution was filtered through a percolating filter with a diameter of 0.2 µm and then inhaled by a 10 µm Sonoplot (Middleton, WI, USA) nozzle with capillary force for 5 s. The nozzle was then placed on the substrate surface. The width of the lines formed on the Si/SiO2 substrate was about 40 µm, so the spacing of the printed lines in the program needs to be set to 40 µm. The thickness of one printed layer is about 30 nm in this way. Subsequently, the printed InGaZnO channel layer needs to be cured at 100 °C for 10 min and annealed to remove any organic impurities present. We adopted the method of stepped annealing in an air atmosphere with a heating rate of 5 °C/min. The preannealing temperature of the patterned film was set to 120 °C for an annealing time of 1 h, with a transition annealing step at 450 °C for 1 h, and finally annealing for 1 h at 550 °C. The drain and source electrodes were prepared on the InGaZnO channel layer with a 210 V printing voltage, 2 mm/s printing speed, 40 µm distance between the tip and the channel layers. The width of printed lines was 10 µm, and the thickness of resulting electrodes was 60 to 80 nm with a 3 µm nozzle. The printed electrodes were then annealed at 200 °C for 30 min to remove the organics that had coated the silver nanoparticles.

2.2. Characterization

The microstructures of patterned channel layers were observed using an optical microscope (Carl Zeiss, AxioScope A1, Oberkochen, Germany). The contact angle between the printing ink and substrates was acquired using a contact angle tester (KRüSS, DSA25, Hamburg, Germany). Output and transfer curves of TFTs were measured by a semiconductor parametric instrument (Keysight, B1500A, Santa Rosa, CA, USA). Patterned channel layers and drain/source electrodes were, respectively, prepared by inkjet printing instruments (Sonoplot-Microplotter II and SIJ-S050).

3. Results and Discussion

Different molar ratios of the elements of the InGaZnO in the channel layers were spun onto the Si/SiO2 substrates and then annealed at 550 °C (InGaZnO layers with different molar ratios were about 40 ± 5 nm thickness and 0.8 ± 0.2 nm roughness), lithographed, and then finally, metal aluminum was evaporated to create the drain and source electrodes on the channel layers. Figure 2a–d shows the drain current versus the drain–source voltage (ISDVSD) output characteristics of the InGaZnO TFTs. The curves show typical n-type transistor performance with a clear transition from linear to saturation behavior with the different element molar ratios of the InGaZnO channel layers. It can be found that the current in the saturation region decreases with the decrease of indium mole ratio. The reason is that the increase of indium in the InGaZnO channel layers can lead to a large number of oxygen vacancies and interstitial indium, which can reduce the resistivity of the films. So the carrier concentration of InGaZnO with a ratio of 6:1:3 cannot be controlled at a low level, which is not good for the TFT to control the current. For other TFTs with different element molar ratios, the increase of VSD produced a reverse inhibition current and caused the ISD to decrease in the saturation region. Figure 2e exhibits the typical transfer curves ISDVG at VSD = 30 V; it can be seen that the Ion/Ioff was significantly enhanced along with a gradual decrease of the molar proportion of indium because a smaller percentage of Indium in InGaZnO resulted in a decrease of the off current [38]. Although the increase of the proportion of indium enhances the mobility of the channel layer, the Ioff of the TFT still retains a relatively high value in the off state, which will affect the stability and the ability to resist noise signal interference of the TFT devices. Figure 2f plots (ISD)1/2 versus VG at VSD = 30 V; the saturation mobility of 0.172, 0.037, 0.035, and 0.027 cm2·V−1·s−1 was derived from a linear fit to the plot of the square root of ISD versus VG with ratios of 6:1:3, 5:1:4, 3:1:6, and 2:1:7. The value of VT is estimated by extrapolating the linear portion of the curve. It was found that the VT of InGaZnO channel layer TFTs differs for different element molar ratios. In addition, the VT of the TFTs with element molar ratios of 6:1:3 and 5:1:4 was negative (VT of −3.8 and −2.8 V, respectively), while the VT of the transistors with ratios of 3:1:6 and 2:1:7 was positive (VT of 8.6 and 12 V, respectively). Appreciable drain current flows at a gate voltage of 0 V, as can be seen in Figure 2a,b. Thus, depletion mode and enhancement mode TFTs can be obtained simply through controlling the molar ratios of the channel elements. There into the gate leakage remained on the magnitude of nanoampere for the TFTs with different element molar ratios, which will not affect the test results. To obtain TFTs with better electrical performances, the elemental molar ratio of 2:1:7 for In:Ga:Zn in the InGaZnO channel layers was selected for the following printing and discussions owing to the higher Ion/Ioff value (~3.1 × 104).
To fabricate TFT devices via printing, Si/SiO2 substrates were treated with argon plasma cleaning to remove surface impurities and adsorbed functional groups, and to improve the wetting of the ink onto the substrate. Wetting properties played an important role in the final pattern of the solute deposit [48]. As shown in Figure 3a, a microscope image of the contact angle between the InGaZnO printing ink and the Si/SiO2 substrate without argon plasma treatment shows a large angle of ~38.8°, which means that the wetting of the ink was not good enough to form a continuous patterned line. Microscope images of the contact angle after an argon plasma treatment for either 10 or 30 min are shown in Figure 3b,c, respectively. In Figure 3b, it can be observed that the contact angle between the InGaZnO ink and the Si/SiO2 substrate is significantly reduced (contact angle of ~14.3°), which indicates that the wetting of the ink onto the substrate has been improved. However, when the duration of the plasma process is increased, the contact angle between the ink and substrate does not obviously change (Figure 3c). Thus, by argon plasma treating the Si/SiO2 substrates for 10 min, patterned InGaZnO channel layers of different sizes can be obtained based on previous designs, as shown in Figure 3d–f. For printing, we chose the size of the InGaZnO channel layer that is shown in Figure 3d; using this pattern we could increase the area through which carriers from the electrodes were injected into the active layer with a certain size of the channel layer and width/length ratio of the channel.
Next, the printed patterned InGaZnO channel layers needed to be annealed to remove organic impurities. The solution-processed channel layers required high-temperature annealing at 400 to 600 °C for metal oxide TFT devices [49,50]. However, after an hour of conventional annealing at 550 °C in air atmosphere, the patterned channel layers were observed to be severely ruptured, as shown in Figure 4a. Conventional annealing increased from room temperature directly to 550 °C with the heating rate of 5 °C/min. This was caused by rapid curing of the surface of the patterned channel layer, without curing the internal components; thus, when the temperature was increased, the surface cracked owing to gas generated from the annealing of the internal solution. Here, we propose a stepped annealing method for annealing the channel layer that includes curing the layer for 1 h at a temperature lower than the boiling point of the ink’s solvent, followed by a transition annealing temperature of 450 °C for 1 h, and subsequent annealing at 550 °C for 1 h. After the stepped annealing treatment, the surface of the patterned channel layer was unbroken, as shown in Figure 4b. This is required for the subsequent deposition of the drain and source electrodes onto the patterned InGaZnO channel layers. Meanwhile, the scanning electron microscopy (SEM, JSM-7610F, JEOL, Tokyo, Japan) images and energy-dispersive X-ray spectroscopy (EDS, X-Max 50, Oxford, Abingdon, UK) element mapping of InGaZnO channel layer after traditional annealing and stepped annealing are shown in Figure 4c,d. It was found that indium, gallium, and zinc elements are evenly distributed in the InGaZnO patterned films. After annealing, the atomic percentages of indium, gallium, and zinc were 0.179%, 0.077%, and 0.744%, respectively, which were similar to the proportion of elements in InGaZnO printing ink.
For comparison, we prepared two channel layers with different thicknesses by controlling the amount of ink printed onto the substrates. We then printed drain and source electrodes covering the surface of the channel layer and controlled the channel length to 60 µm to build TFT devices. In Figure 5a,b, the transition from the linear to the saturation regime and a good regulating effect on the source–drain current are observable in the output characteristics of the TFTs with the InGaZnO patterned channel layer thicknesses of 30 and 120 nm under different gate voltages. We found that the TFTs with thinner channel layers could achieve more drain current because, in the thinner channel, a shorter path would obviously form for carriers, resulting in lower serial resistance and consequently higher drain current [51]. The Ion/Ioff value of the TFT with the 30-nm-thick InGaZnO channel layer (~2.0 × 104) was significantly higher than that of the TFT with the 120-nm-thick channel layer (~1.9 × 103) at VSD = 30 V, as shown in Figure 5c. Furthermore, the VT of 12.3 V and the saturation mobility of 0.323 cm2·V−1·s−1 of the TFT with the 30-nm-thick InGaZnO channel layer and that of the TFT with the 120-nm-thick channel layer (~11.2 V and 0.012 cm2·V−1·s−1) at VSD = 30 V were derived from Figure 5d. Gallium serves as the suppressor and the stabilizer to suppress the generation of oxygen vacancies because Ga–O bonds are much stronger than In–O and Zn–O bonds in InGaZnO films [38]. However, the increasing film thickness will consequently introduce a large number of defects, such as interstitial indium and zinc and oxygen vacancies. Such kinds of defects will relate to an increase of the off current. So the Ion/Ioff ratio of the TFT with 120 nm InGaZnO channel layer decreased. The thicker channel formed longer source–drain transport path for carriers and was affected by defect scattering, which led to a decrease in field-effect mobility.
High-temperature annealing in air will cause many functional groups to gather on the surface of the InGaZnO channel layer. To analyze the changes of surface functional groups before and after annealing and argon plasma treatment, we plotted the transmission infrared spectra of InGaZnO films without and with stepped annealing and argon plasma treatment as shown in Figure 6. In contrast, the absorption of carboxyl (1647 cm−1) and hydroxyl (3337 cm−1) functional groups are obviously increased on the surface of InGaZnO film after stepped annealing as shown in Figure 6b. The functional groups’ adsorption onto the InGaZnO channel surface will lead to the creation of acceptor-like surface states [52]. So if we directly printed the drain and source electrodes onto the surface of the channel layers after high-temperature annealing, these functional groups would introduce defects at the interface and affect carrier injection. To solve this problem, argon plasma treatment was applied to the surface of the InGaZnO, the absorption of carboxyl and hydroxyl functional groups adsorbed on the surface were significantly reduced after 20 s of plasma treatment, as shown in Figure 6c. In Figure 7a–c, TFTs with different plasma processing times all exhibited hard saturation and operated as n-channel enhancement mode devices. A positive VG was required to induce a conducting channel, and the channel conductivity increased when the positive gate bias was increased. However, the value of Ion/Ioff, the saturation mobility, and the VT of the TFTs were affected by the duration of the plasma treatment of the interface between the patterned channel layer and the drain and source electrodes. Figure 7d,e show the transfer characteristics of InGaZnO TFTs with different plasma processing times at VSD = 30 V. As shown in Figure 7d, the value of Ion/Ioff of TFTs without plasma and with a plasma treatment time of 20 and 40 s was 1.0 × 104, 1.0 × 104, and 4.6 × 104, respectively. Furthermore, the defects at the interface between the channel layers and the drain and source electrodes mainly affected the injection of carriers. The modified interface was able to reduce the power consumption of the TFT devices. Therefore, we found that the value of VT of the TFTs treated with 20 s of plasma treatment decreased from 12.3 to 8.7 V. However, an excessive plasma processing time will increase the VT (~13.9 V with 40 s plasma treatment), as shown in Figure 7e. The variation of the patterned InGaZnO surface roughness before and after different argon plasma treatment time was analyzed by atomic force microscope in Figure 7f. The channel layer with small surface roughness could be beneficial to form better contact with the drain/source electrodes and improve carrier injection efficiency. The surface roughness of the printed InGaZnO channel layer without plasma treatment was 2.131 nm, and the roughness of the layer was decreased to 1.810 nm after 20 s of plasma treatment. However, the surface of the layer treated with 40 s of plasma treatment was slightly damaged, and the roughness increased to 2.401 nm, thereby reducing the performance of the TFT devices. The value of the saturation mobility of the TFTs could also be improved through optimizing the plasma processing time (0 s: 0.054 cm2·V−1·s−1; 20 s: 0.071 cm2·V−1·s−1; and 40 s: 0.052 cm2·V−1·s−1). The interface plasma treatment thus played a key role in improving the performance of a TFT device prepared using printing technology.

4. Conclusions

We investigated a printing method to prepare InGaZnO TFT devices with a bottom gate and top contact (drain and source electrodes) structure and presented a stepped annealing method to prevent the patterned channel layers from cracking and to improve the electrical properties of the channel layers when using a high annealing temperature. We prepared InGaZnO inks for printing with different ratios of the constituent elements; further, the type of TFT could be regulated by changing the element ratios. By improving the interface between the insulation layer and the channel layer and between the channel layer and the drain and source electrodes, we optimized the printing thickness of the InGaZnO channel layer and reduced the defect density between the interfaces to reduce the power consumption of the printed TFT devices and thus improved their electrical performance. The optimized printed TFT exhibited a VT of 8.7 V, a field-effect mobility of 0.071 cm2·V−1·s−1, and an Ion/Ioff of 104. The electrical performances of InGaZnO TFTs fabricated by different methods are summarized in Table 1. Compared with the current TFTs, our full-printed preparation method still has a certain gap in the electrical properties, but we will improve the performance of the TFTs by modifying the interface next, especially to improve the problem that silver nanoparticles as electrodes will diffuse into the channel layer with the application of voltage.

Author Contributions

Conceptualization, X.Y. (Xingzhen Yan); methodology, X.Y. (Xingzhen Yan) and K.S.; formal analysis, X.Y. (Xingzhen Yan) and X.C.; investigation, F.Y.; writing—original draft preparation, X.Y. (Xingzhen Yan); writing—review and editing, X.Y. (Xingzhen Yan) and X.Y. (Xiaotian Yang); project administration, Y.C. and X.Y. (Xiaotian Yang); funding acquisition, X.Y. (Xingzhen Yan) and X.Y. (Xiaotian Yang).

Funding

This work is supported by the National Key R&D Program of Strategic Advanced Electronic Materials of China (No. 2016YFB0401103), National Natural Science Foundation of China (No. 51672103), and Natural Science Foundation of Jilin Province, China (Nos. 20180520227JH, JJKH20180589KJ).

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. Schematic diagram of the procedures for fabricating a printed InGaZnO TFT. The nozzle was filled with the InGaZnO solution, forming a patterned layer with a thickness of 30 to 120 nm. Then, after annealing, the nozzle containing the solution of silver nanoparticles formed the 60 to 80 nm source and drain electrodes on the semiconductor layers.
Figure 1. Schematic diagram of the procedures for fabricating a printed InGaZnO TFT. The nozzle was filled with the InGaZnO solution, forming a patterned layer with a thickness of 30 to 120 nm. Then, after annealing, the nozzle containing the solution of silver nanoparticles formed the 60 to 80 nm source and drain electrodes on the semiconductor layers.
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Figure 2. (a,d) Output characteristics of InGaZnO thin-film transistors (TFTs) with different molar ratios of the elements, namely In:Ga:Zn ratios of 6:1:3 (a), 5:1:4 (b), 3:1:6 (c), and 2:1:7 (d). (e,f) Transfer characteristics of the InGaZnO TFTs. The channel length, width, and thickness of the above TFTs are about 60 µm, 300 µm, and 40 nm, respectively.
Figure 2. (a,d) Output characteristics of InGaZnO thin-film transistors (TFTs) with different molar ratios of the elements, namely In:Ga:Zn ratios of 6:1:3 (a), 5:1:4 (b), 3:1:6 (c), and 2:1:7 (d). (e,f) Transfer characteristics of the InGaZnO TFTs. The channel length, width, and thickness of the above TFTs are about 60 µm, 300 µm, and 40 nm, respectively.
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Figure 3. Contact angle between the ink and the substrate without (a) and with argon plasma treatment for 10 min (b) and 30 min (c). (df) Microscope images of different sized printed channel patterns on the substrate treated with plasma treatment for 10 min.
Figure 3. Contact angle between the ink and the substrate without (a) and with argon plasma treatment for 10 min (b) and 30 min (c). (df) Microscope images of different sized printed channel patterns on the substrate treated with plasma treatment for 10 min.
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Figure 4. Microscope images of the patterned channel layer with traditional annealing (a) and a stepped annealing treatment (b). SEM images and EDS element mapping of the patterned channel layer with traditional annealing (c) and a stepped annealing treatment (d).
Figure 4. Microscope images of the patterned channel layer with traditional annealing (a) and a stepped annealing treatment (b). SEM images and EDS element mapping of the patterned channel layer with traditional annealing (c) and a stepped annealing treatment (d).
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Figure 5. Output characteristics of TFTs with a patterned InGaZnO channel layer thickness of 30 nm (a) and 120 nm (b). (c,d) Transfer characteristics of TFTs with different InGaZnO channel layer thicknesses. The channel length and width of the above TFTs are about 60 and 300 µm.
Figure 5. Output characteristics of TFTs with a patterned InGaZnO channel layer thickness of 30 nm (a) and 120 nm (b). (c,d) Transfer characteristics of TFTs with different InGaZnO channel layer thicknesses. The channel length and width of the above TFTs are about 60 and 300 µm.
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Figure 6. Transmission infrared spectra of InGaZnO films without annealing (a), with stepped annealing (b), and with stepped annealing and argon plasma treatment (c).
Figure 6. Transmission infrared spectra of InGaZnO films without annealing (a), with stepped annealing (b), and with stepped annealing and argon plasma treatment (c).
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Figure 7. Output characteristics without (a) and with 20 s (b) and 40 s (c) plasma treatment on the surface of the patterned channel layers. (d,e) Transfer characteristics of TFTs with different plasma treatments. The channel length, width, and thickness of the above TFTs are about 60 µm, 300 µm, and 30 nm, respectively. (f) Atomic force microscope images of the printed InGaZnO channel layer without and with different plasma treatment time.
Figure 7. Output characteristics without (a) and with 20 s (b) and 40 s (c) plasma treatment on the surface of the patterned channel layers. (d,e) Transfer characteristics of TFTs with different plasma treatments. The channel length, width, and thickness of the above TFTs are about 60 µm, 300 µm, and 30 nm, respectively. (f) Atomic force microscope images of the printed InGaZnO channel layer without and with different plasma treatment time.
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Table 1. Electrical parameters of InGaZnO TFTs fabricated by different methods.
Table 1. Electrical parameters of InGaZnO TFTs fabricated by different methods.
MethodMobility (cm2·V−1·s−1)Threshold Voltage (V)On/Off RatioRef.
Traditional annealing, spin-coating and etching6.41−37.73.9 × 107[36]
Combustion annealing, spin-coating and etching2.82−1.94.0 × 103[37]
Inkjet-Printed67.91.0 × 105[53]
Our results0.0718.71.0 × 104

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MDPI and ACS Style

Yan, X.; Shi, K.; Chu, X.; Yang, F.; Chi, Y.; Yang, X. Stepped Annealed Inkjet-Printed InGaZnO Thin-Film Transistors. Coatings 2019, 9, 619. https://doi.org/10.3390/coatings9100619

AMA Style

Yan X, Shi K, Chu X, Yang F, Chi Y, Yang X. Stepped Annealed Inkjet-Printed InGaZnO Thin-Film Transistors. Coatings. 2019; 9(10):619. https://doi.org/10.3390/coatings9100619

Chicago/Turabian Style

Yan, Xingzhen, Kai Shi, Xuefeng Chu, Fan Yang, Yaodan Chi, and Xiaotian Yang. 2019. "Stepped Annealed Inkjet-Printed InGaZnO Thin-Film Transistors" Coatings 9, no. 10: 619. https://doi.org/10.3390/coatings9100619

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