Compact and Simple High-Efficient Dual-Band RF-DC Rectifier for Wireless Electromagnetic Energy Harvesting

Abstract

(1) Background: This work presents a high-efficiency, high sensitivity, compact rectifier based on a dual-band impedance matching network that employs a simple and straightforward T-matching circuit, for sub-1 GHz license-free applications. The development of a low-cost RF energy harvester dedicated to the ISM bands is introduced. The proposed rectifier design is optimized to operate at the sub-GHz frequency bands (0.9 to 2.4 GHz), specifically those at the ISM 900 and 2400 MHz. The motivation for this band is due to the low attenuation, well-known fundamental electromagnetic theories and background, and several wireless communications are emitting at those bands, such as RFID (2). Methods: The rectifier design is based on a simple, balanced single-series diode connected with a T-matching circuit. The dual-band performance is achieved by deploying reactive elements in each branch. The full mathematical analysis and simulation results are discussed in the manuscript. (3) Results: The rectifier can achieve a 80 MHz bandwidth around 920 MHz frequency and 200 MHz around the higher band 2.4 GHz. The resultant conversion efficiency level is maintained above 45% at both bands with a peak efficiency reaches up to 70% at the higher band. The optimum terminal load attached to the circuit at which the peak efficiency is achieved, is given as 4.7 k$\Omega$. (4) Conclusion: Due to the compactness and small footprint, simple design, and simple integration with microwave circuits, the proposed rectifier architecture might find several potential applications in wireless RF energy harvesting.

1. Introduction

Energy harvesting (EH) and wireless power transmission (WPT) has become one of the promising technologies over the last two decades. The advancement and development of low-power electronics and hand-held devices have promoted researchers worldwide to devise a new platform technology to overcome the wiring limitations of plug-in electronics.

Wireless Sensor network (WSN) is the fundamental infrastructure to implement the Internet of Things (IOTs) on a large scale. This multitude network of sensors necessitates a regular energy and battery replacement of this wide array of sensors, and this is considered a tough task. Therefore, in order to have an efficient use of the sensors for the maximum possible life-time cycle, harvesting energy from ambient Radio Frequency (RF) sources is an attractive approach.

Among the popular frequency allocations exploited for WPT are the 900 MHz and 2.4 GHz ISM bands. Since the attenuation of the RF waves is inversely proportional to the frequency, the 900 MHz band yields lower losses in the power transmission. On the other hand, the 2.4 GHz band makes the implementation of the antenna and harvesters more compact and have a small footprint size [1]. Moreover, the selection of either 920 MHz and 2.4 GHz is the well-studied formulas and the accurate representation of structures at both bands. Indeed, there are several existing wireless applications that operate at both bands, for instance, GSM900, RFID, WiMAX, WiFi, and LTE2100. It is well known that the unlicensed RF spectrum is located at 900 MHz and 2.4 GHz. The two bands are free to use. The dual-band operation enables the rectifiers to extract more RF power in ambient environment from wider spectral bands and convert to dc as power supplies or for battery storage.

The WPT and EH are primarily used for wireless charging the portable electronic devices. Power harvesting is essential to supplying sensor nodes in hazardous environments and inaccessible locations. This allows the transmission of power over long distance, and requires a high-efficient loss-less circuit design.

Basically, the power harvesting circuit is composed of two main components. The first component is the antenna which receives the electromagnetic waves in the far-field region and convert it into RF signal. The RF signal is then injected to the rectifying module. The second component is the rectifier circuit which converts the RF signal into a usable DC energy. Each components of the ambient EM-harvesting system should maintain the following characteristics [2]:

• Compact, low-profile, multi-band, omnidirectional, and highly efficient antenna design.
• The matching circuit and rectifier should be compact and low profile and achieve high RF–dc conversion efficiency at the desired frequency bands.

Both modules have to provide the optimum performance to obtain the optimum peak efficiency of the energy harvesting signals. For instance, the antenna radiation efficiency should be at the extreme point and the RF–DC rectifier conversion efficiency should be as well.

Various architectures of energy-harvesting circuits were used, such as half-wave rectifier, single shunt diode, single stage voltage multiplier, and Cockcroft–Walton/Greinacher/Villard charge pump as indicated in Figure 1. The four given architectures represent the popular rectifier topologies presented in the literatures. Each component is assigned and denoted a distinct identifier. For example, C1-D1 pair represent the input-stage capacitor-diode, and Cout-D2 represents the output-stage capacitor and diode. For the multi-level configuration in Figure 1d, each Ci-Di pairs (where i denotes the stage number) represent a specific stage i. Schottky diodes have larger power handling than their CMOS counterparts. Therefore, the diode based rectification is preferable over the CMOS based rectifiers.

Charge pumps not only rectify RF to dc but also increase the voltage to a sufficient levels by means of cascaded diode-capacitor stages as the Cockcroft–Walton configuration. Each subseuqent stage uses the output of previous stage as a biasing reference and, as a result, a larger voltage can be accumulated through each stage which leads to high voltage to be generated at the output [3].

Although multilevel rectifiers offer several benefits in terms of the overall voltage and the sustainability to supply terminal loads such as batteries and RFID units, there are several flaws and troubles that arise due to the cascading of several rectification stages. For instance, the overall circuit loss is exponentially increasing, which leads to the degradation of the rectifier efficiency around low input power levels typically below 0 dBm. Indeed, the circuit footprint is significantly expanding as well. Therefore, single diode configuration is preferred for low power energy harvesting. In this manuscript, a balanced series-diode architecture is employed to achieve a balanced output DC voltage level suitable for supplying CMOS circuitry without mounting additional signal conditioning circuits. The important feature of the proposed design lies in the simple configuration and dual-band operation over 920 MHz and 2.4 GHz.

Based on the operating frequency, many rectifier architectures are classified into three categories: single-band [4,5], multi-band [6,7] and broadband [8,9]. Generally, single-band rectifier achieves a high PCE at low input power, but the amount of the collected DC output power is limited. On the other hand, broad-band rectifier aims to harvest energy from all available frequency spectrum, but inevitably sacrifices the quality-factor (Q) value of the input matching network, and thus the maximum PCE degradation. Therefore, a multi-band rectifier which selectively harvests energy from certain bands is a good solution as a trade-off between the output power and maximum PCE.

Most of the published literature focuses on the single band rectifier operation [10,11,12,13,14,15], while multiband harvesting was not widely used and its optimal rectifying strategies need further exploration. For multiband applications, the matching network connecting the antenna and rectifier can maintain good matching characteristics at the desired operating frequency bands.

In [16], a novel dual-band rectifier at 915 MHz and 1.8 GHz is presented. It provides a high power conversion efficiency (PCE) over ultra-wide input power range by adopting a pHEMT. Measured results show that more than 30% PCE is obtained with input power ranging from −20 to 20 dBm and peak PCE of 60% is maintained from 5 to 15 dBm. A dual-band RF EH working at 0.93 and 2.63 GHz using a system in a package technique fabricated using CMOS 0.18 μm was introduced in [17]. Dual-band operation is enabled with the use of a band-pass and band-stop filters. Experimental results show that the RF-to-dc conversion efficiency of 12.6% and 7% at 0.93 and 2.63 GHz, respectively, at a given input RF power $-15.4$ dBm and the load resistance 500 k$\Omega$. Furthermore, a dual-band rectifier working at 2.45 and 5.8 GHz for the ISM band was implemented based on the impedance compression network (ICN) [18]. The main drawback is that it produces a much lower efficiency at the higher frequency band. In [19], a dual-band, dual-polarized full-wave rectenna based on differential field sampling was proposed. The dual-band rectifier introduced in [19] has achieved an efficiency of 36 and 8% at the operating frequencies of 2.45 and 5.5 GHz, respectively. The efficiency is also very low at higher frequencies. The two dual-band rectifiers operating at 0.915 and 2.45 GHz for low and high power recycling was presented in [20]. The high power rectifier provides conversion efficiencies of 81.7 and 73.1% at the working frequencies. The PCEs reduces to 69.2 and 64.1% (at $-1$ dBm input power) for the low-power input rectifier.

In order to avoid the aforementioned limitations, the proposed study provides a simple dual-band (ISM-900 and ISM-2400 MHz) rectifier with maximum PCE efficiency of 60%. The rectifier gathers ambient RF energy from multiple sources with high efficiency and maintains its peak conversion efficiency over a wide incident dynamic power range.

2. Rectifier Circuit Architecture

In this section, the rectifier configuration and impedance matching circuit is illustrated. The full mathematical demonstration of both circuits is explained to show the benefits and outcomes of the proposed design.

2.1. Single-Series Diode

A single-series diode architecture is chosen as it offers a high efficiency at low power input and it also avoid the losses produced from multiple-diode configuration. It is proven that the balanced single-series diode is the best candidate to provide a balanced output voltage and RF signal noise cancellation at the input port. The schematic circuit is shown in Figure 2. There are two Schottky diodes in the upper and lower branch of the rectifier circuit, the Skyworks SMS7630-061 single diode is chosen due to its low power operation. The current is flowing in the circuit as indicated by the red arrow. The output voltage is taken across the output charging capacitor. The total output voltage is given by:

$$V_{out}=V_{in}-V_t$$

(1)

where $V_{in}$ represents the input RF signal and given by $V_{in}=Acost(\omega \times t)$ and $V_t$ indicates the total losses existing in the rectification Schottky Barrier Diodes.

The circuit represents a balance half wave rectifier and its operation is demonstrated as follows: during the positive cycle of the input waveform, the diode D1 is turned on and so is D2. The current in the circuit is flowing as indicated in Figure 2. In contrast, during the negative cycle, neither of the diodes conduct the current; therefore, the output is declined. The output capacitor C2 is used to smooth the output DC voltage and suppress any existing ripples. The balanced operation introduces a great solution to act as a potential alternative power supply for the wireless sensor node-based CMOS technology. The impedance of the rectifier input tends to be capacitive; therefore, it is compensated using an impedance matching network.

2.2. Impedance Matching Circuit

The rectifier architecture uses a single-series diode topology. A dual-band matching network operating at 900 MHz and 2.45 GHz is inserted prior the rectifier input. It is composed of a T-network in which there is a series arm represented by capacitor C and an inductance denoted by $L_2$, and the shunt branch is composed of an inductance$L_1$.

The mathematical analysis of the matching circuit is demonstrated in this section. The T-matching circuit can be represented by a two-port ABCD matrix as shown in Figure 3.

$$\left\{\begin{array}{cc}1+Z_1/Z_3& Z_1+Z_2+\left(Z_1{Z}_3\right)/Z_3\\ 1/Z_3& 1+Z_2/Z_3\end{array}\right\}\mathrm{where}{Z}_1=\frac{1}{j\omega C},Z_2=j\omega L_2,Z_3=j\omega L_1$$

(2)

after long mathematical calculation, we can derive A, B, C and D as

$$A=1-\frac{1}{{\omega }^2{L}_{1}C}B=j\frac{{\omega }^2{L}_1{L}_{2}C-(L_1+L_2)}{\omega L_{1}C}C=\frac{1}{j\omega L_1}D=1+\frac{L_2}{L_1}$$

(3)

The ABCD matrix can be used to predict the total input impedance of the matching circuit. The total input impedance of ABCD matrix is calculated by the following equation:

$$Z_{in}=\frac{A+\frac{B}{Z_o}}{C+\frac{D}{Z_o}}$$

(4)

where $Z_o$ represents the input characteristic impedance of the rectifier circuit. The resonance frequencies are given by:

$$f_1=\frac{1}{2\pi L_{2}C},f_2=\frac{L_1+L_2}{2\pi L_1{L}_{2}C}$$

(5)

As indicated in Equation (5), the two resonance frequency are tuned by the values of $L_1$, $L_2$ and C. In order to get resonance at 0.92 and 2.4, the values of matching components are given as follows: $L_1$ = 30 nH, $L_2$ = 6.5 nH and C = 0.8 pF. Those values produce typical resonance frequencies at 0.93 and 2.4 GHz, respectively. The voltage standing wave ratio (VSWR) for the matching circuit and rectifier is shown in Figure 4. The VSWR for the three conditions is demonstrated. In the first case, when the inductance $L_2$ in the matching circuit is removed. The circuit is completely matched at the 920 MHz and partially matched around 2.4 GHz. However, with removing $L_1$, the circuit offers total matching around 2.4 GHz rather than 920 MHz. By employing both inductors, the circuit provide good matching condition at either 920 MHz and 2.4 GHz. This satisfies the desired dual-band frequency operation.

3. Simulation and Experimental Results

In this section, the rectifier characterization and measurement results are discussed. A prototype circuit is fabricated on a single layer commercial FR4 substrate with a dielectric constant ${\epsilon }_r=4.4$ and thickness $h=0.8$ mm. The fabricated rectifier circuit layout is shown in Figure 5. It is implemented using differential coplanar strip line (CPS) port. The port exhibit 50 $\Omega$ input impedance that can be interfaced with the standard coaxial connector.

In order to demonstrate the rectifier performance, the efficiency definition in Equation (6) is used. Several parameters are tuned concurrently to derive the full rectifier characteristics. First, the load resistance and the input power are fixed at 5 k$\Omega$ and −5, 0, 5 dBm, respectively. Then, the frequency is changed from 0.8 to 0.95 GHz for the lower band and from 2 to 2.5 GHz at the higher band. The output voltage is evaluated, and the output conversion efficiency is estimated using the following equation:

$$\eta =\frac{P_{dc}}{P_{rf}}=\frac{V_{dc}}{{R_L}^2\times P_{rf}}\times 100\%$$

(6)

where $P_{dc}$ is the output DC power, $P_{rf}$ is the RF input power signal, and $V_{dc}$ is the output DC voltage. The comparison between the measurement and simulated results is shown in Figure 6.

The input reflection coefficient is shown in Figure 6a. As can be observed, there are two valleys in the S11 curve. The first is achieved at 920 MHz with a typical −6 dB impedance bandwidth of 80 MHz, whereas the second minimum is given at 2.4 GHz with a wider bandwidth of 300 MHz. There is no power transmission in the region between the two bands and this verifies the dual-band operation at the desired frequency ranges. It is noted that both simulation and measurements are exactly matched at both bands, with measurement results more robust than simulation.

The efficiency versus frequency curves are estimated and shown in Figure 6b,c; the curves were plotted at input power of −5 and 0, respectively. For the −5 dBm case, the simulation and measurements are slightly matched but there is a prominent difference at the lower frequency band. While the simulation results reaches up to 62%, the measurements are decreasing to 35%. This difference can be attributed to the connector losses, diode non-linearity and the fabrication tolerance.

The difference decreases when the power is maximized to 5 dBm. In this case, both lower and higher bands are greatly matched and the numerical data are approaching. When the power is raised to 5 dBm, the measured results outperform the simulation. This happens due to the optimum operating power point of the real rectifier which is shifted to the higher range of input signal strength.

The variation of efficiency with respect to the input power is shown in Figure 6d,e. The lower band performance is illustrated in Figure 6d at 920 MHz. As expected the peak efficient power of the measured results is shifted to the upper range of the input power, there is 8 dBm difference. The higher-band performance at 2.4 GHz is typically matched together with a slight shift in the input power. The peak efficiency reached up to 60% and it was achieved at 5 dBm. The power shift is due to the attenuation ohmic losses in the transmission lines which causes the diode to initialize the conduction at more higher input power values than the expected theoretical region. The metal losses are inevitable and cannot be neglected or eliminated.

The changes in efficiency with respect to the terminal load are explained in Figure 6f for the upper frequency band. The peak efficiency of 60% is achieved at an optimum terminal load of 5 k$\Omega$. It can be seen that the efficiency curves are sensitive to the change of the resistor values.

The slight mismatch is attributed to various circuit losses which were not considered during efficiency estimation. For instance, device parasitics can cause a considerable decrease in the efficiency. The diode junction resistance $R_s$ can limit efficiency of the diode as the current flowing through the diode will dissipate power in the semiconductor junction [21].

In order to reflect the benefits of the proposed rectifier, a comparative study is conducted in

Table 1. Comparison of the current work with some architectures in the literature.

	[16]	[17]	[22]	[18]	[19]	[20]	This Work
Technology	Avago 2850	CMOS 0.18um	SMS7630	HSMS 286F	HSMS2850	SMS 7630	SMS 7630
$V_{dc}$V@dBm	6.2@20	1.3@-15	0.3@-7	N/A	N/A	1@0	2.66@5
$f_c$ GHz	0.9, 1.8	0.9, 2.6	GSM1800, UMTS-1	2.45, 5.8	2.4, 5.5	0.915, 2.45	ISM 0.92, 2.4
$R_{L}k\Omega$	2.5	500	1.5	0.36	15	2.5	4.7
$\eta \%$@dBm	30@-15 to 20	37.5@13	38@-9	72@18	38@0	69@-1	65@0
Size	N/A	11.6 mm${}^2$	104 mm${}^2$	1542 mm${}^2$	1750 mm${}^2$	1880 mm${}^2$	156 mm${}^2$

. The main aspects included in the table are the technology used, rated output voltage, operating frequency, terminal load resistance, achieved overall conversion efficiency, and the prototype size. Although the design discussed in [18] achieves a prominent advantage in terms of the overall efficiency at either band, the large footprint and high power rating hinder its use for low-power energy harvesting applications. Similarly, all other designs lack either high efficiency operation or large DC voltage supply. The proposed design uses a simple configuration compared to other prototypes introduced in the literature. The other important characteristic of the proposed rectifier is the high efficiency achieved at either frequency band; the peak efficiency reaches up to 60%. Regarding prospective output voltage, the proposed rectifier can deliver a maximum output voltage of 2.66 V to a load of 4.7 k$\Omega$ at 5dBm. Such advantages qualify the proposed rectifier as a good candidate for wireless energy transfer for low-power wireless applications.

4. Conclusions

In this study, an efficient dual-band ISM RF energy-harvesting rectifier operating at 900 MHz and 2.45 GHz was optimized, characterized and the maximal performance was achieved. The proposed circuit could efficiently harvest power from a dedicated microwave source that emits a signal with an input power ranging from −15 to 20 dBm. The proposed system achieved a power conversion efficiency of more than 60% over the lower and higher frequency band. The significant merit of the proposed design is the simplicity of circuit-design and single-layer fabrication.