Next Article in Journal
Performance Improvement of DAG-Aware Task Scheduling Algorithms with Efficient Cache Management in Spark
Previous Article in Journal
A 1.55-to-32-Gb/s Four-Lane Transmitter with 3-Tap Feed Forward Equalizer and Shared PLL in 28-nm CMOS
 
 
Article

Article Versions Notes

Electronics 2021, 10(16), 1875; https://doi.org/10.3390/electronics10161875
Action Date Notes Link
article xml file uploaded 4 August 2021 12:55 CEST Original file -
article xml uploaded. 4 August 2021 12:55 CEST Update https://www.mdpi.com/2079-9292/10/16/1875/xml
article pdf uploaded. 4 August 2021 12:55 CEST Version of Record https://www.mdpi.com/2079-9292/10/16/1875/pdf
article html file updated 4 August 2021 12:57 CEST Original file -
article html file updated 27 July 2022 08:09 CEST Update https://www.mdpi.com/2079-9292/10/16/1875/html
Back to TopTop