Analysis of a Wide Voltage Hybrid Soft Switching Converter

Abstract

A hybrid PWM converter is proposed and investigated to realize the benefits of wide zero-voltage switching (ZVS) operation, wide voltage input operation, and low circulating current for direct current (DC) wind power conversion and solar PV power conversion applications. Compared to the drawbacks of high freewheeling current and hard switching operation of active devices at the lagging-leg of conventional full bridge PWM converter, a three-leg PWM converter is studied to have wide input-voltage operation (120–600 V). For low input-voltage condition (120–270 V), two-leg full bridge converter with lower transformer turns ratio is activated to control load voltage. For high input-voltage case (270–600 V), PWM converter with higher transformer turns ratio is operated to regulate load voltage. The LLC resonant converter is connecting to the lagging-leg switches in order to achieve wide load range of soft switching turn-on operation. The high conduction losses at the freewheeling state on conventional full bridge converter are overcome by connecting the output voltage of resonant converter to the output rectified terminal of full bridge converter. Hence, a 5:1 (600–120 V) hybrid converter is realized to have less circulating current loss, wide input-voltage operation and wide soft switching characteristics. An 800 W prototype is set up and tested to validate the converter effectiveness.

1. Introduction

For past years, clean and sustainable energy has received increased attention to reduce greenhouse gas emissions and fossil energy demand. Photovoltaic (PV) solar cell, fuel cell stacks, and DC wind power are attractive sustainable energy sources as they are cost-effective [1,2,3,4]. The main drawback of these sustainable energy sources is that the output DC or AC voltage is not constant. To solve this problem, the soft switching high-frequency DC-DC converters have been developed by using switching frequency modulation [5,6], pulse-width modulation (PWM) [7,8,9,10], active clamp PWM [11,12], and asymmetric PWM [13,14] schemes. The main drawbacks of active clamp PWM and asymmetric PWM schemes are the unbalance current and voltage stresses on the rectifier diodes. In resonant converters, the operating switching frequency depends on the load power and input voltage so that the load voltage is controlled by frequency modulation. However, the wide output-voltage variation of sustainable energy sources will result in wide switching frequency deviation in resonant converters. In PWM scheme, the duty ratio (or duty cycle) on active devices or input leg voltage of PWM converter depends on input voltage. Thus, the duty cycle of PWM converter can be regulated to countract input voltage variation. Generally, the maximum (minimum) effective duty ratio d_eff,max (d_eff,min) is related to minimum (maximum) input voltage V_in,min (V_in,max). Due to duty loss problem at the freewheeling state on conventional phase-shift PWM converter, the effective duty ratio d_eff is usually designed to be greater than 0.15 and less than 0.45. Hence, input voltage variation will be limited at V_in,max/V_in,min = d_eff,max/d_eff,min < 3 on conventional phase-shift PWM operation. As the voltage deviation from PV panels and DC wind generator outputs may be greater than 3, the cascaded or parallel-connected circuit structures [15,16,17] have been developed to overcome this problem. However, the low efficiency is the main problem of cascaded PWM converters. In serial- and parallel-connected circuit topology with wide voltage operation in [15,16], the component counts, high circulating current, and the complicated control algorithm are the main disadvantages. However, the maximum voltage deviation in [15,16,17] is still less than 4 (V_in,max/V_in,min < 4). The DC converters with more than 5 (V_in,ma/V_in,min > 5) wide voltage capability are normally demanded for renewable energy.

A hybrid converter with a three-leg phase-shift PWM circuit and a LLC circuit are presented and realized to have benefits of wide load range of zero voltage switching (ZVS), less circulating current loss, and wide input voltage capability (120–600 V). On the basis of input voltage, two sub-circuits are selected to operate in order to overcome wide input-voltage deviation. One AC switch is adopted to select one of two sub-circuits under low or high input-voltage condition. Therefore, a 5:1 (V_in,max = 5 V_in,min) wide input voltage hybrid converter is achieved. The phase-shift PWM approach is used to control output voltage. Power devices at the leading leg can be easily turned on at ZVS because the output inductor energy is used to release energy stored on output capacitor of active devices. The hard switching disadvantage of lagging-leg active devices in conventional full bridge converter is overcome by connecting a LLC resonant circuit to the lagging-leg active devices. Therefore, the lagging-leg active devices are turned on at ZVS. In circuit implementation, a Schmitt comparator with a ±30 V hysteresis range is adopted to select the appropriate sub-circuit under high or low voltage input operation. The control scheme can be easily implemented by using logic gates, comparator, and phase-shift PWM integrated circuit. The benefits of the studied hybrid zero-voltage switching (ZVS) converter are confirmed by an 800 W experimental prototype.

2. Structure of the Proposed Converter

The converter diagram of conventional full bridge PWM converter is given in Figure 1a. The main benefit of full bridge PWM converter is ZVS operation on S₁ and S₂ (leading-leg switches). However, the full bridge PWM converter has several drawbacks. such as hard switching operation on S₃ and S₄ (lagging-leg switches) and high primary current loss at the freewheeling state v_ab = 0 when S₁ and S₃ are ON or S₂ and S₄ are ON. Therefore, serious switching losses can be generated at the lagging leg and high conduction losses will be generated on the primary side under low duty cycle condition. To overcome hard switching loss, a LLC resonant circuit (L_r T₂, C_r, D₃, D₄, C_LLC and D₅) remark in red (Figure 1b) is adopted and connected to the lagging-leg switches. As LLC resonant circuit is operated at constant frequency (f_sw = f_r resonant frequency of L_r and C_r), active devices S₃ and S₄ can achieve ZVS operation. The other drawback of conventional PWM converter in Figure 1a is the serious circulating current loss at the freewheeling state v_ab = 0. To solve this problem, diode D₅ is used to connect two voltage terminals V_o,LLC and V_R on the secondary side. Therefore, the secondary rectified voltage V_R is positive in Figure 1b instead of V_R = 0 in Figure 1a during the freewheeling interval. During the forward power flow from V_in to V_o, the primary-side leg voltage |v_ab| ≈ V_in and the secondary rectified voltage V_R ≈ V_inn_s /n_p1 > V_o,LLC. Thus, diode D₅ is reverse biased. Diode D₅ is forward biased during the freewheeling interval (v_ab = 0). Because D₅ is conducting, the energy on C_LLC is transferred to V_o at the freewheeling state. In the freewheeling interval, the rectified voltage V_R = V_o,LLC > 0, the primary inductor voltage V_LR = −(n_p1/n_s1)V_o,LLC, and the primary current i_LR are decreased. For some renewable energy power conversions for solar power or wind power applications, the DC converters with wide voltage operation capability are needed in order to counteract wide input voltage variation. Conventional full bridge PWM converter can operate well with narrow voltage variation, such as V_in,max/V_in,min < 3. For more wide voltage deviation, the conventional full bridge PWM circuit cannot achieve this demand. To achieve wide voltage deviation request, three leg PWM converter is adopted and shown in Figure 1c. Comparing the circuit diagrams in Figure 1b,c, it can be noted, one more switch leg with components S₁, S_2, and Q remark in blue is adopted in the presented circuit. The transformer T₁ has four winding turns n_p1, n_p1, n_s1, and n_s1. Switch Q is used to control turns ratio of T₁ under the different input voltage regions.

When 120 V ≤ V_in < 270 V (low voltage region, V_in,L), the proposed converter with high voltage gain is requested to keep load voltage constant. Therefore, active devices Q, S_1, and S₂ are OFF, as shown in Figure 2a. Only S₃–S₆ are activated to regulate V_o. Circuit S₃–S₆, T₁, L_R, D₁, D_2, and L_o are activated as the full bridge phase-shift PWM converter. The leading-leg active devices S₃ and S₄ can easily turn on at ZVS operation. The turns-ratio of T₁ is n_p1/n_s1 under low voltage input range. Circuit structure with components S₅, S₆, T₂, L_r, C_r, D₃, D_4, and C_LLC is operated as the LLC series resonant converter. Due to the resonant behavior, the lagging leg active devices S₅ and S₆ are turned on at ZVS. When 270 V ≤ V_in < 600 V (high voltage region, V_in,H), Q is ON and S₃ and S₄ are OFF, as shown in Figure 2b. S₁, S₂, S_5, and S₆ are activated to control load voltage V_o. Circuit structure with components S₁, S₂, S₅, S₆, T₁, L_R, D₁, D_2, and L_o are activated as the full bridge phase-shift PWM circuit. The leading-leg active devices S₁ and S₂ turn on at ZVS. The turns-ratio of T₁ in Figure 2b is 2n_p1/n_s1 under high voltage input range. Due to LLC circuit connected to the lagging leg, S₅ and S₆ are turned on at ZVS. From the previous discussion, it is clear that the presented hybrid converter has soft switching operation, wide input-voltage operation (V_in,max/V_in,min = 5), and less primary current at the freewheeling state.

3. Principle of Operation

If V_in is in the low voltage region (V_in,L = 120–270 V), active devices Q, S_1, and S₂ are all turned off. Power switches S₃–S₆ and passive components T₁, L_R, D₁, D_2, and L_o are operated with PWM approach to control load voltage V_o. LLC resonant circuit with components S₅, S₆, T₂, L_r, C_r, D₃, D_4, and C_LLC is operated with fixed switching frequency to achieve ZVS operation of S₅ and S₆. It is assumed the inductances L_m1 = L_m2 >> L_R and capacitances C_S1 = … = C_S6 = C_oss. The PWM waveforms under the low input-voltage region are given in Figure 3a. One can observe that there are six states (Figure 3b–g) in each half switching cycle. The PWM waveforms are symmetrical in every half switching period. To simplify the system analysis, only the operating states in the first half switching period are stated in this section.

State 1 [t₀ ≤ t < t₁]: In state 1, S₃ and S₆ are in the on-state and leg voltage v_bc = V_in. LLC converter is controlled at the resonant frequency. As S₆ is in the on-state, i_Lr decreases and i_Lr < i_Lm,T2. The secondary diodes D₁ and D₄ are forward biased. The drain voltages v_CS4 = v_CS5 = V_in and the diode voltages v_D2 ≈ 2 × V_in/(n_p /n_s1) and v_D3 ≈ 2 V_o,LLC. The currents i_Lo and i_LR are expressed in Equations (1) and (2):

$$i_{Lo}(t)\approx i_{Lo}(t_0)+\frac{\frac{V_{in}}{n_{p1}/n_{s1}}-V_o}{L_o}(t-t_0)$$

(1)

$$i_{LR}(t)\approx i_{LR}(t_0)+\frac{V_{in}-\frac{n_{p1}{V}_o}{n_{s1}}}{{(n_{p1}/n_{s1})}^2{L}_o}(t-t_0)$$

(2)

State 2 [t₁ ≤ t < t₂]: At t₁, S₃ turns off. As i_LR(t₁) > 0, C_S4 is discharged by i_LR after time t₁. If the inductor energy $[L_R+{(n_{p1}/n_{s1})}^2{L}_o]i_{LR}^2(t_1)>2C_{oss}{V}_{in}^2$, v_CS4 is decreased and will be equal to 0 at t₂. The discharged time of C_S4 is expressed as:

$$\mathsf{\Delta }{t}_{12}\approx (2V_{in}{C}_{oss}{n}_{p1})/(I_o{n}_{s1})$$

(3)

LLC converter is still controlled at the resonant mode to distribute power from V_in to V_o,LLC.

State 3 [t₂ ≤ t < t₃]: At t₂, v_CS4 is decreased and equal to zero voltage. Since i_LR(t₂) > 0, D_S4 is conducting and S₄ can turn on to have soft switching operation. Due to v_bc = 0, the diode D₅ becomes forward biased and the rectified voltage V_R is clamped at V_o,LLC. Therefore, the inductor voltages v_LR = −n_p1V_o,LLC/n_s1 < 0 and v_Lo = V_o,LLC − V_o < 0. i_LR and i_Lo are decreased in this state.

$$i_{Lo}(t)\approx i_{Lo}(t_2)+\frac{V_{o,LLC}-V_o}{L_o}(t-t_2)$$

(4)

$$i_{LR}(t)\approx i_{LR}(t_2)-\frac{n_{p1}{V}_{o,LLC}}{n_{s1}{L}_R}(t-t_2)$$

(5)

However, the conventional full bridge converter has v_LR ≈ 0 and i_LR ≈ constant in this state (freewheeling state). Therefore, the conventional full bridge PWM converter has more circulating current loss in this state. In Equation (5), one can observe the primary current i_LR is decreased at freewheeling state in the proposed converter. If the time interval at freewheeling state is long enough, the diode current i_D1 or the primary current i_LR can be declined to zero.

$$\mathsf{\Delta }{t}_{i_{LR}=0}\approx L_R{I}_o/[{(n_{p1}/n_{s1})}^2{V}_{o,LLC})$$

(6)

The time Δt_iLp=0 is related to L_R, V_o,LLC, and I_o. Thus, more freewheeling time duration is required at full load to eliminate the circulating current.

State 4 [t₃ ≤ t < t₄]: At t₃, i_D1 = 0 and i_LR ≈ 0. The diode current i_D5 = i_Lo. Thus, the circulating current of i_LR is almost removed at freewheeling state (v_bc = 0). The inductor voltage v_Lo = V_o,LLC − V_o < 0 so that i_Lo decreases.

State 5 [t₄ ≤ t < t₅]: S₆ is turned off at t₄. Since i_Lr(t₄) − i_LR(t₄) is negative, C_S5 will be discharged. In LLC converter, D₃ becomes forward biased as i_Lr > i_Lm,T2 after time t₄. C_S5 will be discharged to zero voltage at t₅.

State 6 [t₅ ≤ t < t₆]: State 6 starts at time t₅ when v_CS5 is declined to zero. Due to i_LR(t₅) − i_Lr(t₅) > 0, D_S5 becomes forward biased. Then, S₅ can be turned on after time t₅ to realize soft switching operation. In this state, v_bc = −V_in and D₂ becomes forward biased. Owing to i_D2(t₅) < i_Lo(t₅), D₅ is conducting and V_R = V_o,LLC. The inductor voltage v_LR ≈ n_p1V_o,LLC/n_s1 − V_in < 0 and the primary current i_LR decreases in this state. At the end of state 6, the diode current i_D2 is equal to i_Lo so that D₅ becomes reverse biased and the primary current i_LR ≈ − n_s1i_Lo/n_p1. The time duration of state 6 is obtained and expressed in Equation (7):

$$\mathsf{\Delta }{t}_{56}\approx I_o{L}_R/[n_{p1}(V_{in}-n_{p1}^{}{V}_{o,LLC}/n_{s1})/n_{s1}]$$

(7)

Since D₅ is forward biased, the duty loss in state 6 is calculated in Equation (8):

$$d_6\approx f_{sw}{I}_o{L}_R/[n_{p1}(V_{in}-n_{p1}^{}{V}_{o,LLC}/n_{s1})/n_{s1}]$$

(8)

In this state, v_Lo = V_o,LLC − V_o < 0 so that i_Lo decreases. At time t₆, the converter goes to the next half switching period.

When V_in is in the high voltage region (V_in,L = 270 V–600 V), Q is turned on and S₃ and S₄ are turned off. Switches S₁, S₂, S_5, and S₆ and passive components T₁, L_R, D₁, D_2, and L_o are controlled by phase shift PWM scheme. Components S₅, S₆, T₂, L_r, C_r, D₃, D_4, and C_LLC are operated as the LLC resonant circuit to have ZVS operation of S₅ and S₆. The turns ratio of full bridge converter under the high input-voltage region is 2n_p1/n_s1 in Figure 2b. Figure 4a shows PWM waveforms for high voltage input region. Figure 4b–g provides the equivalent state circuits for first half switching period.

State 1 [t₀ ≤ t < t₁]: In this state, switches S₁ and S₆ are ON and the leg voltage v_ac = V_in. LLC converter (S₆, L_r, T₂, C_r, D_4, and C_LLC) is operated at the resonant frequency. On the secondary side, D₁ and D₄ are conducting. The drain voltages v_CS2 = v_CS5 = V_in and the diode voltage stresses v_D2 ≈ V_inn_s1/n_p1 and v_D3 ≈ 2V_o,LLC. The inductor currents i_Lo and i_LR are increased and i_Lr is decreased in this state.

State 2 [t₁ ≤ t < t₂]: At t₁, switch S₁ is turned off. Owing to i_LR(t₁) > 0, i_LR discharges C_S2. If the inductor energy $[L_R+{(2n_{p1}/n_{s1})}^2{L}_o]i_{LR}^2(t_1)>2C_{oss}{V}_{in}^2$, then C_S4 can be completely discharged to zero voltage.

State 3 [t₂ ≤ t < t₃]: At t₂, v_CS2 = 0. Since i_LR(t₂) > 0, D_S2 conducts and S₂ is turned on at ZVS. In this state, the leg voltage v_ac = 0 so that D₅ is forward biased. Therefore, the rectified voltage V_R = V_o,LLC, v_LR = −2 × n_p1V_o,LLC/n_s1 < 0 and v_Lo = V_o,LLC – V_o < 0. The inductor currents i_Lr, i_Lo, and i_LR are all decreased in state 3. If the primary currents i_LR or i_D1 can be declined to zero, then the necessary time interval of the freewheeling state at the high input-voltage region is derived as:

$$\mathsf{\Delta }{t}_{i_{LR}=0}\approx L_R{I}_o/[{(2n_{p1}/n_{s1})}^2{V}_{o,LLC})$$

(9)

If i_D1 = 0 at t₃, then the circuit operation goes to state 4. If i_D1 is not equal to zero at the end of the freewheeling state, then the circuit goes to state 5.

State 4 [t₃ ≤ t < t₄]: At t₃, i_D1 = 0. One can observe i_D5 = i_Lo and the primary current i_LR is approximately equal to zero when v_ac = 0 (freewheeling state). Since D₅ is conducting, power is delivered to V_o through LLC resonant converter in state 4.

State 5 [t₄ ≤ t < t₅]: At t₄, S₆ turns off. Owing to i_LR(t₄) − i_Lr(t₄) > 0, C_S5 will be discharged. In LLC circuit, D₃ is conducting. At t₅, v_CS5 is decreased to zero voltage.

State 6 [t₅ ≤ t < t₆]: At t₅, v_CS5 = 0. Owing to i_LR(t₅) − i_Lr(t₅) > 0, D_S5 is conducting. Thus, S₅ is turned on at ZVS. In state 6, v_ac = −V_in and D₂ is forward biased. Due to i_D2(t₅) < i_Lo(t₅), D₅ is still conducting and V_R = V_o,LLC. The primary inductor voltage v_LR ≈ 2n_p1V_o,LLC/n_s1 − V_in < 0 and i_LR decreases. At the end of state 6, the diode current i_D2 = i_Lo so that D₅ is conducting. The duty loss at state 6 under the high input-voltage region is obtained as:

$$d_6\approx f_{sw}{I}_o{L}_R/[2n_{p1}(V_{in}-2n_{p1}^{}{V}_{o,LLC}/n_{s1})/n_{s1}]$$

(10)

At time t₆, the converter goes to the next half switching period.

4. Circuit Characteristics

A three-leg full bridge circuit and a LLC resonant circuit are included in the studied converter. Both PWM circuit and LLC circuit will achieve power transfer from V_in to V_o. LLC circuit is controlled at constant frequency. Thus, the secondary-side voltage V_o,LLC is calculated in (11):

$$V_{o,LLC}=V_{in}{n}_{s2}/(2n_{p2})$$

(11)

At the freewheeling state, the primary-side leg voltage v_ac or v_bc is zero and diode D₅ is forward biased. Thus, the rectifier terminal voltage V_R = V_o,LLC. The primary inductor voltage v_LR= −n_p1V_o,LLC/n_s1 (low input-voltage region) or v_LR= −2 × n_p1V_o,LLC/n_s1 (high input-voltage region) and the primary current i_LR will decrease to zero at the freewheeling state. Due to LLC circuit is controlled under the inductive impedance, S₅ and S₆ can turn on at zero voltage. Due to voltage-second balance on L_o, V_o is derived in (2).

$$V_o=\frac{k{d}_{eff}{V}_{in}}{n_{p1}/n_{s1}}+\frac{(1-2d_{eff})V_{in}}{2n_{p2}/n_{s2}}$$

(12)

d_eff is the effective duty cycle and k = 1 (or 2) under the high (or low) input-voltage region. From Equation (12), the proposed converter has a voltage gain as Equation (13).

$$G_{dc,proposed}=\frac{V_o}{V_{in}}=\frac{k{d}_{eff}}{n_{p1}/n_{s1}}+\frac{(1-2d_{eff})}{2n_{p2}/n_{s2}}$$

(13)

If the proposed converter does not use LLC resonant circuit at lagging-leg (S₅ and S₅), then the voltage gain of three-leg converter without LLC converter is derived as:

$$G_{dc,con}=\frac{V_o}{V_{in}}=\frac{k{d}_{eff}}{n_{p1}/n_{s1}}$$

(14)

The voltage gains of the presented circuit and conventional PWM converter are compared and provided as:

$$\frac{G_{dc,proposed}}{G_{dc,con}}=1+\frac{n_{p1}(1-2d_{eff})/n_{s1}}{2n_{p2}k{d}_{eff}/n_{s2}}>1$$

(15)

From Equation (15), the presented circuit has a much larger voltage gain. The power ratings of LLC circuit and full bridge circuit in the presented converter are given as:

$$P_{LLC}=(1-2d_{eff})V_{o.LLC}{I}_o\approx (1-2d_{eff})V_{in}{I}_o/(2n_{p2}/n_{s2})$$

(16)

$$P_{full-bridge}=\frac{2d_{eff}{V}_{in}{I}_o}{n_{p1}/n_{s1}}$$

(17)

In steady state, the ripple currents Δi_Lo of conventional PWM converter and the presented converter are expressed as

$$\mathsf{\Delta }{i}_{Lo,con}>\frac{V_o(0.5-d_{eff})}{L_o{f}_{sw}}$$

(18)

$$\mathsf{\Delta }{i}_{Lo,proposed}\approx \frac{(V_o-V_{o,LLC})(0.5-d_{eff})}{L_o{f}_{sw}}$$

(19)

From Equations (18) and (19), the ripple current comparison is given as.

$$\frac{\mathsf{\Delta }{i}_{Lo,proposed}}{\mathsf{\Delta }{i}_{Lo,con}}=1-V_{o,LLC}/V_o<1$$

(20)

That means the presented converter has less ripple current Δi_Lo. The voltage ratings of S₁−S₆ and Q are equal to V_in,max. The voltage rating of D₁ and D₂ is approximately equal to V_in,max/(n_p1/n_s1). Similarly, the voltage rating of D₃ and D₄ is approximately equal to V_in,max/(n_p2/n_s2). The voltage stress of D₅ is V_in,max/(n_p1/n_s1) − V_in,max/(n_p2/n_s2). The DC diode currents of D₁–D₅ are $I_{D1}=I_{D2}\approx d_e{I}_o$, $I_{D3}=I_{D4}\approx (0.5-d_e)I_o$ and $I_{D5}\approx (1-2d_e)I_o$.

5. Experimental Results

The laboratory prototype with a rated power P_o = 800 W is built and tested. The circuit components of the laboratory prototype are provided in

Table 1. Circuit parameters in the laboratory prototype.

Items	Parameter	Items	Parameter
Vin	120–600 V	Lo	30 μH
Vo	48 V	S1~S6, Q	STF15N95K5
Po	800 W	D1~D4	MBR40500PT
fsw	70 kHz	D5	STTH2003CT
Co	640 μF/100 V	np1:ns1	16:10
Co,LLC	240 μF/100 V	np2:ns2	22:2
Cr	205 nF	Lm1,T1, Lm2,T1	259 μH
Lr	27 μH	Lm,T2	135 μH

. Figure 5 gives the control block of the studied converter. The general purpose PWM integrated circuit UCC3895 is selected to generate the necessary PWM waveforms to drive the leading and lagging leg switches. A comparator with ±30 V voltage tolerance is adopted in control block to decide low voltage input or high voltage input range. The reference voltage of Schmitt voltage comparator is designed at 270 V. Thus, the actual low and high voltage input ranges are V_in,L=120–300 V and V_in,H = 240–600 V. Figure 6 gives the experimental test bench. The digital oscilloscope Tektronix TDS3014B, the dc electronic load Chroma 63112A, and the dc power source Chroma 62016P-600-8 are used in the laboratory test to measure the experimental results. Figure 7 provides the experimental results at the low voltage region (V_in,L = 120–300 V) and full load. Figure 7a,b gives the experimental PWM signals of S₃~S₆ for 120 and 300 V, respectively. The leg voltage v_bc, primary currents i_LR and i_Lr, and resonant voltage v_Cr under 120 V input case are provided in Figure 7c. Similarly, the measured waveforms of v_bc, i_LR, i_Lr, and v_Cr under 300 V input case are shown in Figure 7d. Comparing Figure 7c,d, the leg voltage v_bc at V_in = 300 V has less duty ratio. Since the secondary-side voltage V_o,LLC is connected to the rectified terminal V_R, the inductor voltage v_LR at the circulating state is negative and i_LR will decrease to zero in this state. Figure 7e,f demonstrates the measured waveforms of i_D1, i_D2, i_D5, and i_Lo for V_in = 120 and 300 V cases. One can observe that the PWM converter has less duty cycle and more ripple current Δi_Lo on L_o under V_in = 120 V input case in Figure 7d,f. Figure 8a provides the PWM signals of S₃ (the leading-leg switch) at V_in = 120 V input and P_o = 20% rated load. In the same manner, the measured PWM waveforms of S₃ at V_in = 120 V input and P_o = 100% rated load are provided in Figure 8b. Figure 8c,d illustrates the test waveforms of S₃ under V_in = 300 V input and 20% and 100% rated loads, respectively. The PWM waveforms of S₅ for different input voltages (V_in = 120 and 300 V) and different loads (20% and 100% loads) are provided in Figure 8e–h. From Figure 8, it is clear that active switches S₃ and S₅ can both turn on at ZVS for 120 and 300 V input cases. Likewise, the test waveforms at high voltage input (V_in = 240–600 V) and the rated power are given in Figure 9. Since S₃ and S₄ are off under high voltage input condition, only PWM waveforms of S₁, S₂, S_5, and S₆ are shown in Figure 9a,b for 240 and 600 V, respectively. The measured leg voltage v_ac, primary currents i_LR and i_Lr and resonant voltage v_Cr for 240 and 600 V inputs are given in Figure 9c,d, respectively. It can be noted in Figure 9d, i_LR will decrease to zero during the circulating interval. The experimental waveforms of i_Lo, i_D5, i_D2, and i_D1 for V_in = 240 and 600 V are illustrated in Figure 9e,f. The hysteresis voltage comparator is used in the control block and the reference voltage is designed at 270 V with ±30 V voltage tolerance. Figure 10a,b shows the PWM signals of S₁ under 240 V input and different load conditions (20% and 100% rated loads). Figure 10c,d provides the test waveforms of S₁ under 600 V input and different loads (20% and 100% loads). The PWM signals of S₅ at different input voltages (V_in = 240 and 600 V) and different load conditions (20% and 100% loads) are provided in Figure 10e–h. It can be noted that S₁ and S₅ all turn on under zero voltage. Figure 11 gives the test PWM waveforms of Q, S_1, and S₃ during the input voltage variation between V_in = 120 and 600 V. When V_in increases from 120 to 600 V, Q turns on and S₃ turns off at V_in = 300 V. At the same time, S₁ is activated at V_in > 300 V. On the other hand, Q and S₁ turn off and S₃ is activated at V_in = 240 V when V_in decreases from 600 to 120 V. The measured efficiencies of the proposed converter at the rated power are 89.7%, 91.2%, 90.9%, and 93.4% under V_in = 120, 240, 300. and 600 V, respectively. Using thermal imaging camera FLIR E85, the measured junction and case temperatures of power MOSFET S₅ at the rated power are 98 °C and 85 °C. The junction and case temperatures of rectifier diode D₁ are 102 °C and 90 °C. The measured core and winding temperatures of filter inductor L_o with MPP core CM343125 are 87 °C and 82 °C, respectively, at the rated power.

6. Conclusions

A hybrid PWM converter is presented and investigated to achieve wide voltage operation (V_in = 120–600 V), ZVS operation for all active devices and low primary current loss at the freewheeling state. To solve high circulating current drawback in conventional full bridge converter, a DC voltage comes from a LLC circuit is used at the secondary rectified terminal. Thus, the primary inductor voltage is negative and the circulating current will reduce to zero during freewheeling state. The other drawback of conventional PWM converter is serious switching loss on lagging leg devices. The added LLC circuit shares the same lagging-leg devices as PWM circuit to help the lagging-leg active devices to be turned on at zero voltage. Three-leg PWM circuit structure is used to achieve wide voltage input operation. The circuit performance is provided through the experimental results.