1. Introduction
The FOPID control is one of the main areas of application of fractional calculus in automatic control. The book [
1] describes the issue of fractional-order systems very well, from theory to practice. The next step in utilizing this control is hardware implementation. Therefore, many implementations have been presented, including the Microcontroller, Field Programmable Gate Array, Field Programmable Analog Array, and Switched Capacitor. A good extension is the book [
2] presenting further applications, including, for example, electrochemistry.
It is known that fractional calculus is not a new idea. It has been analysed by mathematicians since the XVII century, but later it was forgotten due to difficulties in its application in solving real problems in physics and engineering. Fractional calculus is also the main topic of the fundamental book [
3]. Its theoretical introduction contains information about both classical and fractional-order discrete calculus. In the following parts of the book, a lot of emphasis is placed on digital image processing. The book [
4] also describes many uses of fractional-order control, such as coupled tank systems or MAGLEV.
Several studies have compared FOPID and PID using different quality indicators. In the article [
5], a comparison of both controllers was done for selected MIMO systems with a delay. In [
6], the same comparison was made, but in the hardware implementation (Arduino Uno) using the Nelder-Mead method for both optimizations. The authors indicated a much faster settling and rise time for the FOPID controller than its classical counterpart.
One of the microcontroller implementations of FOPID is described in [
7]. The controller was used for speed control of the buck converter-fed DC motor. The authors noted that FOPID performed better than standard PID. It was also indicated that the control energy required to control the speed of the DC motor was less than in the typical PID implementation. The article [
8] describes the use of fractional-order for feedback control of the DC motor speed. The hardware realization was proposed in digital form with the microprocessor based on Bode’s ideal control loop.
Tuning of FOPID still causes some difficulties. In the article [
9], the authors formulated the optimization problem with three objective functions, including the integral of absolute error (IAE), absolute steady-state error, and settling time. Many methods were compared, including: multi-objective extremal optimization (MOEO), genetic algorithm (GA), particle swarm optimization (PSO), and chaotic antiswarm (CAS). Another article that deals with tuning is [
10]. The authors decided to use two methods for systems with discrete time. The controller was tested on three simulation examples and one experiment using a DC motor and PWM control.
Microcontroller implementations of FOPID have not been thoroughly analyzed from real-time requirements’ and frequency properties’ point of view. The paper [
11] presents analysis of real-time properties of FO elements implemented at PLC. Article [
12] is another example of a real-time implementation of FOPID. The authors focused on examining control performance, disturbance rejection properties, and the trajectory tracking ability of the system. The frequency properties are presented in the article [
13]. It compares Oustaloup, refined Oustaloup, and Matsuda approximations. Additionally, the authors focused on time domain and stability analysis.
There are many examples of the use of the hard real-time FO control system. One of the m is given in article [
12]. It presents LabView implementation of the controller for the magnetic levitation (MAGLEV) system. Other examples of the use of FOPID in MAGLEV are presented in [
14,
15]. The FOPID controller was also used in [
16] for the full control of quadrotors (attitude and position).
The digital implementation of the fractional order requires application of its discrete, finite-dimensional approximations. The most typical are: fractional-order Backward Difference (FOBD) approximation (directly derived from the Grünwald-Letnikov definition) and CFE approximation. The accuracy of CFE is a little bit worse than PSE, but its numerical complexity is significantly smaller due to relatively the low order of the discrete transfer function describing it. Both methods are analyzed in this paper. The accuracy of FOPID implementation using both methods is deeply analysed in the paper [
17].
This paper presents the analysis of real-time and frequency properties of the FOPID controller implemented at the typical microcontroller platform. The FOPID is implemented with the use of the most typical discrete approximations: FOBD and CFE. For these implementation step responses, Bode diagrams and basic real-time properties are estimated and compared. Such an analysis has not been presented yet.
The paper is organized as follows: at the beginning, elementary ideas and definitions are recalled. The CFE approximation, the discrete GL operator, and analytical formulae of step and frequency responses are presented too. Afterwards, the experimental platform and tests are presented and discussed.
3. The Experimental Microcontroller Platform
The diagram of the embedded system used in experiments is shown in
Figure 1. The STM32F767ZI device is based on the high-performance Arm® Cortex®-M7 32-bit RISC core operating at up to 216 MHz frequency. The Cortex®-M7 core features a floating point unit (FPU) which supports Arm® double-precision and single-precision data-processing instructions and data types. It also implements a full set of DSP instructions. The embedded system was tested using the following peripheral blocks integrated in the structure: SRAM memory for storing data tables, timer/counter units capable of interrupts, and a serial port UART. The processed data are duly transmitted (via an UART port), monitored, and uploaded to a PC. The FOPD and CFE algorithms were run in the timer interrupt procedure of the STM32 timer.
The Logic Analyzer of the Logic Pro 16 (Saleae Corp.) was used to monitor and collect digital information from digital I/Os of the embedded system. Two digital outputs pin of the STM32F767ZI processor were used to measure the time duration of the approximation of the digital fractional-order differentiator/integrator and one step-time duration of the differentiator/integrator unit step response . The accuracy of time measurement is 20 ns (50 MSample/s). All data were saved as specific log files to be analyzed off-line.
In the target application, the CPU clock frequency of the STM processor was set to 216 kHz. The UART port’s baud rate was bits/s. Response data of integral and derivative terms, the total response of the FOPID controller, and input signal were logged on the computer. Including the transmission frame header, 10 bytes were transmitted, which took about ms.
The approximation coefficients of the derivative and integrating parts of the FOPID controller were determined once during the initialization procedure of the processor. The variables of the double type were used to represent all application parameters. In fact, two functions were created to calculate CFE and FOBD parameters:
doubledfodCFE( uint8_tn, doubleT, doublea, doubler, double*CFE_Num, double*CFE_Den );
voiddfodPSE( uint16_tL, doubleT, doubler, double*PSE_Coeffs );
where n is an order of truncation equal to: 1, 2, 3, 4, or 5; T is a sampling period in [s]; a is a weighting factor between the range 0 <= a <= 1 (e.g.,: 0-Euler rule, 1-Tustin rule); r is an approximated fractional-order (); CFE_Num-transmittance numerator coefficients of CFE approximation; CFE_Den-transmittance denominator coefficients of CFE approximation; L is an order of truncation ( is recommended) and PSE_Coeffs – FOPD approximation coefficients.
FOPID inputs were generated in the timer interrupt handler. In the same procedure, the time response of the controller to input step and sine was calculated. The numerical procedure used to calculate both versions of the FOPID controller (CFE, FOBD), besides the standard arithmetic operators, requires shift and iterative operations. In the first case, the memcpy function of the c language was used, while in the second, the for. An example code used to calculate the FOBD output is as follows:
// **************************************************************************
for( uint16_t j=0; j <= L_PSE; j++)
{
y_PSE_Der[L_PSE] = y_PSE_Der[L_PSE] + PSE_Coeff_Der[j]*u_PSE[L_PSE-j];
y_PSE_Int[L_PSE] = y_PSE_Int[L_PSE] + PSE_Coeff_Int[j]*u_PSE[L_PSE-j];
}
// Calculation of the derivative, integral, and FOBD outputs.
Yout_Der = Td*( 1.0/pow(T,FracOrder_Der) )*y_PSE_Der[L_PSE]; // Derivative
Yout_Int = Ti*( 1.0/pow(T,FracOrder_Int) )*y_PSE_Int[L_PSE]; // Integral
Y_PID = Kp*u_PSE[L_PSE] + Yout_Int + Yout_Der; // FOBD
// Shifting the vectors of outputs and control:
memcpy( y_PSE_Der, y_PSE_Der+1, L_PSE*sizeof(double));
memcpy( y_PSE_Int, y_PSE_Int+1, L_PSE*sizeof(double));
memcpy( u_PSE, u_PSE+1, L_PSE*sizeof(double));
// Set the last element of derivative and integral vectors to 0:
y_PSE_Der[L_PSE] = 0;
y_PSE_Int[L_PSE] = 0;
// **************************************************************************
Step responses of the CFE and FOBD controller versions were determined for the same sampling frequency equal to 1 kHz.
Bode diagrams and histograms were carried out for different sampling rates, due to the different computation times of the CFE and FOBD algorithms and the additional time overhead resulting from the need to transmit data via the UART interface. Hence, a frequency of 2 kHz was selected for CFE and 1kHz for FOBD. These frequencies were the base frequencies for the sine wave generation. The sine period was built from 50 samples; therefore, for the base frequencies, a maximum of Hz and Hz were obtained for CFE and FOBD, respectively.