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Article
Peer-Review Record

Pre-Emphasis Pulse Design for Reducing Bit-Line Access Time in NAND Flash Memory

Electronics 2022, 11(13), 1926; https://doi.org/10.3390/electronics11131926
by Junnosuke Kondo and Toru Tanzawa *
Reviewer 1: Anonymous
Reviewer 2:
Electronics 2022, 11(13), 1926; https://doi.org/10.3390/electronics11131926
Submission received: 20 May 2022 / Revised: 15 June 2022 / Accepted: 19 June 2022 / Published: 21 June 2022
(This article belongs to the Special Issue Feature Papers in Microelectronics)

Round 1

Reviewer 1 Report

This manuscript studied how to use pre-emphasis pulses to reduce bit-line access time in NAND flash memory. The authors presented lots of data and investigated optimum PE pulse widths and resultant minimum BL delay time using two BL models, SLM and TLM. The research is interesting and important for the improvement of NAND technology. However, the data was not clearly presented. It is very hard to understand the statements in the manuscript. Also, there are barely transitions or motivations between different figures. This manuscript is more like a working report rather than a paper. I do not think it is appropriate to be published in Applied Sciences. Please find my detailed comments below:

1.     In the abstract, the authors claims that “1) PE pulses are effective to reduce BL access time as well as WL access time for both SLM and TLM, 2) the sensitivity of the PE pulse on the delay time is much larger in BL delay than in WL delay due to no filtering with RC delay element in BL delay”. However, there are no studies on WL delay presented in the manuscript.

2.     The quality of figs and tables must be improved. All figs and tables are blur. Table II and III are missing.

3.      Fig.1: How large is the PE pulse votage? As explained in Fig.2, when turn PE pulse off, VBL decreases first, then increases. This trend could not be read in Fig.1(b) BL0,1. Also, please explain why VBL increase again after decreases?

4.     Please explain Tdly dependence on selected cell’s position. Why the trend is non-monotonic?

5.     The Tdly time reading in Fig. 3(a) is confusing, please explain why “the BL voltage delay is about 1.6us with Tpre = 1.0us, about 0.7us with Tpre = 1.2 – 2.2us, and about 2.4us with Tpre = 2.4us”. In Fig. 3(b), For 100% cell, there is a difference between data 0 and 1, but for 25% cell, Tdly for data 0 and 1 are the same, please explain the reasons.

6.      Please label the target BL voltage and current in Fig. 6. Also, it is hard to tell IBLF increases after PE pulse when Tpre is 2.0us.

7.      In Fig.3(b), when Tpre = 2.4us, the BL voltage delay Tdly for BL25% Data 1 is larger than that for BL 100% Data 1. However, if compare data shown in Fig.6 and 7, when Tpre = 2.4us, sense current delay for BL 25% Data 1(Fig.6) is much smaller than that for BL 100% Data 1 shown in Fig. 7. How do you explain the inconsistent?

8.      In page 6, the authors claim that “The worst delay occurs when the farthest cell is selected. S0 determines Tdly for Topt < 1.2us and S1 does for Topt > 1.2us”, which is very confusing. Firstly, what is Topt? Secondly, how to tell this from Fig. 9? Also, more background for TLM needs to be introduced.

9.     In page 7, the description of Fig. 10 is hard to be understood. Firstly, what are “Vtdw” and “Itdw” respectively? Secondly, table ii and iii are missing. Thirdly, how to get the demonstration that “Contrary, the optimum Tpre for the sensing current is longer by a factor of two than that for the BL voltage”?

10.    What are different colors representing in Fig. 11(a) and (c)? And what are “Icell_n” and “Isense_n” in Fig.11 (b) and (d)?

11.      In Page 9, what is “180nm 1.8V transistor”? Do you mean a transistor with channel length 180nm and Vt = 1.8V?

12.     In the conclusion part, how do you get the conclusion that “In the demonstration, the scaling factor was two when the ratio is 0.35”?

 

 

 

 

 

 

 

 

 

 

 

 

 

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 2 Report

1. The images in the figure are generally not sharp enough, and hard to read. Please rectify the issues, as it is hard to evaluate the paper.

2. It would be good to provide quantitative performance improvement in the abstract.

3. Please also comment the overhead in term of power consumption by introducing PE. 

4. There should be a table showing the performance of the proposed work. 

5. Instead of only reporting the performance, what is / are the design criteria for the PE in this work? 

6. What is the simulation tool, and also the technology?

 

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Round 2

Reviewer 1 Report

All the concerns in my first report were addressed appropriately. I recommend to accept the manuscript. 

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