A 5 V-to-32 V Input PVT-Robust Charge-Pump Circuit with Adjustable Output in a 0.18 μm BCD Process

Abstract

In this paper, a new closed-loop charge-pump circuit with adjustable output voltage and an on-chip compensation technique is proposed. The environmental temperature and process corner can be detected with an on-chip detection circuit and automatically feedback an adjusted reference voltage. With this, the magnitude of the charge-pump output voltage with Pulse-Width Modulation (PWM) can be compensated. The charge-pump circuit is designed and verified with a 180 nm Bipolar-CMOS-DMOS (BCD) process, and its output voltage at different process, voltage, and temperature (PVT) is controllable with low ripple. There are three selections for adjusting the output voltage: +5 V/+7 V/+10 V shifts, with the supply voltage ranging from 5 V to 32 V. It can remain tunable and stable at any shifts. The maximum deviation is ±0.265%, and the maximum load current can reach 30 mA. The ripple voltage is less than 0.3% ($\Delta$ Vripple/Vout) underthe maximum load. The Monte Carlo simulation results show that the worst case of the process sensitivity ($\sigma /\mu$) is 0.1%. The charge-pump core area is 0.308 mm${}^2$, and the power consumption is 4.753 mW. The circuit can produce high-precision output and is suitable for high-side driving IC applications.

1. Introduction

The charge pump is a critical part of portable electronic equipment for its small size and easy integration. In addition, it is one of the most widely applied power converters, especially for boosting the supply voltage. For example, charge-pump circuits are widely applied in liquid-crystal display (LCD) systems and in driving analog switching systems where a voltage higher than the supply voltage is required. The required power supply voltage is usually a different attribute to its broad application scenarios. Therefore, the charge pump with fixed voltage cannot meet the different power supply requirements, which requires a voltage-adjust charge pump to provide a variety of output voltages or currents [1].

PVT variation has attracted more and more attention owing to the shrinking size of the manufacturing process. The chip performance from a different location can be quite different due to the continuous increase in the process deviation caused by manufacturing process fluctuation. The output voltage is quite sensitive to the PVT variations for a conventional open-loop charge-pump circuit. To stabilize the output voltage, the feedback mechanism is applied to regulate the output. Common feedback mechanisms include Pulse-Width Modulation (PWM) [2,3], Pulse-Skip Modulation (PSM) [4], Variable Frequency Modulation (VFM) [5,6], input current-limiting control [7], etc. It is usually necessary to ensure that the desired indicators are achieved in the worst case during the circuit design. However, the output voltage will be higher than the set voltage under other conditions. Therefore, robust technology becomes increasingly necessary to enhance the circuit performance and avoid functional faults [8].

Various methods in different fields are used to reduce the performance loss caused by PVT variations [9]. For the whole-system PVT robust, its output transfer function can be designed to consist of the capacitance ratio and the transistor size ratio. The voltage gain is expected to remain constant, given that both the capacitance ratio and the transistor size ratio are independent of the PVT variations [10], under the condition of heavy hardware consumption. The amplifier’s gain can be compensated by tracking the PVT variations by an auxiliary single-pole amplifier [11]. Alternatively, the circuit’s operating environment can be directly detected by PVT detector to regulate the circuit [12,13,14,15]. In this design, adjusting the amplifier’s reference voltage under various PVT situations can precisely control the output voltage by the regulation system. Consequently, a circuit for on-chip process corner detection is required to achieve it. Currently, there are various techniques for process corner detection, one of which is generating a voltage signal unrelated to temperature and only relevant to process corners and transmitting it to a TDC (Time-to-Digital Converter) to distinguish the process corners. However, it is challenging to maintain the clock delay of the D flip-flop constant in AD converters, and only a few temperature nodes may be distinguished. In addition, the current process corner can be judged according to the fluctuation of the VTH, while temperature variations can also impact the VTH. It is likely to generate overlapping phenomena and make it impossible to identify the process corners if the temperature detection range is too large [12].

The adjustable output voltage is preferred to satisfy more applications. Typically, the adjustable output voltage can be accomplished by altering the voltage conversion rate (VCR) of the charge pump [16,17,18,19]. However, the conversion efficiency will be reduced due to the influence of the parasitic capacitance by changing the series or parallel connection between the floating capacitors to change the VCR. It can be improved by folding floating capacitors into other floating capacitors or coupling capacitors to alter the charge pump’s actual order between the input and output. However, it is still the cost of a large chip area.

This paper proposes a new closed-loop charge pump with adjustable output voltage and PVT robust. In order to reduce the effect of the PVT on the output voltage VCP, we propose a new process corner detection circuit that can detect in a wide temperature range. At the same time, according to the demand for an external load power supply, the output voltage VCP can be adjusted to provide a range of10–42 V. There are three selections for adjusting the output voltage: +5 V/+7 V/+10 V shifts, with supply voltage ranging from 5 V to 32 V. It can remain tunable and stable at any shifts. Thus, the application is wide. The PWM modulation combines the characteristics of the PVT robust and the adjustable output voltage to save area and power consumption. The proposed charge-pump circuit’s system design is described in Section 2. The implementation of critical circuits is covered in Section 3. The simulation results are shown in Section 4. The paper is summarized in Section 5.

2. System Design

The proposed charge-pump circuit consists of a switched capacitor module, a PWM modulation module, a high-voltage LDO module, and an output voltage modulation module, as shown in Figure 1. The high-voltage LDO module, in which VBB is the input power supply voltage (5–32 V), converted to a low-voltage VDD (5 V), provides the power supply voltage for the low-voltage module in the chip.

The switched capacitor module operates on the following principles. Firstly, the switched transistors MN1 and MN2 are turned on, and the switched transistors MP1 and MP2 are turned off. The pump capacitor Cf is charged by VBB so that the positive plate potential of the pump capacitor is VBB, and the negative plate potential is 0. In the next cycle, the switched transistors MN1 and MN2 are turned off, the switched transistors MP1 and MP2 are turned on, and the negative plate potential of the pump capacitor is VBB. Because the voltage on the capacitor cannot vary abruptly, the potential of the positive plate is VBB+$\Delta$V using the characteristic that the voltage on the capacitor cannot be mutated. The charge on the capacitor is transferred to the load capacitor to obtain the output boost signal VCP. During this process, the Vpulse signal controls the switches through different drive circuits, so that the switches on the same branch are not simultaneously turned on.

A schematic diagram of the switching capacitance module is shown in Figure 2. The power supply voltage V_BB charges C_f within t₁. According to Kirchhoff’s Law:

$$Vcf\left(t\right)=V_{BB}-2R_{on}\times i_1\left(t\right)$$

(1)

According to the law of charge conservation:

$$Vcf\left(t\right)=\frac{1}{C_f}{\int }_t^0{i}_1\left(t\right)$$

(2)

The charging current $i_1\left(t\right)$ within t₁ is obtained from Equations (1) and (2) as follows:

$$i_1\left(t\right)=1-e^{-\frac{t}{2R_{on}{C}_f}}$$

(3)

Then, the Vcf(t₁) at t₁ is:

$$Vcf\left(t_1\right)=V_{BB}-2R_{on}(1-e^{-\frac{t_1}{2R_{on}{C}_f}})$$

(4)

At the same time, according to Kirchhoff ’s law and the law of charge conservation, the charge on C_L discharges R_L.

$$Vcp\left(t\right)=V_{BB}+R_L\times i_2\left(t\right)$$

(5)

$$Vcp\left(t\right)=Vcp\left(0\right)-\frac{1}{C_L}{\int }_0^t{i}_2\left(t\right)dt$$

(6)

The discharging current $i_2\left(t\right)$ within t₁ is obtained from Equations (5) and (6) as follows:

$$i_2\left(t\right)=e^{-\frac{t}{R_L{C}_L}}$$

(7)

Therefore, the voltage signal Vcp of the t₁ stage is obtained:

$$Vcp\left(t\right)=V_{BB}+e^{-\frac{t}{R_L{C}_L}}\times R_L$$

(8)

From Equation (8), VCP decreases continuously within t₁. The charge on C_f charges C_L within t₂, according to Kirchhoff’s law and the law of charge conservation:

$$Vcp\left(t\right)=V_{BB}+Vcf\left(t_1\right)-Vcf\left(t\right)-2R_{on}\times i_3\left(t\right)$$

(9)

$$Vcp\left(t\right)=\frac{1}{C_f}{\int }_{t_1}^t(i_3\left(t\right)-i_o\left(t\right))dt$$

(10)

$$i_o\left(t\right)=\frac{Vcp\left(t\right)-V_{BB}}{R_L}$$

(11)

The voltage signal Vcp of the t₂ stage is obtained from Equations (9) and (11) as follows:

$$Vcp\left(t\right)=C_1{e}^{r_{1}t}+C_2{e}^{r_{2}t}+Vcp\left(t_1\right)$$

(12)

The expression of Vcp(t) from 0 to t₁ + t₂ is:

$$Vcp\left(t\right)=\left\{\begin{array}{ccc}& V_{BB}+e^{-\frac{t}{R_L{C}_L}}\times R_L& 0\le t\le t_1\\ & C_1{e}^{r_{1}t}+C_2{e}^{r_{2}t}+Vcp\left(t_1\right)& t_1\le t\le t_1+t_2\end{array}\right.$$

(13)

According to the boundary condition,$Vcp\left(0\right)=Vcp(t_1+t_2)$. Moreover, Vcp(t₁) is equal from 0 to t₁ and from t₁ to t₁ + t₂. Thus, obtain the value of the constant C₁C₂,

$$C_1=\frac{R_L(1-e^{-\frac{t_1}{R_L{C}_L}})}{e^{r_2{t}_1+r_2{t}_2}-e^{r_1{t}_2+r_2{t}_1}}$$

(14)

$$C_2=\frac{R_L(1-e^{-\frac{t_1}{R_L{C}_L}})}{e^{r_2{t}_1+r_2{t}_2}-e^{r_1{t}_2+r_2{t}_1}}\times \frac{e^{r_2{t}_1}}{e^{r_1{t}_1}}$$

(15)

where r₁ and r₂ is a constant.

$$r_1=\frac{-\left(\frac{2R_{on}{C}_f+R_L{C}_L-C_f{R}_L}{2R_{on}{R}_L{C}_L{C}_f}\right)+\sqrt{(\frac{2R_{on}{C}_f+R_L{C}_L-C_f{R}_L}{2R_{on}{R}_L{C}_L{C}_f}{)}^2-4\frac{1}{2R_{on}{R}_L{C}_L{C}_f}}}{2}$$

(16)

$$r_1=\frac{-\left(\frac{2R_{on}{C}_f+R_L{C}_L-C_f{R}_L}{2R_{on}{R}_L{C}_L{C}_f}\right)-\sqrt{(\frac{2R_{on}{C}_f+R_L{C}_L-C_f{R}_L}{2R_{on}{R}_L{C}_L{C}_f}{)}^2-4\frac{1}{2R_{on}{R}_L{C}_L{C}_f}}}{2}$$

(17)

It can be seen from Equation (12) above that VCP increases continuously within t₂. The parameters of r₁, r₂, C₁, C₂ through the on-resistance Ron of the switch transistor, the pump capacitance C_f, the load capacitance C_L, the load resistance R_L affect the charging rate in the t₂ stage. Therefore, the value of Vcp(t) is related to the duty cycle.

This circuit adopts PWM, as shown in Figure 1, which allows the duty cycle of each working cycle by altering the reference voltage value of the amplifier to control the energy transfer of each charge and discharge cycle and then adjust the output voltage. By sampling the value of the output voltage VCP and comparing it with the reference voltage, the duty cycle of the charge-pump switch is fed back to adjust the value of the VCP. At the same time, in the process of sampling, in order to reduce the influence of temperature on the VBE of the transistor, an additional current signal is added to offset the temperature variation caused by the transistor. It can make the sampled signal more stable and reliable. In this process, there will be PVT variations, so the output voltage cannot be stable. Therefore, we set the Look-Up-Table of the reference voltage in the output voltage modulation to include the PVT variations information of the entire system and obtain a stable output value through closed-loop control.

The output voltage modulation module adjusts the output voltage through PWM by changing the Look-Up-Table of the reference voltage. In the closed-loop system, the Look-Up-Table contains the PVT information of the entire loop, so the reference voltage can be selected according to the detected temperature and process corner to obtain a stable output signal. The output voltage modulation module sets the desired output voltage by the A1 and A2 signals. When A1A2 = 00, it chooses $\Delta$V = 5 V; when A1A2 = 01, it chooses $\Delta$V = 7 V; when A1A2 = 10, it chooses $\Delta$V = 10 V. Meanwhile, the temperature and process corner of the chip are detected through the temperature detection module and the process corner detection module. Then, it tracks the signal in the Look-Up-Table and selects the corresponding reference voltage values according to different output voltage values. Therefore, the system can generate a stable output voltage signal VCP that can compensate for PVT fluctuations. Sharing a Look-Up-Table can reduce the area and power consumption because adjustable output voltage and PVT compensation technology can be implemented by selecting different reference voltage values.

The charge pump outputs the voltage to supply power for the high-side power transistors of the pre-drive circuit in the motor drive circuit. The gate voltage needs to be 5 V greater than the supply voltage to turn on the high-side N-type power transistors. The power transistors turn on quicker, and their on-resistance is lower when the gate voltage is higher. The difference between the output voltage of the charge pump and the power supply is adjustable within a specific range. It is possible to dynamically adjust the rise time and the peak current of power transistors according to the measured situation to avoid the efficiency loss caused by the slow conduction speed of the power transistors. The efficiency of a voltage regulator system will also increase if its output voltage is more accurate and with a lower ripple. The charge-pump circuit’s output voltage largely affects the load circuit’s operating performance, but it usually varies greatly with PVT variation.

Therefore, it is necessary to provide a high-precision and low-ripple boost circuit with adjustable output voltage in the circuit to supply the gate drive voltage of the high-side drive transistor. The proposed charge-pump circuit can compensate for PVT variation and obtain a stable output voltage with high precision, effectively providing energy for the load circuit. At the same time, it can also be widely applied as a power supply module to supply power to various power transistors or loads.

3. Critical Circuit Design

3.1. PWM Modulation Module

The proposed charge-pump circuit operates on Pulse-Width Modulation (PWM), which means that the energy transfer of each charge and discharge cycle is controlled by changing the duty cycle of each working cycle at a constant frequency, and then the output voltage is adjusted.

Firstly, the difference between the output voltage of the charge pump and the power supply is transformed into a current signal. It is transformed into the voltage signal Vin through the resistance, which is output to the positive end of the comparator. Because the VBE of bipolar transistor Q4 will make the generated current signal vary with temperature variation, it is necessary to make temperature compensation for the current signal. The VBE of Q1 generates the current signal VBE/R1, and the sampled current signal value is (VCP-VBB-VBE)/R2. If R1 = R2, the temperature variation of the comparator’s positive-end signal can be compensated. The positive end of the comparator inputs the voltage signal Vin, and the negative end inputs the reference voltage signal. Different reference voltages are selected according to the Look-Up-Table. The specific voltage value of the Look-Up-Table is controlled by the external input signals A1 and A2, the temperature detection module, and the process corner detection module.

When Vin is larger than Vref, the output voltage is high level. When Vin is less than Vref, the output voltage is low level. The comparison results and CLK are inputted into the logic module to vary the duty cycle of the clock signal, and the output pulse signal Vpulse is transmitted to the four switch transistors for its charging and discharging. The timing diagram of the modulation process is shown in Figure 3. It can be seen that the rising edge of Vout determines the rising edge of Vpulse, and the falling edge of CLK determines the falling edge of Vpulse. In the beginning, the duty cycle of the Vpulse signal is small, which mainly controls the switch transistors to charge. When the voltage is charged to a specific value, the duty cycle of the Vpulse signal is large, which mainly controls the switch transistors to discharge. The sampled output voltage variations are finally fed back to the switch transistors to control the conducting state of the switch transistors to maintain the output voltage stable.

According to the PWM, the output voltage of the charge pump is changed by changing the duty cycle DT, and the following is obtained:

$$DT=\frac{t_1}{t_1+t_2}=K\frac{1}{Vref}$$

(18)

where K is the conversion coefficient, it can be seen that when Vref is larger, the duty cycle is smaller, the t₂ time is larger, and the voltage Vcp is larger.

3.2. Process Corner Detection Module

As shown in Figure 4, the process corner detection module comprises all P-transistors. The low level of the odd series increases with the increase in series, and there is always $V_{n+1}>V_n>V_{n-1}$ at different process corners. When Vin is at a high level, M1 is not conductive, and M2 is always in the saturated region. Because $V_{SG2}\ge \left|V_{TH}\right|$, it can be obtained:

$$V_{o1}\ge \left|V_{TH}\right|$$

(19)

When Vin is at a low level, M1 is in the linear region, and M2 is in the saturated region. According to the principle of equal currents, it can be obtained:

$$\frac{1}{2}\mu pCox\frac{W}{L}(V_{o1}-|V_{TH}{\left|\right)}^2=\mu pCox\frac{W}{L}\left[\right(V_{DD}-|V_{TH}\left|\right)(V_{DD}-V_{o1})-\frac{1}{2}{(V_{DD}-V_{o1})}^2]$$

(20)

The output voltage V_o1 is obtained:

$$V_{o1}=\frac{1}{\sqrt{2}}(V_{DD}-|V_{TH}\left|\right)+|V_{TH}|$$

(21)

When V_o1 equals V_TH, M3 is in the linear region, and M4 is in the saturated region. According to the principle of equal currents:

$$\frac{1}{2}\mu pCox\frac{W}{L}(V_{o2}-|V_{TH}{\left|\right)}^2=\mu pCox\frac{W}{L}\left[\right(V_{DD}-2|V_{TH}\left|\right)(V_{DD}-V_{o2})-\frac{1}{2}{(V_{DD}-V_{o2})}^2]$$

(22)

The output voltage V_o2 is obtained:

$$V_{o2}=\frac{6|V_{TH}|\pm 2\sqrt{9V_{TH}^2-8\left|V_{TH}\right|V_{DD}+2V_{DD}^2}}{4}$$

(23)

When V_o1 is Equation (19), M3 is in the saturation region, and M4 is in the saturation region. The following equation can be obtained according to the principle of equal currents.

$$\frac{1}{2}\mu pCox\frac{W}{L}(V_{o2}-|V_{TH}{\left|\right)}^2=\frac{1}{2}\mu pCox\frac{W}{L}(V_{DD}-V_{o1}-|V_{TH}{\left|\right)}^2$$

(24)

The output voltage V_o2 is obtained:

$$V_{o2}=0.3(V_{DD}-|V_{TH}\left|\right)$$

(25)

Comparing Equation (25) with 0, it can be seen that the low level of the odd series will increase with the increase in series.

Therefore, the output signals of the $n-1^{th}$ stage, the $n^{th}$ stage, and the $n+1^{th}$ stage are outputted to the three comparator circuits. As shown in Figure 5, different color pulse signals represent different odd-order outputs. At the same time, the reference voltage VR in different process corners is different so that the comparator can produce different output signals in different process corners. The three comparator circuits output a high level at the process corner ff. At the process corner tt, the comparator A1 outputs a pulse signal, and the comparators A2 and A3 output a high level. At the process corner ss, the comparators A1 and A2 output pulse signals, and the comparator A3 outputs a high level. These signals are transmitted to the coding module for coding. The coding module counts the rising edge of the input signal. To prevent false triggers and keep a certain margin, it outputs a low level when the number of the rising edge is larger than 7, and it outputs a high level when the number of the rising edge is less than 7. Then, which process corner the chip is currently at is judged. When the output signal C [2:0] of the coding module is 100, the corresponding process corner is ff. When it is 010, the corresponding process corner is tt. Moreover, when it is 001, the corresponding process corner is ss.

Because the circuit is inevitably affected by temperature and the influence of temperature is often more significant than that of the process corner, it could cause the overlapping phenomenon due to the influence of temperature in detecting the process corner. Therefore, it is necessary to conduct temperature-segmentation detection, as shown in

Table 1. Temperature coding under different process corners.

R[3:0]	0000	1000	1100	1110	1111
ss	135–110 °C	105–75 °C	70–40 °C	35–−5 °C	−10–−40 °C
tt	135–110 °C	105–80 °C	75–45 °C	40–−5 °C	0–−40 °C
ff	135–105 °C	100–75 °C	70–40 °C	35–−5 °C	0–−40 °C

. Different VRs are selected to compare in different temperature ranges. The output signal of the comparator is consistent at different process corners, and then different process corners can be distinguished in the temperature range of 135 °C to −40 °C.

4. Simulation and Experimental Results

The proposed charge-pump circuit is fabricated in a 0.18 $\mathsf{\mu }$m CMOS process. The layout is shown in Figure 6, and the charge-pump circuit area is 880 $\mathsf{\mu }$m × 350 $\mathsf{\mu }$m. Figure 7 shows the output voltage at different corners when A1A2 = 00, VBB = 24 V, and temperature range is −40 °C to 135 °C. The output voltage can be stabilized at 29 V at different process corners and temperatures. Figure 8 and Figure 9 show the output voltage at different corners when A1A2 = 01 and A1A2 = 10. It can be seen that the output voltage values are 31 V and 34 V, respectively, and the maximum deviation can be measured to be ±0.265%. The specific deviation values are shown in

Table 2. Deviation at different process corners.

$\Delta$V (VCP-VBB)	ss	tt	ff
5 V	±0.197%	±0.199%	±0.170%
7 V	±0.265%	±0.226%	±0.151%
10 V	±0.129%	±0.179%	±0.218%

.

Figure 10, Figure 11 and Figure 12 show that a Monte Carlo simulation was carried out in 500 samples when VBB = 24 V, A1A2 = 00, A1A2 = 01, and A1A2 = 10 to evaluate the sensitivity of the output voltage under process variation and mismatch conditions. The worst case of the process sensitivity ($\sigma /\mu$) is 0.1%. Here, $\sigma$ represents a statistical term that reflects the size of the sample dispersion. In addition, $\mu$ represents the arithmetic mean of all the sample values. Again, it shows that the charge-pump structure designed in this paper has excellent performance, and the output voltage is stable and reliable.

Figure 13 shows the o variation of the output voltage when the VBB varies from 5 V to 32 V at the process corner tt and 27 °C. It can be seen that when the supply voltage fluctuates, the proposed circuit can still output a stable linear voltage signal.

Figure 14 shows the simulation results of the output voltage with the variation of the load current at different process corners and 27 °C when VBB = 24 V and A1A2 = 00. When the output is connected to different resistors, such as a resistor with a resistance value of 2.9 K, the load current flowing through the resistor is 10 mA. It can be seen that the maximum load current can reach 30 mA, and the output voltage remains stable at different process corners.

The proposed charge pump’s performance is summarized and compared with other charge pumps in

Table 3. The comparison results of the performance of circuits.

Reference	[21]	[22]	[23]	[20]	[24]	[25]	[26]	[27]	This Work
Input Voltage (V)	1.2	2.8	4.6	3.3	3.3	1.2	1.8	5	5–32
Vout Voltage (V)	7.08	12.8	20	16	5/19.6	6.129	7.5–24	13–16.95	10–42
Output ripple ($\Delta$Vripple/Vout) 1	0.2%	<1% @max.load	<0.6% @max.load	<1% @max.load	-	0.23%	<1%	<1.1%	<0.3% @max.load
Compensation for PVT Variations	no	no	no	no	no	no	no	no	yes
Maximum loading current (mA)	0.1	0.01–1	0.6	0.1–7	-	0.3	0.1	-	30
Frequency	100 M	10 K	3 K–1 M	6.67 M	10/50 M	100 M	20 M	10 K	200 K
Flying capacitance	-	1 u	1 u	1 u	-	-	-	-	100 n
Load capacitance	-	1 u	1 u	100 n	1 n	-	1 n	-	1 u
No. of Stages	5	4	4	16	1/11	5	15	2	Single
Power dissipation (mW)	-	-	-	-	3.56	-	-	-	4.753
Area (mm${}^2$)	-	0.6	-	1.65	0.063	-	0.038	2.53	0.308
Technology	0.18 $\mathsf{\mu }$m	0.18 $\mathsf{\mu }$m	0.18 $\mathsf{\mu }$m	0.16 $\mathsf{\mu }$m	0.18 $\mathsf{\mu }$m	0.18 $\mathsf{\mu }$m	0.18 $\mathsf{\mu }$mBCD	0.18 $\mathsf{\mu }$m	0.18 $\mathsf{\mu }$mBCD
Result	Simulated	Measured	Measured	Measured	Measured	Simulated	Measured	Measured	Simulated

1 Δ Vripple represents the output ripple voltage and Vout represents the output signal value of the charge pump.

. Although the process used in [20] is 0.16 $\mathsf{\mu }$m, the device parameters and process parameters are not much different between 0.16 $\mathsf{\mu }$m and 0.18 $\mathsf{\mu }$m, so they can be directly compared. Compared with the other circuits in the comparison table, our proposed circuit has a PVT-robust characteristic, so the ripple is less than 0.3%. At the same time, the output voltage can be adjusted, which can vary from 10 V to 42 V. The maximum load current is 30 mA, so the output driving capability is strong. Thus, it indicates that the proposed circuit has a wider output range, smaller ripple, and larger load current. In addition, it performs PVT robust.

5. Conclusions

This paper proposes a new charge-pump circuit, which can adjust its output voltage according to the working environment. Meanwhile, an on-chip compensation technology is proposed to make the circuit resistant to PVT variation. The proposed circuit is fabricated by a 180 nm BCD process. The difference between the output voltage of the charge pump and the power supply voltage is selected by signals A1 and A2, and the PVT compensation technology is adopted. The output voltage can remain stable at the supply voltage of 5–32 V, the temperature of −40 ℃ to 135 ℃, and different process corners. The output voltage can remain stable, and the maximum deviation is ±0.265%. The ripple is less than 0.3% ($\Delta$Vripple/Vout) when the maximum load current is 30 mA. Thus, the proposed circuit has a wider output range, smaller ripple, and larger load current. The charge-pump core area is 0.308 mm${}^2$, and the power consumption is 4.753 mW. The proposed circuit can be applied as a power supply module to supply power to different power transistors or loads.