Increasing EMI Immunity and Linearity of a CMOS 180 nm Voltage-to-Delay Converter

Round 1

Reviewer 1 Report

Reviewer’s comments on “Increasing EMI Immunity and Linearity of a CMOS 180nm Voltage-to-Delay Converter” submitted to MDPI Electronics (electronics-1613121)

 

The research proposed a voltage-controlled delay unit (VCDU) with a novel architecture to allow for a wide input range of linearity and an improved immunity to Electromagnetic interferences. The following comments are made to authors to consider:

Introduction Section is too short. The problem statement is not complete. Seventeen references are cited but no details were provided about what they achieved. The research gap is not well established and it’s not clear what’s new in this research compared to the cited papers. Section 2 could be merged with section 1, unless it gives a through overview of the literature on VCDU. Section 3 is main important part of this manuscript, however this is not detailed either. In Section 4, many figures remain unexplained and discussion in not strong either. The authors can talk about the advantages and disadvantages of the proposed architecture. Section 5 (conclusions) is not supportive. The conclusions made are not providing very insightful outcomes to readers.

Author Response

Thank you for the comments and suggestions. The paper has been strongly reviewed, adding more details, explanations and comparison. Introduction and conclusions have been fully rewritten, as highlighted in yellow.

Reviewer 2 Report

This manuscript presents a design of Voltage-to-Delay Converter with increased EMI immunity and linearity based on 180nm CMOS process. In all, the work is interesting and meaningful. The authors did the front-end and back-end work, except for the final Tape Out. And the simulated results are presented well and sufficient. However, before being accepted, more work has to be done.

1. In section 2, authors listed some existing designs, but the drawbacks of some designs were not pointed out. Without these points, it will be hard for readers to get the novelty of the presented design.
2. In the same section (Sec. 2), authors focused on describing the linearity of existing designs without mentioning their ability to resist electro-magnetic interference at all. EMI Immunity acting as the highlight of the presented design should be referred in this section.
3. In line 117-118, maybe some references have to be referred to evidence the worst case. The units of the ordinate in Fig. 8 need to be adjusted.
4. The placement of the chart makes the article difficult to follow. It is recommended to place it near the citation.
5. The whole work lacks the detailed comparison with the State-of-the-Art works. I mean, a comparison chart or something else.
6. The section of 'Conclusions' should be the conclusion of all the article. It is recommended to rewrite this section.
7. If possible, finish the left work-Tape out and present the realistic measurement results, which would make the work more convincing.

Based on the above comments, my advice for this version of manuscript is 'Reconsider after major revision'.

Author Response

1. Thank you for the suggestion. More details and comparisons have been added to make easier and clearer our work, as highlighted in the yellow text.
2.  A comparison between the EMI susceptibility of the state-of-the art VCDU has been added in table 3. It is worth adding, however, that this research is rather novel and informations about the EMi susceptibility are hard to be found.
3.  Done, thank you for the suggestion.
4.  Done, thank you.
5.  Two tables have been added along with more details and explanations to better compare the different architectures.
6. The section conclusion has been fully rewritten.
7.  We agree to the reviewer but in this time it is very hard to get funds for an expensive test-chip. On the other hand, we had a deep experience and knowledge of this techonology (UMC0.18um) and we are confident that the models are very accurate and that the simulations can fit very well the reality.

Reviewer 3 Report

Fix the wrong link to Fig. on line 179 (Fig. ??) and table 3 (line 185 - Tab. ??)

Author Response

The authors wish thank the reviewer: the wrong links are now exact.

Reviewer 4 Report

The article presents a very good approach of Increasing EMI Immunity and Linearity of a CMOS 180nm Voltage-to-Delay Converter. Overall, the article is well written with clear flow, and has been much improved in this current revision. Just few minor suggestions to make it more complete:

1- Voltage supply, linearity range, and average EMI-induced jitter. These outcomes need to be highlighted in abstract.

2-  Page 12, where the classical current starved delay unit of Fig. ??, and Page 13 A comparison between these three topologies can be summarized in Tab. ??. Please make sure all figures and tables numbers are reflected in the text. 

3- The method of verifying the proposed work, layout or specific simulation or analysis used need to be mentioned.

Author Response

The authors wish thank the reviewer for the suggestions and comments.

The abstract has been modified by adding the informations about the voltage supply, the linearity range and the average EMI-induced jitter.

The wrong links to the figure and the table have been corrected.

The layout, extracted view, tools and simulations have been mentioned in both the section about the VCDU characteristics and the section about the EMI susceptibility.

Round 2

Reviewer 2 Report

All the comments have been revised and I think it is OK to be published now. 

Author Response

The authors wish thank the reviewer.