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Article

The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems

School of Computer Science and Technology, Shandong Jianzhu University, Jinan 250101, China
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Author to whom correspondence should be addressed.
Electronics 2022, 11(9), 1389; https://doi.org/10.3390/electronics11091389
Submission received: 29 March 2022 / Revised: 14 April 2022 / Accepted: 22 April 2022 / Published: 26 April 2022
(This article belongs to the Special Issue Real-Time Embedded Systems: Architectures, Software and Applications)

Abstract

:
Embedded systems are widely used in various devices. PRES+ (Petri net- based Representation for Embedded Systems) has been used to model and analyze embedded systems. However, it cannot characterize the priority of events, and cannot fully express the complex data flow and control flow. To solve this problem, inhibitor arcs are added to PRES+ and PIRES+ (PRES+ with Inhibitor arcs) is obtained. However, PIRES+’s state space explosion problem is a handicap when modeling, verifying, and controlling complex, large embedded systems. To mitigate the state space explosion problem of PIRES+ and analyze complex embedded systems, we propose the place refinement approach and the place set refinement approach for PIRES+. Under specific conditions, several important properties of PIRES+, such as timing, functionality, reachability, liveness, and boundedness, are preserved by using these refinement approaches. In order to illustrate the effectiveness of these refinement methods, as an example, the modeling and analysis of a network communication system is proposed. The refinement methods proposed have certain feasibility and practicability and provide a more practical theoretical basis for the modeling of some embedded systems.

1. Introduction

Embedded systems are used in diverse contexts from automobiles to communication systems, home appliances, and the Internet of Things, and are becoming more and more complex with increasing requirements. Therefore, higher requirements are put forward for the reliability, correctness, and timing of the embedded system, so it is important to focus on both how to model embedded systems and how to guarantee their correctness.
In the literature, there exist many models to represent embedded systems [1,2], such as finite state machines [3], data flow graphs [4], Petri nets [5], and communicating processes [6], etc. These formal modeling methods describe the characteristics of embedded systems from different aspects, but do not form a unified standard. Petri net has a formal mathematical definition and standardized derivation rules, which is a more standardized formal modeling method.
Ordinary Petri nets can describe systems with features such as concurrency, conflict, and uncertainty. However, there are several drawbacks when it comes to modeling embedded systems: ordinary Petri nets have no hierarchical structure, lack the notion of time, and have a limited ability to describe data flows. In order to overcome these drawbacks, several extended Petri nets for an embedded system’s modeling have been proposed, such as colored Petri net [7], logical delay Petri net, time Petri net [8], hybrid Petri net, fuzzy Petri net, PRES+ (Petri net-based Representation for Embedded Systems) [9], etc. These extended forms of Petri nets start from different application requirements and improve the ability to model and analyze embedded systems.
Among them, PRES+ is an extended Petri net, and has previously been presented to represent embedded systems. Based on PRES+, Cortés et al. [9] proposed a computation model for embedded systems and gave a method to solve the formal verification problem of the PRES+ model. Karlsson et al. [10] proposed a verification approach for the PRES+ by using a divide-and-conquer approach. In order to enhance the verification effectiveness of PRES+, Xia [11] presented transition refinement method. A sharing synthesis approach for PRES+ is presented in [12]. Under certain constraints, the synthesis PRES+ will preserve boundedness and liveness. A more formal successor marking definition of PRES+ is proposed in [13]. In order to analyze complex embedded systems, Xia et al. [14] proposed two kinds of transition synthesis methods for PRES+.
Although PRES+ can represent the embedded system at different levels, capture the real-time information of the embedded system, and describe the uncertainty of the system, the PRES+ model cannot describe the priority of events, and cannot fully express the complex data flow and control flow.
Adding inhibitor arcs to Petri nets can improve the analysis ability of Petri nets [15]. The Petri net with inhibitor arcs not only has the ability of zero detection, but also can simulate any random access machine. Inhibitor arcs can be used to control the sequence of transitions and describe the priority relationship between events. In embedded systems, some transitions occur successively under certain conditions, which affect the expression of data flow and control flow. Therefore, it is necessary to introduce inhibitor arcs. In order to improve the modeling and analysis ability of PRES+, we add inhibitor arcs into PRES+, and obtain PIRES+ (Petri net with Inhibitor arcs-based Representation for Embedded Systems).
However, when large complex embedded systems are modeled by PIRES+, the state space explosion problem is a major disadvantage for PIRES+. In the literature, many authors have investigated Petri net transformation methods to mitigate the problem of state space explosion. The three popular transformations of Petri net are refinement [11,16,17,18,19,20,21,22,23,24,25,26,27,28,29], reduction [30,31,32,33], and synthesis [12,14,34,35,36,37,38,39].
Petri net-based refinement is an important method to system design and verification. As for refinement, Huang et al. [16] presented several refinement conditions to preserve 19 properties for Place/Transition Petri nets. Padberg et al. [17] provided a thorough survey of refinements based on several nets, namely place/transition nets, predicate/transition nets, and elementary nets. For colored Petri nets (CPNs), Lakos et al. [18] gave three types of refinement: node refinement, type refinement, and subnet refinement. Mejía et al. [19] presented a refinement process for extended attribute time place Petri nets. For workflow nets, Hee et al. [20] proposed several refinement rules which preserve soundness under certain conditions. Li et al. [21] defined algebraic steps for refinement and reduction, and investigated the Petri net property preservation. Xia [22] proposed a place type refinement method for ordinary Petri nets. Under certain conditions, liveness, boundedness, and reversibility of these refined nets are preserved.
A top-down methodology achieves a formal specification of the logic control structure, refines the model so that more system operation details can be included, and consequently implements the control at a physical level [23]. Choppy et al. [24] investigated a refinement method of colored Petri net subclass and proved the correctness of this method. For a kind of well-behaved Petri net, Ding et al. [25] proposed a refinement approach. Wang et al. [26] proposed a refinement approach which may not require reachability analysis. For systems specified in Elementary Net Systems, Bernardinello et al. [27] presented a refinement method for distributed systems. Lacheheub et al. [28] focused on analyzing the transformation of the business process (BP) to the Petri net and gave the transition refinement operation to verify soundness, liveness, and boundedness. Based on the UML state machine and the Petri net model, Łabiak et al. [29] presented a design of digital controllers. Petri nets were applied for macroplaces’ hierarchy and some elements of modularity.
Cortés et al. [9] extended PRES+ by introducing the definition of hierarchy and proposed some concepts of equivalence for the PRES+ model. A strong refinement and a wake refinement of a certain transition were presented. These refinements preserve equivalence. In [11], we extended the concepts of refinement in [9] and investigated transition refinement approaches for PRES+.
In order to model, analyze, and verify large complex embedded systems, and to resolve PIRES+’s state space explosion problem, the main contributions of this work include: (1) refinement methods for PIRES+ are proposed; (2) the property preservation of the refinement methods is investigated.
Compared with several refinement methods for ordinary Petri nets [16,22], Colored Petri nets [18], and PRES+ [9,11], the refinement methods for PIRES+ can nicely describe the characteristics of embedded systems.
Specifically, we first give the refinement approaches for PIRES+, and then investigate their property preservations. Under some constraints, reachability, timing, functionality, liveness, and boundedness of PIRES+ are preserved. Since these refinement methods can preserve these important properties, there is no need for using reachability analysis when the PIRES+ model is expanded. Thus, these refinement approaches can mitigate PRES+’s state space explosion problem.
The rest of the paper is structured as follows. Basic notions of PIRES+ are presented in Section 2. Section 3 proposes the refinement methods of PIRES+. Section 4 investigates reachability, functionality, and timing preservation. Section 5 studies the preservation of boundedness and liveness of PIRES+. Section 6 illustrates the efficiency of the PIRES+ refinement methods with an applicable example. We conclude by summarizing the contributions of the refinement technique in Section 7.

2. Basic Notions of PIRES+

In the following, we add inhibitor arcs into PRES+, and obtain PIRES+. The PIRES+ model can capture an embedded system’s timing aspects and obtain both control and data information which fully express complex data flow and control flow.
Definition 1.
A Petri net with inhibitor arcs is a five-tuple N = P , T , F , I , M , where P , T , F represents a net, M 0 is the initial marking,   I P × T is a set of inhibitor arcs,   I F = .
Figure 1 shows an example of the Petri net with inhibitor arcs. For example, there are inhibition arcs I = p 3 , t 1 , p 6 , t 2 in Figure 1. The initial marking is [1,0,1,0,0,0]T. At the initial marking M 0 , for transitions t 1 and t 2 , p ϵ t i : M p 1 , i 1 , 2 . Since M 0 p 3 = 1   and p 3 , t 1 I , t 1 is not an enabled transition. At the same time, p 6 , t 2 I , and M 0 p 6 = 0 , t 2 is an enabled transition.
Definition 2.
Ref. [9] A PRES+ model is N = P , T , I , O , M 0 , where P = { p 1 ,   p 2 , ……, p m } is a finite non-empty set of places, T = { t 1 ,   t 2 ,……,   t n } is a finite non-empty set of transitions, I P × T is a finite non-empty set of input arcs, O T × P is a finite non-empty set of output arcs, and M 0 is the initial marking, k = v , r is a token, where v is the token value, and r is the token time.
The inhibitor arcs are added to the PRES+, the PIRES+ (PRES+ with inhibitor arcs) is obtained.
Definition 3.
N = P , T , F I , F O , I , M 0 is a PIRES+ model, where P = { p 1 ,   p 2 , ……, p m } is a finite non-empty set of places, T = { t 1 ,   t 2 ,……,   t n } is a finite non-empty set of transitions, F I P × T is a finite non-empty set of input arcs, F O T × P is a finite non-empty set of output arcs, I P × T is a set of inhibitor arcs, and M 0 is the initial marking.
Figure 2 gives an example of a PIRES+ model, where P = p 0 , p 1 , p 2 , p 3 , p 4 , p 5 ,   T = t 0 , t 1 , t 2 , t 3 , t 4 , F I = p 0 , t 0 , p 1 , t 1 , p 1 , t 4 , p 2 , t 2 , p 3 , t 2 , p 4 , t 3 , p 5 , t 2 , F O = { ( t 0 , p 1 ), t 0 , p 2 , ( t 1 , p 3 ) , ( t 2 , p 4 ) , t 3 , p 0 , t 4 , p 3 } ,   and   I = p 5 , t 4 .
Definition 4.
A token in PIRES+ is k = v , r , where v is the token value, and r is the token time, which is a nonnegative real number describing the time stamp of the token.
In Figure 2, for instance, the token of place p 0 is k 0 = 3 , 0 , where the token value is 3 and the time stamp is 0.
Definition 5.
For every transition t T , there is transition function f : τ p 1 × τ p 2 × × τ p a τ q , where τ is a type function, t = p 1 , p 2 , , p a ,   q t .
For instance, in Figure 2, t 1 has the function f 1 = v 1 + 3 , where v 1 is the value of the token that will appear in p 1 , and after t 1 fires, the value of the token in p 3 will be the value of the token in p 1 plus 3.
Definition 6.
For every transition t T , there are d , d + R + , where d is a minimum delay, d + is a maximum delay, and R + is the non-negative real number set.
For instance, in Figure 2, the delay of t 3 is [2,5].
Definition 7.
A transition t T may have a guard G : τ p 1 × τ p 2 × × τ p a 0 , 1 , where t = p 1 , p 2 , , p a .
The guard is an important factor to determine whether t can be enabled. In Figure 2, transition t 2 has guard G = T U R E if v 3 > v 2 , where v 2 and v 3 are the values of the tokens in places p 2 and p 3 , respectively.
Definition 8.
b = k 1 , k 2 , , k a is a binding of transition t , where p i t , k i M p i .
Definition 9.
Ref. [9] For an enabled transition t , there exists the enabling time e t , where e t is the time instant at which t becomes enabled and is given by the maximum token time of the tokens in the binding.
Definition 10.
For an enabled transition t , there exists the earliest trigger time t = e t + d and the latest trigger time t + = e t + d + .
As in P/T Petri nets, when a transition is enabled in the PIRES+ model, it can be fired.
Definition 11.
The firing of transition t for a binding b changes M into a new marking M :
(i) 
Tokens from t are removed, i.e., p i t , M p i = M p i k i .
(ii) 
A new token k = v , r is put into each place of t , i.e., M p = M p + k for every p t .
(iii) 
The marking of places different from • t and t • remain unchanged, i.e., p P t   t , M p = M p .

3. Refinement Operations for PIRES+

In this section, we will investigate the refinement operation for the PIRES+ model. First, several relevant concepts will be proposed. Then, we propose the refinement operations.
Definition 12.
Suppose N = P , T , F I , F O , I , M 0 is a PIRES+ model.   N p = ( P p , T p , F I p , F O p , I p ,   M p , 0 ) is called a place subnet of N if and only if:
(i) 
P p P , T p T and P p , T p ;
(ii) 
F I p = F I P p × T p and F O p = F O T p × P p ;
(iii) 
T p T p P p ;
(iv) 
I p I ;
(v) 
N p   is connected, p i n , p o u t P p , where p i n is the only input place of N p , p o u t is the only output place of N p ;
(vi) 
t T P , f : τ p 1 × τ p 2 × × τ p a τ q (where q t , t = { p 1 , , p a });
(vii) 
t T P , d , d + R + , where d is a minimum delay, d + is a maximum delay, R + is the set of non-negative real numbers, and d d + .
Definition 13
For the transition set T p of N p , there is a minimum delay d p and a maximum delay d p + , i.e., d p , d p + R + such that d p d p + .
Definition 14. 
For the transition set T p of N p , there exists a transition set function f p , i.e.,   f p : τ p 1 × τ p 2 × × τ p a τ q , where T p = p 1 , p 2 , , p n and q T p .
In order to investigate property preservations in Section 4 and Section 5, we propose the following supposition for the PIRES+ subnet.
Supposition 1.
Suppose that PIRES+ subnet N p = P p , T p , F I p , F O p , I p , M p , 0 satisfies:
(i) 
In a process, i.e., tokens flow from outside of N p into p i n , through N p , then flow out from p o u t , the tokens’ number flowing into p i n is equal to that flowing out from   p o u t .
(ii) 
p i n is the unique place of P p which may contain tokens.
In this subsection, we present the PIRES+ refinement operations.
Definition 15. 
PIRES+ refinement operation Re f p p p , N p : let the refined PIRES+ N = ( P , T , F I , F O , I , M 0 ) be obtained from N = P , T , F I , F O , I , M 0 using N p = ( P p , T p , F I p , F O p , I p M p , 0 ) to replace p p where,
(i) 
P = P p P p p ; T = T p T ; I = I I p ;
(ii) 
If p , t F I p F I , then p , t F I ; If t , p F O p F O , then t , p F O ;
(iii) 
If t , p p F O , then t , p i n F O ; If p p , t F I , then p o u t , t F I ;
(iv) 
M 0 = M P p p 0 ,   θ p   M 0 p p = 0 M P p p ,   θ p 0   M 0 p p > 0 (where M P p p is the projection of M on P   p p , and θ p is 0-vector of M p );
(v) 
f p f p i n = f p p , f o u t = f p p ;
(vi) 
d p i n + d p = d p p , d p i n + + d p + = d p p + ; d p o u t = d p p , d p o u t + = d p p + .
Note that, although in Definition 15, only p p of N is replaced by a subnet   N p , this refinement operation can be extended to the place set refinement operation. Let the place set P s e t have a finite number of places. Every place of P s e t may not be in conflict with other places of P s e t , i.e., p 1 , p 2 P s e t , p 1 p 2 = and p 1 p 2 = (where p 1 p 2 ). In other words, every place of P s e t may not share output transitions and input transitions with other places of P s e t .
Supposition 2. 
Suppose (i) P s e t = p 1 , p 2 , , p m m 2 is a place set of N , with p i p j = and p i p j = for p i , p j P s e t (where i j ); (ii) N s e t = N p 1 , N p 2 , , N p m , where N p i i = 1 , 2 , , m is the subnet of N .
Definition 16. 
PIRES+ place set refinement operation Re f p s e t P s e t , N s e t : let the refined PIRES+   N = P , T , F I , F O , I , M 0 be obtained from N = P , T , F I , F O , I , M 0 using place subnets N p 1 , N p 2 , , N p m   to replace p 1 , p 2 , , p m   of P s e t , respectively.
Note that, since every place of P s e t may not share output transitions and input transitions with other places of P s e t , the specific execution process of this place set operation is as follows. First, let N 1 = P 1 , T 1 , F I 1 , F O 1 , I 1 , M 1 , 0 be obtained from N = ( P , T , F I , F O , I , M 0 ) using N p 1 to replace p 1 of N ; second, let N 2 = P 2 , T 2 , F I 2 , F O 2 , I 2 , M 2 , 0 be obtained from N 1 = P 1 , T 1 , F I 1 , F O 1 , I 1 , M 1 , 0 using N p 2 to replace p 2 of N 1 ; …; last, let N = P , T , F I , F O , I , M 0 be obtained from N m 1 = P m 1 , T m 1 , F I , m 1 , F O , m 1 , I m 1 , M m 1 , 0 using N p m to replace p m of N m 1 .

4. Preservation of Reachability, Timing, and Functionality for PIRES+

In this section, we investigate the preservation of reachability, functionality, and timing of the refined PIRES+ model by using the refinement operations. First, we propose the concepts of the property preservations of PIRES+. Second, we study the reachability, timing, and functionality preservations of PIRES+.
Definition 17. 
PIRES+ subnets N p 1 and N p 2 are said to have the same reachability iff:
(i) 
The input place’s number and the output place’s number of N p 1 are the same as those of N p 2 ;
(ii) 
The tokens’ number within the input places of N p 1 is equal to that of N p 2 , and when these tokens go through N p 1 and   N p 2 , respectively, the number of tokens of N p 1 is the same as that of N p 2 .
Definition 18. 
PIRES+ subnets   N p 1 and N p 2 are said to have the same functionality iff:
(i) 
The reachability of N p 1 is the same as that of N p 2 ;
(ii) 
If when the token type of tokens in the input places of N p 1 is equal to that of N p 2 , then the token type of tokens in the output places of N p 1 is equal to that of N p 2 .
Definition 19. 
PIRES+ subnets   N p 1 and N p 2 are said to have the same timing iff:
(i) 
The reachability of N p 1 is the same as that of N p 2 ;
(ii) 
The token time of tokens in the input places of N p 1 is equal to that of N p 2 , and the token time of tokens in the output places of N p 1 is equal to that of N p 2 .
In the following, reachability, functionality, and timing preservations of these refinement operations will be investigated.
Theorem 1. 
Let PIRES+ N = P , T , F I , F O , I , M 0 be obtained from N = P , T , F I , F O , I , M 0 using PIRES+ refinement operation Re f p p p , N p p . Then, N and N have the same reachability, functionality, and timing.
Proof. 
Suppose subnet N 1 = P 1 , T 1 , F I 1 , F O 1 , I 1 , M 1 , 0 , where P 1 = { ( p p ),   p p , p p } , T 1 = p p p p , F I 1 = p p , t | t p p p , t | p p p t p p ,   F O 1 = { t , p | t p p p p p { t , p p | t p p } , I 1 = , M p p , 0 = M 0 | P p p .
Suppose subnet N 2 = P 2 , T 2 , F I 2 , F O 2 , I 2 , M 2 , 0 where P 2 = p p , p p P p p , T 2 = p p , p p T p p , F I 2 = F I p p p , t t p p p p p p o u t , t t p p , F O 2 = F O p p { t , p i n t p p { t , p ) p p p t p p } } , I 2 = I p p I 1 . If p P p p , then M 2 , 0 p = M p p , 0 p . If p p p , p p , then M 2 , 0 p = M p p , 0 p p p p p . □
We can see that N 1 and N 2 have the same input places and output places. According to Definition 15, the number of tokens in input places of N 1 is the same as that of   N 2 . Since PIRES+   N is obtained from N by using N 2 to replace p p , by Supposition 1, Definitions 12, 15, the number of tokens in output places of N 1 is the same as that of N 2 . By Definition 17, N and N have the same reachability.
According to Definition 15, the type of tokens in input places of   N 1 is the same as that of N 2 . Since f p p f p i n = f p p ,   f p o u t = f p p , then the type of tokens in output places of N 1 is the same as that of N 2 . By Definition 18, N and N have the same functionality.
By Definition 15, the time of tokens in input places of N 1 is the same as that of   N 2 . Since d p i n + d p p = d p p ,   d p i n + + d p p + = d p p + ,   d p o u t = d p p and   d p o u t + = d p p + , by Definition 15, the time of tokens in output places of N 1 is the same as that of   N 2 . By Definition 19, N and N have the same timing.
Since N N 2 = N N 1 , then N and N have the same reachability, functionality, and timing. □
Note that, by Supposition 2, Definitions 15, 16, and Theorem 1, we can analyze the reachability, timing, and functionality preservations of the place set refinement operation.
Theorem 2. 
Suppose P p = p 1 , p 2 , , p m ( m 2 ) is the place set of PRES+ N , and p i , p j P p (where i j ), p i p j = and p i p j = . Let N = P , T , F I , F O , I , M 0 be obtained from N = P , T , F I , F O , I , M 0 using place set refinement operation Re f P p P p , N p . Then, N and N have the same reachability, functionality, and timing.
Proof. 
Since P p = p 1 , p 2 , , p m ( m 2 ) is the place set of N , and   p i , p j P p (where i j ), p i p j = and p i p j = , we can refine these places one by one. First, let N 1 = P 1 , T 1 , F I 1 , F O 1 , I 1 , M 1 , 0 be obtained from N = P , T , F I , F O , I , M 0 using N p p 1 to replace p 1 of N , by the proof process of Theorem 1, N 1 and N have the same reachability, functionality, and timing. Second, let N 2 = P 2 , T 2 , F I 2 , F O 2 , I 2 , M 2 , 0 be obtained from N 1 = P 1 , T 1 , F I 1 , F O 1 , I 1 , M 1 , 0 using N p p 2 to replace p 2 of N 2 , by the proof process of Theorem 1, N 2 and N 1 have the same reachability, functionality, and timing. In the case of p 3 , , p m , we can prove it in the same way. Thus, N and N have the same reachability, functionality, and timing. □

5. Preservation of Liveness and Boundedness for PIRES+

In Petri net system, liveness and boundedness are the two important behavior properties. The liveness reflects that the net system can complete any part of work in any state. This means that there is no local deadlock in the Petri net system. The boundedness reflects the overflow resistance of the Petri net system.
Some studies have been conducted in the field of Petri net refinement aiming to realize the preservation of liveness and boundness [11,16,17,22]. Huang et al. [16] proposed several refinement approaches for Place/Transition Petri nets to preserve liveness and boundedness. Xia [22] presented a refinement operation for ordinary Petri nets and investigated the preservation of reversibility, boundedness, and liveness of the refined nets. In [11], we analyzed a kind of transition refinement method for PRES+ to preserve liveness and boundedness.
In this section, we investigate the refinement method of PIRES+, and propose certain constraints to preserve liveness and boundedness of PIRES+.
To explore the preservation of liveness and boundedness of the refinement approaches, the concepts of the state, liveness, and boundedness of PIRES+ should be presented.
Definition 20. 
S = M v , J is said to be a state of PIRES+ model N = P , T , F I , F O , I , M 0 , where M v R M 0 (where R M 0 is the marking reachable set), and J : T R + # (where # denotes the unusable status).
Definition 21. 
S 0 = M 0 , J 0 with J 0 t = 0   M 0   p W p , t   p t # ,     o t h e r w i s e (where W p , t denotes the weight function on p , t ) is called the initial state of N .
Definition 22. 
Let Z = P , T , F I , F O , I be the skeleton of N = P , T , F I , F O , I , M 0 . Σ = Z , S 0 (where S 0 = M 0 , J 0 ) is called the PIRES+ net system of   N = P , T , F I , F O , I , M 0 .
Definition 23. 
Let S be a reachable state, and t T . If   S R N S , S R N S , such that S t , then t is said to be live. If t ,   t is live, then Σ = Z , S 0 is said to be live.
Definition 24. 
If S R N ( S 0 ), K > 0 (where K is a natural number) such that M p K , then p is called bounded. For   p , if p is bounded, then the PIRES+ net system Σ = Z , S 0 is said to be bounded.
In order to investigate liveness and boundedness preservations of the refinement operations, the concept of the PIRES+ place-closed net system should be proposed.
Definition 25. 
Σ ¯ = ( Z p ¯ ,   S p 0 ¯ ) is called a place-closed PIRES+ net system if we add a transition t p (where its transition delay is d t p , d t p + , and the transition function is f t p ) and arcs p , t p | p p p ,   { t p , p | p p p } , to Z p , S p 0 and the marking of Z p , S p 0 is preserved.
In the following, the preservation of liveness and boundedness for PIRES+ will be studied.
Theorem 3. 
Suppose PIRES+ net system Σ = Z , S 0 is obtained from Σ = Z , S 0 by the refinement operation Re f p p p , N p . If p p i n p M 0 p 0 p P , then Σ = Z , S 0 is live iff Σ = Z , S 0 and Σ ¯ = ( Z p ¯ ,   S p , 0 ¯ ) are live.
Proof. 
(If) t T , there exists t T or t T p in Σ = Z , S 0 . According to Supposition 1, for S R M 0 (where S = M P p p , M p ), there exists M R M 0 and M p R M p , 0 . If t T , according to Definition 23, M ¯ R M , S ¯ t for M R M 0 . According to Definition 23, Definition 15, and Supposition 1, S 0 ¯ = M P p p , M p , J 0 R M , such that S ¯ t (where M ¯ R M , M p ¯ R M p ). So, in Σ = Z , S 0 , t is live. If t T p , according to Definition 23, M p ¯ R M p , such that S p ¯ t . According to Definition 23, Definition 15, and Supposition 1, S 0 ¯ = M P p p , M p , J 0 R M , such that S ¯ t . Then, t is live in Σ = Z , S 0 .
(Only-if) Let Σ = Z , S 0 be live. Suppose that Σ = Z , S 0 is not live, that is, S R S 0 , t T , S ¯ R S , such that ¬ S ¯ t . Suppose S P p p , 0 σ , τ S σ ¯ , τ ¯ S ¯ , where σ ¯ , σ T , and S P p p , 0 is the projection of S on P p p . Next, we add corresponding transition step σ p of Σ p = Z p , S p , 0 and obtain σ , σ * T , S P p p , 0 σ , τ S P p p σ ¯ , τ ¯ S P p p . According to Definition 23, Definition 15, and Supposition 1,   S 0 σ , τ S σ , τ S ¯ , the projection of S on Σ ¯ is S ¯ , then t T , S R S 0 , S ¯ R S , such that ¬ ( S ¯ t ) ¬ ( S ¯ t ) . That conflicts with the liveness of Σ = Z , S 0 . Hence, there exist S 0 , S 0 R S 0 , such that Σ = Z , S 0 obtained from ( Z , S 0 ) is live and Σ p = Z p , S p , 0 obtained from ( Z , S 0 ) is live. Since p p i n { p M 0 p > 0 p P } , then Σ = Z , S 0 and Σ ¯ = ( Z p ¯ ,   S p , 0 ¯ ) are live. □
Theorem 4. 
Suppose that the PIRES+ net system Σ = Z , S 0 is obtained from Σ = Z , S 0 by refinement operation Re f p p p , N p . Σ = Z , S 0 is bounded iff Σ = Z , S 0 and Σ ¯ = ( Z p ¯ ,   S p , 0 ¯ ) are bounded.
Proof. 
(If) Since Σ = Z , S 0 is bounded, p P , k 1 > 0 such that S R S 0 , M p k 1 . Obviously, p P p p , M P p p p k 1 . Since Σ ¯ = ( Z p ¯ ,   S p , 0 ¯ ) is bounded, then for every p P p , k 2 > 0 , such that S P R S p 0 , M P p k 2 . Let k = k 1 + k 2 , by Definitions 12–15 and Supposition 1, p P , S R S 0 , M p = M P p p , M p p k .   By Definition 24, Σ = Z , S 0 is bounded.
(Only-if) Without loss of generality, suppose Σ = Z , S 0 is not bounded, such that p P , k > 0 , S R S 0 ,   M p > k . By Definitions 12–14, and Supposition 1, k > 0 , S R S 0 ,   M p > k . That conflicts with the fact that Σ = Z , S 0 is bounded.
Note that, by Supposition 2, Definitions 15, 16, and Theorems 3 and 4, we can investigate the preservation of liveness and boundedness of the PIRES+ place set refinement operation. □
Theorem 5. 
Suppose P p = p 1 , p 2 , ,   p m m 2 is the PIRES+ place set of N , and p i , p j P p (where i j ), p i p j = and p i p j = . Let Σ = Z , S 0 be obtained from Σ = Z , S 0 using the PIRES+ place set refinement operation Re f p s e t P s e t , N s e t . If p p p j i n p M 0 p 0 p P (where j = 1 , 2 , 3 , , m ), then Σ = Z , S 0 is live if and only if Σ = Z , S 0 and Σ p j ¯ = Z p j ¯ , S p j 0 ¯ (where   j = 1 , 2 , 3 , , m ) are live.
Proof. 
Since P p = p 1 , p 2 , , p m m 2 is the place set of N , and   p i , p j P p (where i j ), p i p j = and p i p j = , we can refine the places of P p one by one. First, let Σ 1 = Z 1 , S 1 , 0 be obtained from Σ = Z , S 0 using N p 1 to replace p 1 of Σ = Z , S 0 . Since p p p 1 i n { p M 0 p > 0 p P } , by the proof process of Theorem 3, Σ 1 = Z 1 , S 1 , 0 is live if and only if Σ = Z , S 0 and Σ p 1 ¯ = Z p 1 ¯ , S p 10 ¯ are live. Second, let Σ 2 = Z 2 , S 2 , 0 be obtained from Σ 1 = Z 1 , S 1 , 0 using N p 2 to replace p 2 of   Σ 1 = Z 1 , S 1 , 0 . Since p p p 2 i n { p M 10 p > 0 p P } , by the proof process of Theorem 3, Σ 2 = Z 2 , S 2 , 0 is live if and only if Σ 1 = Z 1 , S 1 , 0 and Σ p 2 ¯ = Z p 2 ¯ , S p 20 ¯ are live. In the case of p 3 , , p m , we can prove it in the same way. So, Σ = Z , S 0 is live if and only if Σ = Z , S 0 and Σ p j ¯ = Z p j ¯ , S p j 0 ¯ (where   j = 1 , 2 , 3 , , m ) are live. □
Theorem 6. 
Suppose P p = p 1 , p 2 , , p m m 2 is the place set of N , and p i , p j P p (where i j ), p i p j = and p i p j = . Let Σ = Z , S 0 be obtained from Σ = Z , S 0 using the PIRES+ place set refinement operation Re f p s e t P s e t , N s e t . Σ = Z , S 0 is bounded if and only if Σ = Z , S 0 and Σ p j ¯ = Z p j ¯ , S p j 0 ¯ (where j = 1 , 2 , 3 , , m ) are bounded.
Proof. 
Since P p = p 1 , p 2 , , p m m 2 is the place set of N , and   p i , p j P p (where i j ), p i p j = and p i p j = , we can refine these places p 1 , p 2 , , p m one by one. First, let Σ 1 = Z 1 , S 1 , 0 be obtained from Σ = Z , S 0 using N p 1 to replace p 1 of Σ = Z , S 0 . By the proof process of Theorem 4, Σ 1 = Z 1 , S 1 , 0 is bounded if and only if Σ = Z , S 0 and Σ p 1 ¯ = Z p 1 ¯ , S p 10 ¯ are bounded. Second, let Σ 2 = Z 2 , S 2 , 0 be obtained from Σ 1 = Z 1 , S 1 , 0 using N p 2 to replace p 2 of Σ 1 = Z 1 , S 1 , 0 . By the proof process of Theorem 4, Σ 2 = Z 2 , S 2 , 0 is bounded if and only if Σ 1 = Z 1 , S 1 , 0 and Σ p 2 ¯ = Z p 2 ¯ , S p 20 ¯ are bounded. In the case of p 3 , , p m , we can prove it in the same way. So, Σ = Z , S 0 is bounded if and only if Σ = Z , S 0 and Σ p j ¯ = Z p j ¯ , S p j 0 ¯ (where   j = 1 , 2 , 3 , , m ) are bounded. □

6. Application

The contribution of this work is to propose the place refinement operation and the place set refinement operation and verify the relevant important properties. To demonstrate the effectiveness of these refinement approaches, we use the refinement approaches for PIRES+ to model and analyze an embedded control system.
With the rapid development of communication technology, the frequency of communication technology innovation is gradually accelerating. 5G, as a new generation cellular mobile network, has its advantages of excellent wide area coverage, good mobility, low price, and high sharing of WLAN. In the actual network, cellular communication network and WLAN are two independent systems.
As we all know, WLAN is the product of the combination of computer network and wireless communication technology. It uses radio frequency technology (RF) to replace the old twisted pair to form a local area network. WLAN has many corresponding access specifications, all of which are in IEEE 802.11 standard. There is mainly a/b/ac/ad/n/ac. At present, 802.11.ac is widely used. When a piece of information is received through the wireless network, these information data are processed and decoded by the physical layer, data link layer, network layer, transport layer, and application layer, then restored to the most original information transmitted by the sender. We have simplified the structure of the transmission process, analyzed the whole information processing process from a macro perspective.
In order to effectively realize the real integration between heterogeneous networks, this section applies the refinement method of PIRES + proposed above to the modeling and analysis of mobile terminal network communication system. The refined operation of the network system can effectively achieve the integration of heterogeneous networks and accurately respond to the system workflow, and facilitate the future improvement and migration of the system. Next, the cellular mobile communication, WLAN network, and digital signal processing process of the mobile terminal network communication system will be modeled and analyzed.

6.1. Constructing a PIRES+ Model

We will construct an embedded control system’s PIRES+ model using the place set refinement operation. First, an abstract PIRES+ model of an embedded control subsystem will be presented. Second, the refined PIRES+ model is obtained using the PIRES+ refinement operations. The embedded control system’s abstract model ( N ) is illustrated in Figure 3.
In Figure 3, p 1 : cellular network signal processing part; p 7 : digital signal processing part; p 11 : WLAN signal processing part.   t 1 : convert electromagnetic wave to RF-Radio Frequency;   t 2 : the baseband information is obtained by adjusting the filter;   t 3 : start digital signal processing;   t 4 : finish digital signal processing; t 5 : pulse code modulation; t 6 : verify WLAN signal password; t 7 : the signal received from the antenna is converted into AC signal.
The subsystem N 1 is displayed in Figure 4. N 1 is the PIRES+ model of cellular network signal processing part.   t p 11 : adjust audio;   t p 12 : perform human-computer interaction;   t p 13 : finish current signal processing and initialize the system; t p 14 : the antenna receives the electromagnetic wave signal sent by the base station. There exist transition functions f p 11 , f p 12 , f p 13 , f p 14 associated with transitions t p 11 ,   t p 12 ,   t p 13 , t p 14 , respectively. There exists transition set function f p 1 of subnet   N 1 , where f p 1 = f p 11 f p 12 f p 13 f p 14 . [ a p 11 , b p 11 ], [ a p 12 , b p 12 ], [ a p 13 , b p 13 ], [ a p 14 , b p 14 ], are transition delay intervals associated with transitions t p 11 , t p 12 , t p 13 , t p 14 respectively. [ d p 1 , d p 1 + ] is the transition delay interval of subnet N 1 , where d p 1 = a p 11 + a p 12 + a p 13 + a p 14 ,   d p 1 + = b p 11 + b p 12 + b p 13 + b p 14 .
The subsystem N 2 is displayed in Figure 5. N 2 is the PIRES+ model of the digital signal processing part, where t p 21 , t p 22 , t p 23 , t p 24 , t p 25 , t p 26 , represent a series of signal processing processes, such as acquisition, filtering, transformation, spectrum analysis, estimation, recognition, etc. There exist transition functions f p 21 ,   f p 22 ,   f p 23 ,   f p 24 ,   f p 25 ,   f p 26 , associated with transitions t p 21 , t p 22 , t p 23 , t p 24 , t p 25 , t p 26 , respectively. There exists transition set function f p 2 of subnet N 2 , where f p 2 = f p 21 f p 23 f p 22 f p 24 f p 25 f p 26 . [ a p 21 , b p 21 ], [ a p 22 , b p 22 ], [ a p 23 , b p 23 ], [ a p 24 , b p 24 ], [ a p 25 , b p 25 ], [ a p 26 , b p 26 ] are transition delay intervals associated with transitions t p 21 , t p 22 , t p 23 , t p 24 , t p 25 , t p 26 , respectively. There exists transition delay interval [ d p 2 , d p 2 + ] of subnet N 2 , where d p 2 = a p 21 + max a p 23 + a p 24 , a p 22 + a p 25 + a p 26 , d p 2 + = b p 21 + max b p 22 + b p 25 , b p 23 + b p 24 + b p 26 .
The subsystem N 3 is displayed in Figure 6. N 3 is the PIRES+ model of the WLAN signal processing part, where t p 31 : human-computer interaction part;   t p 32 : finish the current signal processing and initialize the system; t p 33 : the terminal receives WLAN signals from different sources. There exist transition functions f p 31 ,   f p 32 ,   f p 33 , associated with transitions t p 31 , t p 32 , t p 33 , respectively. There exists transition set function f p 3 of subnet N 3 , where f p 3 = f p 31 f p 32 f p 33 . There exist transition delay intervals [ a p 31 , b p 31 ], [ a p 32 , b p 32 ], [ a p 33 , b p 33 ] associated with transitions t p 31 , t p 32 , t p 33 , respectively. [ d p 3 , d p 3 + ] is the transition delay interval of subnet N 3 , where d p 3 = a p 31 + a p 32 + a p 33 ,   d p 3 + = b p 31 + b p 32 + b p 33 .
The refined PIRES+ model N (Figure 7) is obtained using the refinement method. Place p 1 , p 7 , and p 11 of N (Figure 3) are replaced by place subnet N 1 ,   N 2 , and   N 3 , respectively.
In Figure 7, corresponding to place subnet N 1 , the transition function of t 5   is f 5 , where f p 1 f 5 = f 5 . There exists a transition delay interval [ a 5 , b 5 ] associated with transition t 5 , where d p p 11 + d N 1 = d p 1 ,   d p p 11 + + d N 1 + = d p 1 + , that is a 5 + d N 1 = a 5 ,   b 5 + d N 1 + = b 5 . By place subnet N 2 , the transition function of t 3   is f 3 , where f p 2 f 3 = f 3 . There exists a transition delay [ a 3 , b 3 ] associated with transition t 3 , where d p p 21 + d N 2 = d p 7 ,   d p p 21 + + d N 2 + = d p 7 + , that is, a 3 + d N 2 = a 3 , b 3 + d N 2 + = b 3 . Corresponding to place subnet N 3 , the transition function of t 6   is f 6 , where f p 6 f 6 = f 6 . There exists a transition delay interval [ a 6 , b 6 ] associated with transition t 6 , where d p p 31 + d N 3 = d p 11 ,   d p p 31 + + d N 3 + = d p 11 + , that is a 6 + d N 3 = a 6 , b 6 + d N 3 + = b 6 .

6.2. Property Analysis of the PIRES+ Model

The preservation of several properties will be analyzed in this section.

6.2.1. Preservation of Reachability, Functionality, and Timing

Let PIRES+ subnet N 11 = P 11 , T 11 , F I 1 , F O 1 , I 1 , M 1 , 0 of   N (Figure 3), where P 11 = p 1 , p 2 , p 3 , p 8 , T 11 = t 1 , t 5 , F I 1 = p 1 , t 1 , p 8 , t 5 , F O 1 = { t 1 , p 2 , t 1 , p 3 ,   t 5 , p 1 }, I 1 = , M 1 , 0 p 8 . Let N 12 = P 12 ,   T 12 , F I 2 , F O 2 , I 2 , M 2 , 0 , where P 12 = p p 11 , p p 12 ,   p p 13 , p p 14 , p p 15 , p p 16   , p 2 , p 3 , p 8 , T 12 = { t 1 , t p 11 , t p 12 , t p 13 , t p 14 , t 5 }, F I 2 = { p p 11 , t p 11 , p p 12 , t p 12 ,   ( p p 13 ,   t p 12 )   p p 14 , t p 13 , (   p p 15 , t p 14 ),( p p 16 , t 1 ), p 8 , t 5 }, F O 2 = { t 1 , p 2 ,   t 1 , p 3 ,   t 5 , p p 11 , t p 11 , p p 12 , t p 11 , p p 13 , t p 12 ,   p p 14 ,   t p 13 , p p 15 ,   t p 14 , p p 16 } ,   I 2 = ,   M 2 , 0 p 8 .
Let PIRES+ subnet N 21 = P 21 , T 21 , F I 3 , F O 3 , I 3 , M 3 , 0 of   N (Figure 3), where P 21 = p 4 , p 5 , p 6 , p 7 , p 9 , p 8 , p 10 , T 21 = t 3 , t 4 , F I 3 = p 4 , t 3 , p 5 , t 3 , p 6 , t 3 , p 7 , t 4 , F O 3 = { ( t 3 , p 7 ) t 4 , p 8 , t 4 , p 9 , t 4 , p 10 ,   I 3 = , M 3 , 0 = ; Let N 22 = P 22 , T 22 ,   F I 4 ,   F O 4 , I 4 ,   M 4 , 0 , where P 22   = { p 4 ,   p 5 ,   p 6 ,   p 9 ,   p 10 ,   p p 21 ,   p p 22 ,   p p 23 ,   p p 24 ,   p p 25 ,   p p 26 ,   p p 27 , p p 28 , p 8 }, T 22 = t p 21 , t p 22 , t p 23 , t p 24 , t 3 , t p 26 , t 25 , t 4 , , F I 4 = p 4 , t 3 , p 5 , t 3 , p 6 , t 3 , p p 28 , t 4 , p p 21 , t p 21 ,   p p 22 , t p 23 ,   p p 23 , t p 22 ,   p p 24 ,   t p 24 ,   p p 25 , t p 25 , p p 26 ,   t p 26 , p p 27 , t p 26 , F O 4 = { t 3 , p p 21 , t 4 , p 8 , t 4 , p 9 ,   t 4 , p 10 , ( t p 21 , p p 22 ) ,   t p 21 , p p 23 , t p 23 , p p 24 , ( t p 22 , p p 24 ) , t p 22 , p p 25 , t p 24 ,   p p 26 , ( t p 25 , p p 27 ) , t p 26 , p p 28 }, I 4 = p p 23 , t p 23 , p p 25 , t p 24 , M 4 , 0 = .
Let PIRES+ subnet N 31 = P 31 , T 31 , F I 5 , F O 5 , I 5 , M 5 , 0 of   N (Figure 3), where P 31 = { p 10 , p 9 , p 11 , p 12 },   T 31 = t 6 , t 7 , F I 5 = p 10 , t 6 , p 9 , t 6 , p 11 , t 7 ,   F O 5 = t 6 , p 11 , t 7 , p 12 ,   I 5 = , M 5 , 0 ( p 11 ) . Let N 32 = ( P 32 , T 32 , F I 6 ,   F O 6 , I 6 , M 6 , 0 ) , where P 32 = { p 12 , p p 31 , p p 32 ,   p p 33 , p 9 , p p 34 , p p 35 , p 10 } , T 32 = { t p 31 , t p 32 ,   t p 33 ,   t 6 ,   t 7 ) ,   F I 5 = { p p 35 , t 7 ,   p p 31 , t p 31 , p p 32 , t p 32 , p 10 , t 6 , p p 34 , t p 33 , p p 33 , t p 33 , ( p 9 , t 6 )} ,   F O 5 = { t p 31 , p p 32 ,   t p 32 , p p 33 , ( t p 32 , p p 34 ) , t p 33 , p p 35 , t 7 , p 12 , t 6 , p p 31 } ,   I 6 = , M 6 , 0 p p 31 .
N is obtained from N by the place set refinement method, that is, p 1 is replaced by N 1 ,   p 7 is replaced by N 2 , and   p 11   is replaced by N 3 . According to Figure 3, Figure 4, Figure 5, Figure 6 and Figure 7, ①   f p 1 f 5 = f 5 ,   f p 2 f 3 = f 3   , and   f p 3 f 6 = f 6 ; ② d p p 11 + d N 1 = d p 1 ,   d p p 11 + + d N 1 + = d p 1 + ,   d p p 21 + d N 2 = d p 4 ,   d p p 21 + + d N 2 + = d p 4 + ,   d p p 31 + d N 3 = d p 7 ,   d p p 31 + + d N 3 + = d p 7 + ; ③ p 1 p 7 = , p 1 p 11 = , p 7 p 11 = , p 1 p 7 = , p 1 p 11 = , p 11 p 7 = . By Theorem 2, N and N have the same reachability, functionality, and timing.

6.2.2. Preservation of Liveness and Boundedness

Obviously,   Σ = Z , S 0 of N (Figure 3) is live and bounded. According to the PIRES+ place set refinement operation,   Σ = Z , S 0 of N (Figure 7) is obtained from Σ = Z , S 0 , i.e.,   p 1 is replaced by place subnet N 1 ,   p 7 is replaced by place subnet N 2 , and p 11 is replaced by subnet N 3 . Let Σ p 1 ¯ = Z p 1 ¯ , S p 1 , 0 ¯ be the place-closed PIRES+ net system of N 1 ,   Σ p 2 ¯ = Z p 2 ¯ , S p 2 , 0 ¯ be the place-closed PIRES+ net system of N 2 ,   Σ p 3 ¯ = Z p 3 ¯ , S p 3 , 0 ¯ be the place-closed PIRES+ net system of N 3 , By Definition 25 and the characteristics of subnets N 1 , N 2 and N 3 ,   Σ p 1 ¯ = Z p 1 ¯ , S p 1 , 0 ¯ , Σ p 2 ¯ = Z p 2 ¯ , S p 2 , 0 ¯ and Σ p 3 ¯ = Z p 3 ¯ , S p 3 , 0 ¯ are live and bounded. By Theorem 5 and Theorem 6, Σ = Z , S 0 is live and bounded.

6.3. Summary of the Modeling

The above system has clear structural hierarchy, time characteristics, and task priority requirements, so it is difficult to model with ordinary Petri net, colored Petri net, or PRES+. First, this example establishes the overall simplified model of mobile terminal communication network system, cellular mobile communication model based on embedded system, WLAN network model, and other component models. Then, the refinement operation is carried out to obtain the overall system model. Finally, through formal analysis, it is proven that the refined net system preserves the reachability, functionality, timing, liveness, and boundedness of the original net system. This modeling method solves the problem of direct modeling difficulty caused by the complexity of the system and the portability loss of some components in the overall modeling. The example effectively illustrates the feasibility and practicability of the refinement operation proposed in this paper and provides a more practical theoretical basis for the modeling of some embedded systems.

7. Conclusions

Embedded systems are widely used in various devices and are becoming more and more complex with increasing requirements. To facilitate the verification and design of embedded systems, PIRES+ is introduced. PIRES+ has great expressive power and many applications in verification, modeling, and analysis of embedded systems.
However, the problem of state space explosion is a disadvantage for PIRES+’s ability to model, analyze, and verify large, complex systems. In order to resolve the state space explosion of Petri nets, there are three popular transformations in the literature, namely synthesis approach, refinement approach, and reduction approach. In order to model, analyze, and verify large complex embedded systems, and to solve PIRES+’s state space explosion problem, we have proposed the place refinement approach and the place set refinement approach for PIRES+. Compared with refinement methods for ordinary Petri nets, CPNs, and PRES+, these refinement methods can nicely describe certain characteristics of embedded systems. We have also investigated the property preservation of these refinement approaches. During the refining process, under certain constraints, reachability, timing, functionality, liveness, and boundedness will be preserved. The refinement methods for PIRES+ can be used to nicely resolve design problems of embedded systems.
Of course, the refinement operation methods proposed in this paper are only applicable to the operation of place in PIRES+, without considering the refinement operation of transition in PIRES+. At the same time, this paper only carries out qualitative research from the formal aspect, and lacks certain quantitative analysis and system simulation.
In the future, some quantitative analysis and system simulation for the PIRES+’s refinement operation should be studied. Other more general refinement, synthesis, or reduction approaches for PIRES+ should also be investigated, for example, a place-bordered refinement operation, or synthesis operation methods for PIRES+ and their applications.
Fuzzy linear programming [40,41] is a generalization of classical linear programming, which blurs the boundary of linear constraints. Under loose constraints, we can obtain the optimization conditions and optimization extremum. The combination of the fuzzy linear programming and the refinement operation may become another interesting research direction in the future.

Author Contributions

Conceptualization, C.X. and Z.W. (Zhuangzhuang Wang); methodology, C.X.; validation, C.X., Z.W. (Zhuangzhuang Wang) and Z.W. (Zhong Wang); formal analysis, C.X. and Z.W. (Zhuangzhuang Wang); investigation, C.X. and Z.W. (Zhong Wang); resources, C.X.; writing—original draft preparation, C.X.; writing—review and editing, Z.W. (Zhuangzhuang Wang); visualization, Z.W. (Zhong Wang); supervision, C.X.; project administration, C.X.; funding acquisition, C.X. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the Natural Science Foundation of Shandong Province (Grant: ZR2016FM19).

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. A Petri net with inhibitor arcs.
Figure 1. A Petri net with inhibitor arcs.
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Figure 2. A PIRES+ model.
Figure 2. A PIRES+ model.
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Figure 3. The abstract model N .
Figure 3. The abstract model N .
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Figure 4. The subnet model N 1 .
Figure 4. The subnet model N 1 .
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Figure 5. The subnet model N 2 .
Figure 5. The subnet model N 2 .
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Figure 6. The subnet model N 3 .
Figure 6. The subnet model N 3 .
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Figure 7. The refined model N .
Figure 7. The refined model N .
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Xia, C.; Wang, Z.; Wang, Z. The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems. Electronics 2022, 11, 1389. https://doi.org/10.3390/electronics11091389

AMA Style

Xia C, Wang Z, Wang Z. The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems. Electronics. 2022; 11(9):1389. https://doi.org/10.3390/electronics11091389

Chicago/Turabian Style

Xia, Chuanliang, Zhuangzhuang Wang, and Zhong Wang. 2022. "The Refinement of Petri Net with Inhibitor Arcs Based Representation for Embedded Systems" Electronics 11, no. 9: 1389. https://doi.org/10.3390/electronics11091389

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