Circuit Design of 3- and 4-Bit Flash Analog-to-Digital Converters Based on Memristors
Round 1
Reviewer 1 Report
The paper Circuit desgin of 3-and 4.bit flash ADC based on memristor It's a good article showing a new solution for flash converters. Congratulations
Some tips to take into account:
why the use of BSIM4 only?
line 7: 50nm correct to 50 nm, also in lines 8,9,10,46,47 and 142, also table 3 the same.
line 30, remove the name Ref.
line 31: Digital Signal Processing (D S and P CAPS), also in lines: 32, 33, 48, 50, 51
line 35: acronym SAR add (Successive Approximation Register)
In my opinion the section 2 can be included: expression of memristor is characterized by its memristance function describing the charge-dependent rate of change of flux with charge. Also, the flux as the time integral of the voltage, and charge as the time integral of current.
Figure 3 legend is negative edge-triggered according to Table 1 and FF-D figure
Section 4.3 after Figure 9 would be important a graphic about the power consumption per bit and total
Section 5, please write the future work.
Author Response
Please see the attachment
Author Response File: Author Response.pdf
Reviewer 2 Report
This works deals with a memristor-based analog to digital converter. Although only simulation results are presented, the results obtained are of interest.
Anyway, I have some questions:
- - The memristor spice model used for the simulations was presented in 2013 (ref.[28] is a work of this year). Which are the advantages of this model over other novel models?
- - Logical OR/NOR AND/NAND gates and D-flip-flop have been implemented using memristors. What about the propagation delays of these devices? Only the propagation delay of the full converter is presented.
- - One important problem of memristor devices is their variability. For instance, the set and reset voltages are not identical for every measurement. Have the authors studied the effect of the variability on the converter?. Could this affect the differential and the integral nonlinearities?
Author Response
Please see the attachment.
Author Response File: Author Response.pdf