Research on Global Deterministic Direct Forwarding and Scheduling of Mixed Flow Based on Time-Sensitive Network in Substation

Abstract

Time-sensitive networks enable the high-quality mixed transmission of various types of business flows. However, the Time-Aware Scheduler mechanism fails to address the issue of interference in data flows with the same priority. This paper conducts an in-depth analysis of the store-and-forward mechanism in switches, combining it with the characteristics of critical GOOSE and SV-type flows in substations. By introducing methods such as setting offsets and allocating redundant time slots to the data flow of the transmitter in the TAS scheduling mechanism, all factors that cause conflicting interference to the data flow transmission in the TSN network are solved, and the uncertain queuing delay is eliminated. The proposed scheduling algorithm, compared to the TAS scheduling algorithm of the FIFO rule, achieves a maximum reduction of 34.35% in the transmission delay of critical business flows, while the jitter is controlled below 10 μs. Compared to the strict priority algorithm, it reduces the transmission delay by 40.26% while maintaining the standard deviation of delay within 1.59%. The maximum transmission delay and the minimum transmission delay of the data flow scheduled in this paper are between the theoretical boundary values without queuing delay, which satisfies the deterministic transmission of critical business flows under high load conditions, and provides support for future substation integrated networking and high load applications.

1. Introduction

With the continuous development of information technology in the manufacturing industry, traditional industries are accelerating their transformation and development. In order to promote the organic integration of IT (Information Technology) and OT (Operational Technology) and realize the deterministic transmission of critical information between industrial equipments, time-sensitive networks with low latency and high reliability have emerged. The IEEE 802.1 TSN (time-sensitive network) task group is committed to standardizing real-time and secure mechanisms of Ethernet, enabling the coexistence of time-sensitive and non-time-sensitive flows in Ethernet, and providing deterministic delay assurance for critical communications [1]. OT transmits real-time data required by time delay, and IT transmits non-real-time interactive data. Heterogeneous networks using TSN technology can achieve shared network bandwidth between them [2]. The core of time-sensitive networking is the TAS (Time-Aware Scheduler) gate control mechanism. Accurate synchronization of the clocks of each time sensor is the premise of all orderly scheduling [3]. TAS defines the concept of time slots, which reserves transmission time slots for critical flows with precise reservation characteristics, closes the transmission gate for other data flows, and avoids the impact of data frames with other priorities on the transmission of specific priority data flows [4]. The critical GOOSE business flow transmits tripping or control information, which is not conducive to scheduling because of its sudden change period. The critical SV business transmits the collected information, and the fixed 1 s slot transmits 4000 frames, which takes up a lot of bandwidth. GOOSE business flows and SV business flows both have very high real-time requirements, and the maximum transmission delay of GOOSE type and SV type flow is less than 3 ms, and no data packet loss is required, and no retransmission is performed [5]. Combining substations with TSN for transmission, it ensures low delay and high reliability for deterministic transmission of critical business flows, simplifying the network structure in substations. This enables the coexistence of GOOSE business flows, SV business flows, and background traffic flows while guaranteeing deterministic transmission. The main contributions of this paper are as follows:

• Combined with the storage and forwarding model in the TAS mechanism of the switch, a deterministic transmission model without queuing delay for critical business flows is established;
• Aiming at the problem of processing delay jitter and switch port conflict caused by data flow aggregation in actual switches, a scheduling algorithm combining data flow offset set at the transmitter and redundant time slot resource allocation for data flow is proposed to further avoid conflict interference between each critical data flow;
• The OMnet++ test environment is built to verify that the proposed algorithm combined with the TAS scheduling mechanism solves the impact between various data flows and achieves high-quality deterministic transmission.

This paper is organized as follows. The related work is shown in Section 2. We introduce deterministic scheduling model of critical TT flow without queuing delay under the combination of storage and forwarding mechanism of switch and TAS scheduling in Section 3. The global deterministic scheduling algorithm based on offset transmission and redundant slot allocation is proposed in Section 4. Section 5 and Section 6 present the evaluation results and conclusions, respectively.

2. Related Work

To ensure the real-time transmission of critical data flows in wired local area networks, strict priority algorithm is the most common scheduling. However, the strict priority algorithm has significant delay jitter and cannot solve the interference issue between business flows of the same priority [6]. In reference [7], a constrained optimal model for load-balancing communication in substations is established, along with an improved KSP (K-Shortest Path) algorithm, to achieve load-balancing routing and rapid identification of the optimal transmission path, thereby enhancing network stability. However, such load-balancing scheduling is too broad for strong real-time data flow transmission and cannot achieve precise scheduling for critical data flows. In reference [8], the maximum delay calculation model for data frame transmission in substations is established by analyzing the forwarding principle of IEEE 802.1Qbv switches. Through simulation analysis, the effectiveness of TSN technology in meeting the real-time requirements of critical substation business is validated. In the study of hybrid algorithms related to local area networks such as new energy and sustainable power generation, researchers have established flow scheduling algorithms based on deep learning, which use machine learning algorithms to cluster data according to time-critical characteristics, and quickly process mixed data according to cluster/priority to reduce the processing time of high-delay sensitive information [9]. Optimization algorithms for specific goals can reduce the interference of non-critical data flows on critical data flows at the software level. However, communication networks such as substations store a large amount of IT flows based on TCP/IP (Transmission Control Protocol/Internet Protocol) MMS frames. This kind of flow is sent randomly and has a retransmission mechanism. Using deep learning-based optimization models, it is difficult to determine the port occupancy time of MMS data frames and isolate the impact of non-real-time IT flow sent completely randomly into critical data flows [10]. However, the method of using particle swarm optimization algorithm to establish the objective function of the optimization object can be easily categorized as the local optimal solution, which cannot effectively realize the conflict-free situation without queuing delay of all the critical data flows in this paper [11]. The gating mechanism of TSN matches low priority to non-real-time IT flow such as MMS messages, and matches different transmission queues for each data flow [12]. The TAS gating mechanism completely blocks the queue transmission of non-real-time flow when transmitting critical data flows, and easily avoids the influence of non-key data flows on critical data flows at the hardware driver level. In view of the low real-time requirements of IT flow transmission such as MMS messages, non-real-time data flows can be transmitted using the next gated time slot, and the effective transmission of MMS messages can be realized at the expense of a certain real-time performance, as shown in Figure 1. TSN uses the time synchronization mechanism defined by 802.1AS to achieve a global unified real-time clock with nanosecond accuracy for devices in the global network [13]. Based on the synchronization clock and gating mechanism with nanosecond precision, on the basis of solving the adverse effects of non-critical data flows on critical data flows, the data flows are offset at the sender, so that each critical data flow avoids interference with each other when transmitting in the global network, and it is possible to achieve the theoretical best deterministic transmission without the queuing delay.

TSN research focuses on optimizing scheduling tables to reduce end-to-end frame delay and balance network loads to avoid congestion. Based on the Satisfiability Modulo Theories (SMT) method, reference [14] proposes a TSN scheduling method suitable for industrial scenarios, which effectively reduces the number of time slots in the Generalized Credit-based Shaper (GCL) and simplifies GCL configuration, making it more efficient. These algorithms only guarantee low end-to-end delays for newly added flows but do not ensure that the addition of these flows will not significantly impact other flows. In reference [15], Ojewale et al. address the issue of network congestion by recalculating the paths of time-triggered flows in congested conditions and computing as many disjoint paths as possible for each flow to evenly distribute the transmission paths. With more and more data flows in the future converged in networking, the use of TSN technology can easily solve the full impact of non-real-time data with random cycles on real-time critical data flows at the hardware-driven level. However, a large number of critical data flows converge in the switch. Now, the literature mostly uses the method of path constraint load balancing, but the industrial environment is usually used for the reason of distributed placement of venues and equipment. The transmission path is relatively single, and the use of TSN technology to schedule critical data flows will still be affected by FIFO to produce queuing delay. In this paper, the problem of data flow occupying port is solved in time by combining the offset transmission of data flow at the transmitter and the gating of switch, and all the reasons for queuing delay are fully analyzed. TAS’s cyclical slot resources are significantly greater than the slot resources required for data flow transmission. This paper aims to, based on TSN’s implementation of transmitting critical data flows alongside non-critical data flows, revise offsets to ensure that critical data flows’ slot resources do not conflict. It disperses the slot resources of data flows within the gate-controlled cyclical period to avoid conflicts. TSN is based on a store-and-forward network, and the slot occupation of data flows within the network is not linearly related. The goal is to find a scheduling rule that allows for a single scheduling at the switch where data flows converge, enabling direct deterministic forwarding in the network without queuing delays. This approach avoids the use of large-scale, complex SMT solvers to perform intricate calculations for each node in the global network.

3. Scheduling Model

Common data flows can be classified into time-sensitive flows (TT flows) and non-time-sensitive flows (non-TT flows). TT flows have strict quality service requirements and are typically found in periodic real-time applications. Non-TT flows have less stringent requirements for delay jitter. Based on the periodicity of TT flows, they can be further divided into Periodic TT (PTT) flows and Sporadic TT (STT) flows. PTT flows exhibit periodic behavior, while STT flows do not. In the context of substations, critical business flows, such as GOOSE and SV flows, are included. GOOSE flows are transmitted in a heartbeat manner, and the transmission period can change during bursts, making them STT flows [16]. On the other hand, SV flows are strictly transmitted according to a pre-defined period, making them PTT flows. When an emergency occurs, the period of the GOOSE flow changes, making it unable to be combined with the gated periodic scheduling mechanism on TSN for periodic scheduling. Therefore, the transmission queue control for the GOOSE flow needs to remain open continuously. However, even if the GOOSE packets are assigned a higher priority, they must be in waiting when SV packets are being transmitted, resulting in unreliable queuing delay. Although the timing of emergency cannot be determined in a timely manner, this paper introduces a recovery period in addition to the common three-segment time-based transmission cycle, allowing the GOOSE flow to return to a normal transmission state and maintain a regular cyclic sequence. The variation form of the mutation period is illustrated in Figure 2. This enables the GOOSE packets to be scheduled in a periodic TT flow manner during the normal period. The recovery period ${\mathrm{T}}_4$ is calculated as presented in (1).

$${\mathrm{T}}_4=\left(2{\mathrm{T}}_0-{\mathrm{T}}_1-{\mathrm{T}}_2-{\mathrm{T}}_3\right)$$

(1)

In a store-and-forward network, the ideal TT flow scheduling type is where the data frame, upon arrival at the switch’s queuing buffer queue, is directly forwarded by the PHY chip. Similarly, the next data frame arriving at the queuing buffer layer of the switch can also be sent directly through the PHY (Physical) chip, avoiding the queuing delay caused by the data frame waiting for transmission in the MAC (Medium Access Control) queuing buffer layer. The system scheduling in this case can be abstracted as the CPU Multilevel Pipeline Scheduling Type (CPU-MPST), which resembles the pipeline scheduling type used when the CPU processes task processes. In the CPU-MPST type, the TT flow, upon arrival at the switch’s queuing buffer queue, does not need to wait in a queue for PHY chip transmission but can be directly forwarded in a pipeline-like manner, avoiding multiple data frames being in the same task state simultaneously, resulting in frame collisions and queuing delays.

As shown in Figure 3, in time-sensitive networks, the end-to-end delay of a time-triggered flow $f_n$ from the source node to the destination node, it is composed of four components: transmission delay, propagation delay, processing delay, and queuing delay. This can be expressed as Equation (2).

$$D_n=d_{tran{s}_n}+d_{pro{p}_n}+d_{pro{c}_n}+d_{queu{e}_n}$$

(2)

$$D_n=\frac{f_{siz{e}_n}}{BW}+\frac{L_n}{c}+d_{pro{c}_n}+d_{queu{e}_n}$$

(3)

Among them, $d_{tran{s}_n}$ is related to the message length and the bandwidth of the switch, where the switch’s bandwidth is primarily dependent on the performance of the PHY chip. $d_{pro{p}_n}$ is mainly determined by the link length and the propagation delay, as data travels at the speed of light in the link, and is typically in the nanosecond range within a local area network, and $d_{pro{p}_n}$ is negligible compared to the millisecond or microsecond transmission delays. $d_{pro{c}_n}$ is related to the performance of the switch, and empirical measurements show that the processing delay of the switch is nearly constant when underutilized. $d_{queu{e}_n}$ is generated when data frames wait in the switch’s queuing buffer queue for transmission by the PHYchip. By using the scheduling algorithm, queuing delays can be optimized and improved, and in the ideal case, the queuing delay can be reduced to zero, allowing direct forwarding of data flows upon reaching the switch’s queuing buffer layer. This paper eliminates unreliable queuing delays by introducing offsets to the data flows, resulting in time-triggered flow delays primarily consisting of transmission delay and processing delays. The value of the ideal deterministic transmission delay is calculated as presented in (4). All system variables and meanings of representation in this paper are shown in

Table 1. System variables and meaning of representation.

Variables	Description
$v_a$	Any node switch in the network
$v_{a-1}$	The previous hop switch of data flow on node switch $v_a$
$v_{a+1}$	The next hop switch of data flow on node switch $v_a$
${ES}_n$	Terminal node
$v_r$	The last convergence switch in the node switch $v_a$
$f_n$	The n-th time-triggered flow in the scheduling sequence
$f_m$	The data flow that has completed deterministic scheduled in the scheduling sequence
${pf}_n$	Periodic TT flow
${sf}_n$	Non-periodic TT flow
$D_n$	The transmission delay of the n-th data flow, the unit of the quantity of variation is μs.
$L_n$	The length of the link in the path of the n-th TT flow
$c_0$	Standard light speed, the quantity is 299,792.458 km/s
$T_i$	The i th variable transmission periods of the GOOSE flow
${TAS}_c$	In the TAS gating mechanism cycle period in TSN, the unit of the quantity of variation is μs.
${f_{size}}_n$	The frame length of each data frame in the periodic TT flow, the unit of the quantity of variation is Byte.
BW	The sending rate of the PHY chip, the unit of the quantity of variation is Mbps.
$d_{tran{s}_n}$	The transmission delay of the n-th TT flow at the network node switch, the unit of the quantity of variation is μs.
$d_{{proc}_n}$	The processing delay of the n-th TT flow at the network node switch, the unit of the quantity of variation is μs.
$d_{{quene}_n}$	The queuing delay of the n-th TT flow at the network node switch, the unit of the quantity of variation is μs.
$d_{{prop}_n}$	The propagation delay of the n-th TT flow at the network node switch, the unit of the quantity of variation is μs.
${T_{prd}}_n$	The transmission period of periodic TT flow, the unit of the quantity of variation is μs.
$T_{i{nit}_{n,i}^{v_a}}$	The start transmission time of the i-th data of TT flow $f_n$ at switch without the queuing delay, the unit of the quantity of variation is μs.
$T_{{ulti}_{n,i}^{v_a}}$	The complete transmission time of the i-th data of TT flow at the switch without the queuing delay, the unit of the quantity of variation is μs.
$T_{{slot}_{n,i}^{v_a}}$	The data frame of the data flow accounts for the time slot resources of the TAS cycle, the unit of the quantity of variation is μs.
${T_{offset}}_n$	Frame offset of TT flow $f_n$ at node $v_a$, the unit of the quantity of variation is μs.
${Offset}_n$	The offset of TT flow $f_n$ at the sender side, the unit of the quantity of variation is μs.
${Offse{t}_{corr}}_n$	Correction value for the offset of TT flow, the unit of the quantity of variation is μs.

.

$$D_n=d_{tran{s}_n}+d_{pro{c}_n}$$

(4)

4. Scheduling Algorithm

4.1. Redundant Time Slot Allocation Algorithm

When an emergency occurs, the period of the GOOSE service flow can change, and it is unable to synchronize with the periodic scheduling mechanism of TSN. Therefore, the transmission queue control of the GOOSE flow needs to be continuously open. By setting the heartbeat message transmission period of the GOOSE message, the regular GOOSE messages can be scheduled using the periodic TT flow in conjunction with the 802.1Qbv model. According to the specifications of the 802.1Qbv protocol, the TAS scheduling mechanism in TSN operates at the MAC layer, where the opening and closing of the gates take place. Only when the gate is open, the corresponding queue’s data flow will be transmitted by the PHY chip. When the queue is closed, the data flow needs to wait for the gate to open, resulting in the queuing delay. The data frames are transmitted between the opening time and closing time of the gate controlled by the TAS mechanism, as shown in Figure 4 [17].

According to the storage and forwarding mechanism, the opening time $T_{ini{t}_{n,i}^{v_a}}$ of the TAS-gated queued data flow $f_n$ is the time when the frame arrives at the switch queuing cache queue, and the transmission slot resource $T_{sol{t}_{n,i}^{v_a}}$ of the data frame is calculated as presented in Equations (4) and (5).

$$T_{ini{t}_{n,i}^{v_a}}=\left(d_{pro{c}_n}+d_{tra{n}_n}\right)\ast p_n^{v_a}+{\sum }_0^{v_{a-1}}{d}_{queu{e}_{n,i}^{v_{a-1}}}+i\ast T_{pr{d}_n}$$

(5)

$$T_{sol{t}_{n,i}^{v_a}}=\frac{f_{siz{e}_n}}{B{W}_{v_a}}$$

(6)

When there are multiple data flows with the same priority or high-priority data flow transmission, the opening time of this queue should be equal to the sum of the time slots of the high-priority data frame and the same priority data frame.

Simultaneously, the uncertainty of jitter in the storage and forwarding delay of data flows accumulates as the number of hops the frame transmits in the network increases. This leads to a mismatch in the transmission delay of data flows, resulting in abnormal data frame transmission. The jitter in processing delay, denoted as $T_{jitter}$, is calculated by (7), where $d_{pro{c}_{min}}$ represents the minimum processing delay of data frames, and $d_{pro{c}_{max}}$ represents the maximum processing delay of data frames.

$$T_{jitter}=d_{pro{c}_{max}}-d_{pro{c}_{min}}$$

(7)

When TAS allocates transmission time slots for data flows, it should allocate redundant time slots according to the jitter of processing delay. According to the maximum processing delay and the minimum processing delay, the opening time $T_{ini{t}_{n,i}^{v_a}}$ and $T_{ult{i}_{n,i}^{v_a}}$ closing time are calculated as shown in Equations (8) and (9).

$$T_{ini{t}_{n,i}^{v_a}}=\left(d_{pro{c}_{min}}+d_{tra{n}_n}\right)\ast p_n^{v_a}+{\sum }_0^{v_{a-1}}{d}_{queu{e}_{n,i}^{v_{a-1}}}+i\ast T_{pr{d}_n}$$

(8)

$$T_{ult{i}_{n,i}^{v_a}}=T_{ini{t}_n^{v_a}}+p_n^{v_a}\ast T_{jitter}+d_{tra{n}_n}+d_{queu{e}_{n,i}^{v_a}}$$

(9)

4.2. The Global Deterministic Scheduling Algorithm Based on Offset Transmission and Redundant Slot Allocation

The delay jitter of the data flow increases with the number of switches through which the data flow is transmitted, so this paper selects the convergence switch with the maximum jitter in data flow processing delay to sequentially schedule the global data flow. Finally, the sending offsets of the data frames are solved to satisfy the direct transmission requirement of the TT flow without queuing delay at the global node switches. Therefore, when calculating the transmission offset of each data flow, it should be based on the time slot resources with jitter boundary after allocating redundant time slot resources to completely avoid the conflict between critical data flows.

The Physical chip generates different transmission delays for data frames with different frame lengths. According to the store-and-forward mechanism, data frames can be scheduled for transmission only after they have been fully received by the switch. However, due to the different times of the switch to fully receive the data frame, the scheduling of the data flow will be confused. Sorting is based on different frame lengths, after the convergence switch $v_r$ completes the scheduling, and the time slot resource utilization in other hop switches $v_{r-1}$ is shown in Figure 5, which represents the convergence switch and represents the previous hop switch of the convergence switch.

According to this paper, the scheduling of data flows should prioritize scheduled data flows with larger frame lengths at the convergence switch of the last hop. This ensures that the data flows do not conflict with other nodes in the global network and avoids uncertain queuing delays. The proof is shown in Equations (10)–(14).

$$T_{ult{i}_{n,i}^{v_r}}=T_{ini{t}_{n+1,j}^{v_r}}$$

(10)

$$T_{ult{i}_{n,i}^{v_{r-1}}}=T_{ini{t}_{n,i}^{v_r}}-d_{tran{s}_n}-d_{proc}+p_n^{v_{r-1}}\ast T_{jitter}+d_{tran{s}_n}$$

(11)

$$T_{ult{i}_{n,i}^{v_{r-1}}}=T_{ult{i}_{n,i}^{v_r}}-T_{jitter}-d_{tran{s}_n}-d_{proc}$$

(12)

$$T_{ini{t}_{n+1,j}^{v_{r-1}}}=T_{ini{t}_{n+1,j}^{v_r}}-d_{tran{s}_{n-1}}-d_{proc}$$

(13)

After the aggregation switch $v_r$ completes the conflict-free scheduling of data flows $f_n$ and $f_{n+1}$, as shown in Equations (10)–(13). According to Equation (14), the data flow also does not collide in the previous hop switch, and the time slot resources are more and more distant. This proof can guarantee that the data flow will not collide at any node in the global network.

$$[T_{ini{t}_{n,i}^{v_{r-1}}},T_{ult{i}_{n,i}^{v_{r-1}}}\left]\cap \right[T_{ini{t}_{n+1,j}^{v_{r-1}}},T_{ult{i}_{n+1,j}^{v_{r-1}}}]=0$$

(14)

If the data frames have the same size, Equation (15) is used to calculate the frame offset, $T_{offse{t}_n^{v_r}}$, in the MAC layer’s queue buffer at the convergence switch $v_r$, under the assumption of no queuing delay transmission mode. Data flows with larger frame offsets are scheduled in advance. If the data frames have the same size, Equation (15) is used to calculate the frame offset, $T_{offse{t}_n^{v_r}}$, in the MAC layer’s queue buffer at the convergence switch $v_r$, prioritizing the scheduling of data flows with larger frame offsets and fully utilizing the offset naturally generated during the data flow forwarding process.

$$T_{offse{t}_n^{v_r}}=\left(d_{pro{c}_{min}}+d_{tra{n}_n}\right)\ast p_n^{v_r}$$

(15)

The specific process of the scheduling algorithm is as follows:

Step 1: Firstly, based on the frame length of the data flows and the frame offset $T_{offse{t}_n^{v_r}}$ at which each data flow arrives at the convergence switch, the scheduling order of the data flows is determined. The cycle period of the TAS gating mechanism ${TAS}_c$ is the maximum common multiple of the transmission cycle of each critical data flow.

Step 2: To address the issue of processing delay jitter, this paper proposes the allocation of deterministic redundant slot resources for the transmission slots. This ensures that randomly arriving data frames can be transmitted within the specified time slots. Based on Equations (16) and (17), the time slot resources $[T_{ini{t}_{n,i}^{v_r}},T_{ult{i}_{n,i}^{v_r}}]$ at node $v_r$ are calculated for the i-th data frame of the current periodic TT flow $f_n$.

$$T_{ini{t}_{n,i}^{v_r}}=\left(d_{pro{c}_{min}}+d_{tra{n}_n}\right)\ast p_n^{v_r}+i\ast T_{pr{d}_n}$$

(16)

$$T_{ult{i}_{n,i}^{v_r}}=T_{ini{t}_n^{v_r}}+p_n^{v_r}\ast T_{jitter}+d_{tra{n}_n}$$

(17)

Step 3: The data flow scheduling sequence is determined according to step 1. The conflict-free detection of direct forwarding of the time slot resources [$T_{ini{t}_{n,i}^{v_r}},T_{ult{i}_{n,i}^{v_r}}$] of the data frame scheduled in the data flow $f_n$ and the time slot resources [$T_{ini{t}_{m,j}^{v_r}},T_{ult{i}_{m,j}^{v_r}}$] of the data frame in the scheduled data flow $f_m$ is performed. If the time slots of the two do not coincide, the critical data flow can be forwarded directly, as follows:

$$[T_{ini{t}_{n,i}^{v_r}},T_{ult{i}_{n,i}^{v_r}}\left]\cap \right[T_{ini{t}_{m,j}^{v_r}},T_{ult{i}_{m,j}^{v_r}}]=0$$

(18)

Step 4: If the time slots of the current scheduled data flow $f_n$ and the scheduled completed data flow $f_m$ overlap, it is considered that the conflict-free constraint of direct forwarding is not satisfied, which will cause uncertain queuing delay. According to (19), the offset of the data flow $f_n$ is modified so that the current scheduling data flow $f_n$ and the scheduled data flow $f_m$ satisfy the direct forwarding conflict-free constraint, as shown in Figure 6. The value of $Offse{t}_n$ in the TAS mechanism is calculated in (20) and (21).

$$[T_{ini{t}_{n,i}^{v_r}},T_{ult{i}_{n,i}^{v_r}}\left]\cap \right[T_{ini{t}_{m,i}^{v_r}},T_{ult{i}_{m,i}^{v_r}}]\ne 0$$

(19)

$$offse{t}_{cor{r}_n^{v_{r\hspace{0.25em}}}}=T_{ult{i}_{m,i}^{v_{r\hspace{0.25em}}}}-T_{ini{t}_{n,i}^{v_r}}$$

(20)

$$Offse{t}_n=Offse{t}_n+offse{t}_{cor{r}_n^{v_r}}$$

(21)

Step 5: Since TAS is a periodic cyclic mechanism, the time slot boundary of the scheduled data flow should not exceed the resource boundary of the cyclic gated time slot, so the maximum time slot boundary constraint condition should be judged based on Equation (22).

$$T_{ult{i}_{n,i}^{v_r}}+Offse{t}_n\le TA{S}_c$$

(22)

Step 6: Following the data flow scheduling order set in Step 1, start scheduling the next sequence of data flow $f_{n+1}$ and perform Step 3, Step 4 and Step 5 to calculate the no queuing delay time slot resources for data flow $f_{n+1}$ and perform time slot resource detection and dynamic offset calculation with data flow $f_m$ to determine the offset $Offse{t}_{n+1}$, until all data flow scheduling is completed.

Step 7: Determine the distribution of time slot resources for each data flow at the convergence switch.

Step 8: Based on the offsets set for each data flow, calculate the time slot resource occupancy of each data flow in the network node switch according to the queuing delay-free transmission model.

The arrival time of the i-th data frame of data flow $f_n$ at switch $v_a$ queue buffer layer $T_{ini{t}_{n,i}^{v_a}}$ is the opening time of TAS, and the complete transmission time $T_{ult{i}_{n,i}^{v_a}}$ is the closing time, and they are as follows:

$$T_{ini{t}_{n,i}^{v_a}}=Offse{t}_n+\left(d_{pro{c}_{min}}+d_{tra{n}_n}\right)\ast p_n^{v_a}+i\ast T_{pr{d}_n}$$

(23)

$$T_{ult{i}_{n,i}^{v_a}}=Offse{t}_n+d_{pro{c}_{min}}\ast p_n^{v_a}+d_{tra{n}_n}\ast \left(p_n^{v_a}+1\right)+T_{jitter}\ast p_n^{v_a}+i\ast T_{pr{d}_n}$$

(24)

The global deterministic scheduling algorithm based on offset transmission and redun-dant slot allocation flow char proposed in this paper is shown in Figure 7.

5. Results and Discussion

5.1. Simulation Setup

This paper implemented a TSN testing environment using OMNet++. The computer used for the simulation had an Intel(R) Core(TM) i5-1130H CPU and 16 GB of memory. The system ran on Ubuntu 18.04, with OMNeT++ 5.6.1 as the chosen simulation environment and INET version 4.1.2. The invisible protection band mechanism was enabled. Figure 8 illustrate the network topology. The TSN switches were configured with a delay jitter of 3 μs. The processing delay in the network was randomly set between 7 μs and 10 μs. The port bandwidth of the switches in the network was set to 100 Mbits/s.

The configuration information of the TSN flow is shown in

Table 2. All configuration information of each critical flow.

Scheduling Sequence	Critical Business Flow	Source Node	Transmitter Path	Frame Length	Configure Offset
$f_1$	${sf}_2$	${ES}_7$	$({ES}_7,{SW}_4,{ES}_8)$	$500 \mathrm{B}\mathrm{y}\mathrm{t}\mathrm{e}\mathrm{s}$	0 μs
$f_2$	${pf}_3$	${ES}_5$	$({ES}_5,{SW}_2,{SW}_4,{ES}_8)$	$375 \mathrm{B}\mathrm{y}\mathrm{t}\mathrm{e}\mathrm{s}$	16 μs
$f_3$	${pf}_2$	${ES}_4$	$({ES}_4,{SW}_2,{SW}_4,{ES}_8)$	$375 \mathrm{B}\mathrm{y}\mathrm{t}\mathrm{e}\mathrm{s}$	52 μs
$f_4$	${sf}_1$	${ES}_3$	$({ES}_3,{SW}_2,{SW}_4,{ES}_8)$	$250 \mathrm{B}\mathrm{y}\mathrm{t}\mathrm{e}\mathrm{s}$	108 μs
$f_5$	${pf}_1$	${ES}_1$	$({ES}_1,{SW}_1,{SW}_2,{SW}_4,{ES}_8)$	$250 \mathrm{B}\mathrm{y}\mathrm{t}\mathrm{e}\mathrm{s}$	107 μs

for SV type flows, and the transmission period of flow ${pf}_{\mathrm{n}}$ was set to a standard 250 μs. When sending the SV flows, the frame length was kept constant [18]. To accurately reflect the performance of the scheduling algorithm and the network’s load processing capability, the transmission period of GOOSE type flow ${sf}_{\mathrm{n}}$ was set to 10 ms. Equation (1) was used for periodic shaping as a prerequisite to enable scheduling based on periodic TT flows. Additionally, at the sending ends ES₂ and ES₆, non-real-time Ethernet flows with low latency requirements were sent as background flow.

5.2. Result Analysis

The real-time data of the transmission delay of the operation results of the global deterministic scheduling algorithm proposed in this paper is shown in Figure 9, and the simulation time is a total of 10,000 ms.

The detailed data of the transmission delay of the proposed algorithm scheduling is shown in

Table 3. The transmission delay details of each critical flow under this paper to propose the scheduling algorithm.

Critical Business Flow	Theoretical Transmission Delay without Queuing Delay	Minimum Delay	Maximum Delay	Average Delay	Standard Deviation	Jitter
${pf}_1$	[101 μs, 110 μs]	101.14 μs	$109.9 \mathsf{\mu }\mathrm{s}$	$105.51 \mathsf{\mu }\mathrm{s}$	$1.51 \mathsf{\mu }\mathrm{s}$	8.76 μs
${sf}_1$	[74 μs, 80 μs]	74.11 μs	$79.95 \mathsf{\mu }\mathrm{s}$	$76.95 \mathsf{\mu }\mathrm{s}$	$1.23 \mathsf{\mu }\mathrm{s}$	5.84 μs
${sf}_2$	[87 μs, 90 μs]	87.01 μs	$89.99 \mathsf{\mu }\mathrm{s}$	88.56 μs	$0.84 \mathsf{\mu }\mathrm{s}$	2.98 μs
${pf}_2$	[104 μs, 110 μs]	104.03 μs	$109.97 \mathsf{\mu }\mathrm{s}$	$107.0 \mathsf{\mu }\mathrm{s}$	$1.22 \mathsf{\mu }\mathrm{s}$	5.94 μs
${pf}_3$	[104 μs, 110 μs]	104.01 μs	$109.98 \mathsf{\mu }\mathrm{s}$	$107.0 \mathsf{\mu }\mathrm{s}$	$1.22 \mathsf{\mu }\mathrm{s}$	5.97 μs

. According to Table 3, the recommended algorithm in this paper combines the core TAS scheduling mechanism of TSN can accurately calculate the gating open/close time. Without sacrificing a significant amount of bandwidth, the results demonstrate that the proposed algorithm, in conjunction with the TAS scheduling mechanism, can completely eliminate the additional queuing delay for critical data flows, achieving the theoretically minimum transmission delay and ensuring strong real-time transmission quality. The algorithm presented in this paper, based on the conventional TAS scheduling algorithm that avoids interference between different types of traffic flows and enables mixed transmission, further eliminates the interference among individual data flows.

The reference [8] sets the switch processing delay as a customized parameter and utilizes network calculus theory to calculate the maximum delay boundary for critical traffic flows. The scheduling algorithm’s GCL configuration is required to ensure strict synchronization between the gate open time of high-priority queues and the arrival time of time-sensitive business packets. The transmission slot is determined by the data frame’s queueing time and the complete transmission time at the current switch, ensuring that critical data frames adhere to the FIFO scheduling rule. Under the premise of Equation (1)’s periodic shaping, it guarantees that the flow ${pf}_{\mathrm{n}}$ can be scheduled according to the TT flow with a period of 10 ms. Taking into account the processing delay jitter in actual switches and the potential conflicts among multiple data flows at the convergence node, the scheduling algorithm proposed in this study is compared with the TAS scheduling algorithm specified in reference [8], the redundant slot allocation scheduling algorithm based on the maximum and minimum processing delay for determining the TAS gate open and close time, and the strict priority algorithm under the non-TAS mechanism in reference [6].

The Figure 10 reflects the real-time performance of data transmission under different algorithms, with this paper’s proposed algorithm demonstrating the theoretically minimal deterministic transmission latency. TAS can allocate different transmission queues based on priority. Compared to strict priority algorithms without TAS mechanisms, where data flows are transmitted only through the corresponding channels, this approach avoids interference from randomly sent background flow on critical business flows, as shown in Figure 11 and Figure 12. The standard deviation and jitter of data flow transmission latency scheduled using two algorithms under the TAS scheduling mechanism are lower than those of the strict priority algorithm without the TAS mechanism. However, due to the FIFO rule in port transmission, higher-priority data flows may still affect higher-priority and same-priority critical business flows [19].

In addition to the isolation at the MAC layer gate control mechanism of the switch, the combination of the scheduling algorithm’s derived sender offset achieves temporal isolation for data flows in the switch and connecting links. Different critical data flows are isolated in terms of time and space, thereby eliminating non-deterministic queuing delays caused by the convergence of multiple critical data flows due to high loads [20]. This is depicted in Figure 10 and Figure 11. The scheduling algorithm proposed in this paper is only affected by uncertainties arising from the switch’s state. It further avoids interference between each critical data flow based on the TAS scheduling algorithm. Setting offsets for senders requires the use of TSN’s CUC/CNC technology to achieve global network flow traffic control and transmission. In addition to configuring bridge devices such as switches, centralized configuration of senders through the use of CUC or CNC is necessary to achieve deterministic scheduling for the entire network [21].

6. Conclusions

This paper aims to achieve deterministic transmission with no queuing delay for critical data flows in the context of converged networking and mixed data flow transmission. Through an in-depth analysis of the three factors within the network that contribute to queuing delays, we can outline the approach.

(1) The first scheduling degree, when the traffic flow is mixed, reduces or avoids the impact of non-critical data flow on critical data flow, and ensures the delay quality of critical transmission flow. This method can be easily implemented using TSN-gated technology. However, the transmission of GOOSE flow is the variable cycle, which cannot be combined with the gating mechanism of the periodic cycle. Therefore, this paper proposes a method to increase the recovery time slot to solve this problem.

(2) The second scheduling degree, each critical data flow does not interfere with the other and solves the problem of queuing delay caused by the data flow occupying the port. This paper solves this problem by setting the offset at the transmitter.

(3) The third scheduling degree, in addition to the influence of data flow, solves the problem that other hardware limitations of the switch cause interference in critical data flow transmission. In addition to the data flow occupation port, there is still a problem of processing delay jitter caused by the switch according to its own state, which makes the time slot resources occupied by the data flow in an uncertain state. This paper finds the jitter boundary of the time slot resources by allocating redundant time slots and calculates the transmission offset based on the time slot resources occupied by the allocated data flow. After testing, the scheduling algorithm proposed in this paper can make the critical data flow achieve the most ideal real-time transmission without queuing delay under high load mixed flow transmission.

Avoiding the use of a large system and complex solver, the author deeply analyzed the storage and forwarding delay structure used by TSN, determined the scheduling rules, and combined the characteristics of the redundant time slot allocation model. After the aggregation switch completes a scheduling sequence, it can satisfy the deterministic transmission of the critical data flow directly forwarded into the global network. It solves the conflict that different frame length data flows do not produce conversion relationship in the storage and forwarding network. While ensuring the real-time stability of critical data flow transmission, this research provides strong support for future substation networks by simplifying network structures, achieving network integration and centralized unified configuration management.

Uninterrupted transmission represents the most ideal scenario in scheduling for deterministic data transmission. However, there are situations where this scheduling algorithm may not fully meet the constraints of time slot boundaries. In such cases, readers can explore further research avenues to improve scheduling success rates, even if it involves some trade-offs in real-time performance.