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Article

Impact of Output Conductance on Current-Gain Cut-Off Frequency in InxGa1-xAs/In0.52Al0.48As Quantum-Well High-Electron-Mobility Transistors on InP Substrate

1
School of Electronics and Electrical Engineering, Kyungpook National University (KNU), Daegu 41566, Republic of Korea
2
NTT Device Technology Laboratories, Atsugi-shi 243-0198, Japan
3
School of Electrical Engineering, University of Ulsan, Ulsan 44610, Republic of Korea
*
Author to whom correspondence should be addressed.
Electronics 2023, 12(2), 259; https://doi.org/10.3390/electronics12020259
Submission received: 22 December 2022 / Revised: 28 December 2022 / Accepted: 28 December 2022 / Published: 4 January 2023

Abstract

:
In this study, we investigated the impact of intrinsic output conductance (goi) on the short-circuit current-gain cut-off frequency (fT) in InxGa1-xAs/In0.52Al0.48As quantum-well (QW) high-electron-mobility transistors. At its core, we attempted to extract values of fT using a simplified small-signal model (SSM) of the HEMTs and to derive an analytical formula for fT in terms of extrinsic model parameters that are related with intrinsic model parameters of a general SSM. We projected how fT was influenced by goi in HEMTs, emphasizing that the improvement in electrostatic integrity would also be of critical importance to fully benefit from scaling down Lg.

1. Introduction

The excellent carrier transport properties of InxGa1-xAs/In0.52Al0.48As material systems (x > 0.53) on an InP substrate, together with advances in material growth and device fabrication, have made InxGa1-xAs/In0.52A0.48As quantum-well (QW) HEMTs a strong candidate for high-frequency and terahertz (THz) system applications, as well as quantum computing applications [1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16]. Recent reports on the InxGa1-xAs/In0.52A0.48As QW HEMTs, with a fT value in excess of 700 GHz [17,18] and noise temperature of 2 K at cryogenic operation [19], have been published.
Until now, paths to improve the fT in HEMTs have involved reducing Lg down to below 30 nm, improving the mobility of two-dimensional electron gas (μn,2-DEG) in a QW channel, and minimizing all the parasitics such as series resistance and gate-fringing capacitance components [20,21,22,23,24,25,26,27,28,29,30,31].
In principle, the fT of a HEMT in saturation is a figure of merit that is widely benchmarked to evaluate the suitability of HEMTs for high-frequency analog, mixed-signal, and logic applications. Moreover, the physical meaning of fT is fundamentally indicative of electron transport through the intrinsic region of the QW channel. It is known that fT increases with the decrease in Lg due to the reduction in the electron transit time under the gate, while parasitic components hinder fT from linearly increasing with a reciprocal of Lg. Despite the fact that the impact of short-channel-effects (SCEs) on the logic characteristics of the HEMT has been extensively investigated [32,33], there have been few reports on how SCEs analytically affect the fT of a HEMT as Lg scales down to below 100 nm.
In this study, we extracted and analyzed values of the fT in In0.8Ga0.2As/In0.52A0.48As QW HEMTs on an InP substrate with Lg values ranging from 260 to 25 nm in three different manners: (i) a least-squares fit using experimental S-parameter data, (ii) a projection from both simplified and general small-signal models (SSMs), and (iii) a calculation from an analytical formula. These allowed us to systematically investigate how fT was affected by goi as Lg aggressively scales down in these devices.

2. Fabrication Process

Figure 1 provides a description of the heterostructure used for device fabrication in this study. All the epitaxial layers were grown by metal–organic chemical vapor deposition (MOCVD) on a 3-inch semi-insulating InP substrate with a crystal orientation of (100). A strained 5 nm thick In0.8Ga0.2As subchannel layer was incorporated to enhance the carrier transport properties in the QW channel, together with a 3 nm thick undoped InP layer as a gate recess etch stopper. It also featured a multilayer cap design to enhance the tunneling efficiency between the heavily doped capping layer and the In0.8Ga0.2As composite QW channel layer through an In0.52Al0.48As barrier layer in the source and drain access regions. The capping layer design consisted, from top to bottom, of a 12 nm thick heavily doped In0.53Ga0.47As subcapping layer with a Si doping concentration of 2 × 1019 cm−3 to lower the actual metal–semiconductor contact resistivity (ρc), and a 15 nm thick heavily doped In0.52Al0.48As subcapping layer with a Si doping concentration of 5 × 1018 cm−3 to lower the overall potential barrier across the In0.52Al0.48As barrier in the source and drain access regions. In a Hall epi wafer without the multilayer capping design, the Hall mobility (μn_hall) and two-dimensional electron gas density (n2-DEG) were measured to be around 13,500 cm2/V·s and 1.78 × 1012 cm−2 at room temperature, and 33,800 cm2/V·s and 1.74 × 1012 cm−2 at 77 K, respectively.
The device fabrication was comparable in detail to that we previously reported [34]. It involved a two-step recess process with a gate-to-channel distance (tins) of approximately 5 nm, as shown in Figure 2. The process began with device isolation by means of mesa etching using a dilute H3PO4-based wet-etching solution. Source-to-drain spacing (LSD) was scaled down to 1 μm, and a nonalloyed metal stack of Ti/Mo/Ti/Pt/Au (5/10/10/10/25 nm) was used to form S/D ohmic contacts. Here, we intentionally thinned the S/D ohmic metals to 60 nm to obtain a uniform coating of the first ZEP e-beam resist in a trilayer e-beam resist scheme during T-gate e-beam lithography. From transmission-line method (TLM) analysis, an extremely low ohmic contact resistivity (ρc) of 9.4 × 10−8 Ω cm2 and an excellent standard deviation (σ) of 9.9 × 10−9 Ω cm2 across a 3 inch wafer were obtained. After contact pad formation of Ti/Au (20/500 nm), a 20 nm thick SiO2 was created between the source and drain ohmic contacts by plasma-enhanced chemical vapor deposition (PECVD). After a gate recess process, a SiO2-assisted T-gate with a metal stack of Pt/Ti/Pt/Au was created using a JBX-9300FS e-beam lithography machine operating at 100 kV, with the T gate placed in a tightly spaced source and a drain with less than 50 nm alignment accuracy. In this way, devices with three different Lg values of 260, 87, and 25 nm, were fabricated.

3. Theoretical Analysis of fT

fT in an HEMT is defined as a frequency such that its short-circuit current gain (h21(f)) becomes a unity. This is mathematically given as
| h 21 ( f = f T ) | = | i d / i g | v d s = 0 = 1
Historically, fT was extracted by using a least-squares fit of |h21(f)|2 with a slope of −20 dB/decade, which was transformed from the measured S-parameter data. In parallel, small-signal equivalent circuit models of HEMTs have been constructed to describe the high-frequency characteristics not only within but also beyond the measured frequency ranges. Figure 3a represents the most widely used general SSM of HEMTs. According to the previous report by Tasker and Hughes [35], a 1st-order analytical formula for fT was derived as
f T = 1 2 π · g m i [ C g s + C g d ] · [ 1 + ( R s + R d ) g o i ] + C g d g m i ( R s + R d )
Using the equation above, many researchers have carried out delay time analysis [7,36,37,38,39,40], where the total delay (τ) of the HEMT consists of three terms: the intrinsic delay (τt), the delay through Cgd associated with the Miller effect (τext), and the parasitic delay due to the series resistances of Rs and Rd (τpar). Mathematically, the total delay and three delay terms are given as follows:
τ = ( 2 π f T ) 1 = τ t + τ e x t + τ p a r
τ t = C g s _ i + C g d _ i g m i
τ e x t = C g s _ e x t + C g d _ e x t g m i
τ p a r = ( R s + R d ) · { C g d + ( C g s + C g d ) · ( g o i / g m i ) }
In most cases, the right-hand side (RHS) of Equation (6) is simplified as τpar ~ Cgd (Rs + Rd), because the open-circuit voltage gain (gmi/goi) was sufficiently large. As a result, this delay has been interpreted as the delay due to the parasitic series resistances of Rs and Rd. However, as Lg aggressively scales down, this is no longer true, and the impact of goi should be carefully considered. Moreover, it would be imperative to accurately extract the values of Rs and Rd; otherwise, this would affect not only other small-signal model parameters but also the delay terms even with the same fT value.
Alternatively, a simplified SSM of the HEMT is shown in Figure 3b, where all the model parameters, such as gm_ext, go_ext, Cgs_ext, Cgd_ext, and Cds_ext, include the effects of the series resistance components (Rg, Rs, and Rd). As in [41,42], all the model parameters in Figure 3a,b could be extracted analytically from the measured S-parameter data. Table 1 shows the modeled parameters of both general and simplified SSMs for In0.8Ga0.2As/In0.52Al0.48As QW HEMTs on InP substrate with Lg = 260, 87, and 25 nm [18]. Using the definition above, an analytical formula for the fT of Figure 3b is expressed as
f T = 1 2 π · g m _ e x t C g s _ e x t + C g d _ e x t
Figure 4a plots three different types of short-circuit current gain against the measured frequency together with the least-squares fits with a slope of −20 dB/decade: (i) measured |h21(f)|2, (ii) simulated |h21(f)|2 from Figure 3a, and (iii) simulated |h21(f)|2 from Figure 3b. Figure 4b plots the locally extrapolated fT at each frequency with a slope of −20 dB/decade. Note that both small-signal modeled current gains are in excellent agreement with the measured one, and their projected values of fT are consistent with those from the analytical formula in Equation (7). Table 2 summarizes the fT values using the different approaches explained above, indicating that the simplified SSM provides a fairly accurate value of fT in a HEMT. In comparison with the approach using Equation (2), the approach proposed in this paper does not need to accurately extract values of Rs and Rd. Instead, the simplified SSM, which is from the extrinsic perspective of the equivalent circuit, can be robustly constructed directly from the measured small-signal S parameters of the device, where fT can be analytically and uniquely given by Equation (7). To see how the intrinsic output conductance (goi) affects the fT of short-Lg HEMTs, we derived analytical expressions for gm_ext, Cgs_ext, and Cgd_ext in terms of the model parameters of the general SSM (Figure 3a). In the course of correlating admittance parameters between the general and simplified SSMs, Kirchhoff’s voltage and current laws, respectively, yield
g m _ e x t g m i 1 + g m i R s + g o i ( R s + R d )
C g s _ e x t C g s [ ( 1 + g m i R d C g d C g s ) + ( 1 + C g d C g s ) g o i R d ] 1 + g m i R s + g o i ( R s + R d )
C g d _ e x t C g d [ ( 1 + g m i R s ) + ( 1 + C g s C g d ) g o i R s ] 1 + g m i R s + g o i ( R s + R d )
Here, we made two approximations: (i) ignorance of the 2nd-order of the frequency terms (ω2), and (ii) ignoring the effect of τ. This makes sense because the effects of both were negligible in the measured frequency ranges from 1 to 50 GHz. Interestingly, all the three equations contain the same form of the denominator, including the terms of gmi × Rs and goi × (Rs + Rd). Both make the extrinsic model parameters apart from the intrinsic model parameters. Plugging the results obtained in Equations (8)–(10) to Equation (7), we can derive Equation (2) and obtain a complete picture how fT evolves with goi in an HEMT.

4. Results and Discussion

We now look into the impact of short-channel effects (SCEs) on fT. To do so, we arbitrarily varied values of the intrinsic output conductance in Figure 3a for the devices with three different values of Lg, reconstructed new sets of the general SSM for each intrinsic output conductance, and extracted values of gm_ext, Cgs_ext, Cgd_ext, and fT using the approaches explained in Equations (8)–(10). Figure 5a–c plot gm_ext, Cgs_ext, and Cgd_ext, respectively, as a function of the intrinsic output conductance for the same family of devices. Symbols correspond to those from the small-signal modeling with the measured intrinsic output conductance for each device, whereas lines correspond to the projected ones that come from Equations (8)–(10) with different values of the intrinsic output conductance. First, Cgs_ext was nearly independent of goi. Because the ratio of Cgd/Cgs is typically much smaller than a unity, the second term in the square bracket of numerator of Cgs_ext is approximated to goi × Rd, and Cgs_ext is denominated by the first term of the numerator in square brackets. It makes Cgs_ext independent of goi. In the case of gm_ext, the results in this study are broadly consistent with those from DC analysis [43]. gm_ext is increasingly degraded by goi as Lg scales down aggressively. Figure 6 shows the two terms of Cgd_ext for each Lg device. Looking at the second term in the square brackets (solid lines in Figure 6), it is no longer negligible and actually comparable to Cgd × (1+gmi Rs) at a goi of around 1 mS/μm. Overall, Cgd_ext increases with goi. It should be emphasized that the dependencies of gm_ext and Cgd_ext on goi, especially in short-Lg devices, are exactly where fT is deteriorated.
Next, we investigated how the degree of SCEs affects fT in detail. Figure 7 plots the projected fT for the devices with three different values of Lg, as a function of goi. Symbols correspond to the measured fT for each Lg device. The worse the SCEs, the more seriously fT degrades, which is the case for the device with Lg = 25 nm. For example, if improving a value of goi by a quarter for the device with Lg = 25 nm, it is projected that the fT would considerably improve from 706 to 802 GHz. Strikingly, this improvement would be comparable to or even surpass the benefit from scaling down Lg. This reveals that it would be of equal importance to pay close attention to the SCEs to maximize the improvement in the fT, in addition to the reduction in Lg and parasitic components, and the improvement in carrier transport properties in the InxGa1-xAs/In0.52Al0.48As QW channel layer. Unless goi is carefully engineered, indium-rich InxGa1-xAs/In0.52Al0.48As QW HEMTs with x > 0.53 and short Lg, which were originally incorporated to improve the high-frequency characteristics of the device, would be likely to deteriorate the electrostatic integrity of HEMTs and eventually be of no use in boosting fT.

5. Conclusions

In summary, we investigated the impact of the electrostatic integrity of HEMTs on fT from the perspective of the simplified small-signal equivalent circuit. We extracted values of all the extrinsic model parameters and fT for In0.8Ga0.2As QW HEMTs with Lg = 260, 87, and 25 nm from the perspective of a simplified SSM, together with analytical expressions. In this way, we successfully explained the behavior of fT in those devices with respect to electrostatic integrity. As Lg considerably scaled down, we found that the degradation of the fT become more prominent. This is because the increase in the intrinsic output conductance caused the increase in the total extrinsic gate capacitance and the decrease in the extrinsic transconductance, leading to the degradation of fT. The results of this study indicate that it will be of great importance to pay close attention to SCEs to obtain a maximum improvement in fT in short Lg HEMTs.

Author Contributions

Conceptualization, H.-J.K., T.-W.K. and D.-H.K.; device fabrication, H.-J.K., I.-G.L., H.-B.J. and D.-H.K.; formal analysis, H.-J.K., T.T., H.S., H.M. and D.-H.K.; investigation, H.-J.K., T.-B.R., J.-H.L. and D.-H.K.; resources, H.-J.K., J.-H.L., T.-W.K. and D.-H.K.; writing—original draft preparation, H.-J.K. and T.-B.R.; writing—review and editing, I.-G.L. and H.-B.J.; supervision, J.-H.L., T.-W.K. and D.-H.K.; funding acquisition, T.-W.K. and D.-H.K. All authors have read and agreed to the published version of the manuscript.

Funding

This research was supported by the Civil-Military Technology Cooperation program (No. 19-CM-BD-05).

Data Availability Statement

The data presented in this study are available on request from the corresponding author.

Acknowledgments

This work was supported by Institute for Information & Communications Technology Planning & Evaluation (IITP) grant funded by the Korea government(MSIP) (No. 2020-0-00459).

Conflicts of Interest

The authors declare no conflict of interest.

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Figure 1. The epitaxial layer structure of In0.8Ga0.2As/In0.52A0.48As composite-channel QW HEMTs fabricated in this work.
Figure 1. The epitaxial layer structure of In0.8Ga0.2As/In0.52A0.48As composite-channel QW HEMTs fabricated in this work.
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Figure 2. A schematic of the In0.8Ga0.2As/In0.52Al0.48As QW HEMT in this study.
Figure 2. A schematic of the In0.8Ga0.2As/In0.52Al0.48As QW HEMT in this study.
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Figure 3. (a) General small-signal model and (b) simplified small-signal model for an In0.8Ga0.2As/In0.52Al0.48As QW HEMT.
Figure 3. (a) General small-signal model and (b) simplified small-signal model for an In0.8Ga0.2As/In0.52Al0.48As QW HEMT.
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Figure 4. (a) Three different types of the short-circuit current gain against the measured frequency together with least squares fits with a slope of −20 dB/decade, and (b) locally extrapolated fT at a given frequency for the same family of devices.
Figure 4. (a) Three different types of the short-circuit current gain against the measured frequency together with least squares fits with a slope of −20 dB/decade, and (b) locally extrapolated fT at a given frequency for the same family of devices.
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Figure 5. (a) gm_ext, (b) Cgs_ext, and (c) Cgd_ext against goi for In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg from 260 to 25 nm.
Figure 5. (a) gm_ext, (b) Cgs_ext, and (c) Cgd_ext against goi for In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg from 260 to 25 nm.
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Figure 6. Two terms of the numerator of Cgd_ext against goi for the In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg from 260 to 25 nm.
Figure 6. Two terms of the numerator of Cgd_ext against goi for the In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg from 260 to 25 nm.
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Figure 7. Measured (symbols) and projected (lines) fT against goi for the In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg from 260 to 25 nm.
Figure 7. Measured (symbols) and projected (lines) fT against goi for the In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg from 260 to 25 nm.
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Table 1. Modeled parameters of both general and simplified small-signal models (SSMs) for In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg = 260/87/25 nm, Wg = 2 × 20 μm, and Rs/Rd/Rg = 3.8/3.8/6 Ω.
Table 1. Modeled parameters of both general and simplified small-signal models (SSMs) for In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg = 260/87/25 nm, Wg = 2 × 20 μm, and Rs/Rd/Rg = 3.8/3.8/6 Ω.
General SSMSimplified SSM
Lg (nm)gmi
(mS/μm)
goi
(mS/μm)
Cgs
(fF/μm)
Cgd
(fF/μm)
Cds
(fF/μm)
gm_ext
(mS/μm)
go_ext
(mS/μm)
Cgs_ext
(fF/μm)
Cgd_ext
(fF/μm)
Cds_ext
(fF/μm)
2603.50.052.150.240.112.260.041.480.250.06
874.250.361.050.140.092.420.200.680.160.03
254.430.740.610.10.232.330.390.400.130.13
Table 2. Values of fT extracted in different manners for the same family of In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg = 260/87/25 nm.
Table 2. Values of fT extracted in different manners for the same family of In0.8Ga0.2As/In0.52Al0.48As QW HEMTs with Lg = 260/87/25 nm.
Using a Least-Square Fit from 1 to 50 GHz Using Analytical Equations (GHz)
Lg (nm)From Measured
S Parameters
From the General SSMFrom the Simplified SSMFrom Equation (7)
260207207207207
87453454454454
25703706706706
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Kim, H.-J.; Lee, I.-G.; Jo, H.-B.; Rho, T.-B.; Tsutsumi, T.; Sugiyama, H.; Matsuzaki, H.; Lee, J.-H.; Kim, T.-W.; Kim, D.-H. Impact of Output Conductance on Current-Gain Cut-Off Frequency in InxGa1-xAs/In0.52Al0.48As Quantum-Well High-Electron-Mobility Transistors on InP Substrate. Electronics 2023, 12, 259. https://doi.org/10.3390/electronics12020259

AMA Style

Kim H-J, Lee I-G, Jo H-B, Rho T-B, Tsutsumi T, Sugiyama H, Matsuzaki H, Lee J-H, Kim T-W, Kim D-H. Impact of Output Conductance on Current-Gain Cut-Off Frequency in InxGa1-xAs/In0.52Al0.48As Quantum-Well High-Electron-Mobility Transistors on InP Substrate. Electronics. 2023; 12(2):259. https://doi.org/10.3390/electronics12020259

Chicago/Turabian Style

Kim, Hyo-Jin, In-Geun Lee, Hyeon-Bhin Jo, Tae-Beom Rho, Takuya Tsutsumi, Hiroki Sugiyama, Hideaki Matsuzaki, Jae-Hak Lee, Tae-Woo Kim, and Dae-Hyun Kim. 2023. "Impact of Output Conductance on Current-Gain Cut-Off Frequency in InxGa1-xAs/In0.52Al0.48As Quantum-Well High-Electron-Mobility Transistors on InP Substrate" Electronics 12, no. 2: 259. https://doi.org/10.3390/electronics12020259

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