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Peer-Review Record

A Novel Bidirectional-Switched-Capacitor-Based Interlaced DC-DC Converter

Electronics 2023, 12(4), 792; https://doi.org/10.3390/electronics12040792
by Kuo-Kai Shyu, Yi-Chang Yu, Xin-Lan Lin, Lung-Hao Lee and Po-Lei Lee *
Reviewer 2:
Electronics 2023, 12(4), 792; https://doi.org/10.3390/electronics12040792
Submission received: 20 December 2022 / Revised: 27 January 2023 / Accepted: 28 January 2023 / Published: 5 February 2023

Round 1

Reviewer 1 Report

Below are some of my comments for the authors;

1. The sentence structure must be improved and English grammar errors must be minimized.

2. The legends in Fig. 4 to 7 are not readable.

3.  The authors should include comparison of the proposed bidirectional DC-DC converter with that presented in the literature in terms of voltage gain and maximum voltage stress of semiconductors.

4. The authors should comment on the maximum efficiency of the converter in the step-up and step-down mode.

Author Response

Item

The comments for the authors

Reply

1.1

The sentence structure must be improved and English grammar errors must be minimized.

We had tried our best to Improve sentence structure and confirm English grammar errors.

1.2

The legends in Fig. 4 to 7 are not readable.

We made the following corrections for Fig. 4 to 7.

1.3

The authors should include comparison of the proposed bidirectional DC-DC converter with that presented in the literature in terms of voltage gain and maximum voltage stress of semiconductors.

Please see the line 521~532 and Table 4.

 

1.4

The authors should comment on the maximum efficiency of the converter in the step-up and step-down mode.

1.     Please see the line 488,489 and Figure 16. That shows the efficiency of the converter in boost mode.

2.     Please see the line 513,514 and Figure 21. That shows the efficiency of the converter in buck mode.

Author Response File: Author Response.pdf

Reviewer 2 Report

Authors propose a novel interleaved boost converter which is composed by two blocks: the switched inductor interleaved converter and a hybrid voltage multiplier (fruit of the hybridizzation between the Dickson and the Crockcroft-Walton structures).

The paper needs to be better reorganized and english proof-reading is strongly suggested. The novelty of the proposal is sufficient. My comments/suggestions are reported in the following.

Introduction: In lines 32-34, authors claim that "multi-phase interleaved boost converter can increase the voltage  conversion ratio" and not only. A sentence with references is needed to better-specify how this kind of circuit could do such things. 

- In line 35, the same claim that the "voltage conversion ratio of the interleaved converter is limited". It should be specified why.

- Citations to references [2] and [3] are missing after [1] and before [4].

- In line 42 there is a typo.

- The Dickson VM, as introduced from line 56, has not its capacitors connected in parallel. Analysing the Dickson VM during its single operation, the pumping capacitors are connected in series for the output current, two-by-two. During the complementary phase, the pairs are changed (i.e., during the first phase a pumping capacitor is connected in series to the previous one and, during the following phase, the same capacitor is connected in series with the following one). This allows a reduction of the output impedance of the VM as compared with the CW case. Reviewer would suggest different references on charge pumps (other name of voltage multiplier circuits) that could be used in the introduction:

1) A review of charge pump topologies for the power management of IoT nodes

2) Analysis and Optimization of Switched-Capacitor DC–DC Converters

3) A simple and effective design strategy to increase power conversion efficiency of linear charge pumps

4) Linear distribution of capacitance in Dickson charge pumps to reduce rise time

-  Introduction should report a brief description of the proposed circuit and the organizzation of the paper.

Section 2:

- The hybrid voltage multiplier is not novel as idea, a further reference to be inserted is the following one "3-V Input, 70-V Output, Fully Integrated Hybrid Charge Pump"

- Line 96 presents typos

- How are the gate signals of the MOSFETs Qi generated ? This information should be reported in the manuscript.

- The contains of subsection 2.3 seem to be separated by the rest of the paper and so by the proposed topology. It is not clear what is the connection between the analysis led and the VM of the proposal. Authors should re-write the section 2 with the goal of better-connecting all.

Section 3:

- The carried out analysis is interesting. Reviewer would suggest to add the effect of parasitic capacitive effects related to the capacitors, in fact another difference between Dickson and CW VM is in the sensitivity of the output voltage to this kind of parasitic. Probably the proposed solution will show a similar intermediate performance, as for the output impedance and the voltage across the capacitors.

Section 4:

- List of the components should be provided.

- A comparison with the state of the art should be provided.

- What is the power conversion efficiency of the proposed circuit and what is the target application?

 

Author Response

REVIEWER 2

Item

The comments for the authors

Reply

2.1

The paper needs to be better reorganized and english proof-reading is strongly suggested.

We had tried our best to Improve sentence structure and confirm English grammar errors.

2.2

Introduction: In lines 32-34, authors claim that "multi-phase interleaved boost converter can increase the voltage conversion ratio" and not only. A sentence with references is needed to better-specify how this kind of circuit could do such things

Please see the line 32,33.

 

2.3

- In line 35, the same claim that the "voltage conversion ratio of the interleaved converter is limited". It should be specified why.

Please see the line 36,37.

 

2.4

- Citations to references [2] and [3] are missing after [1] and before [4].

We had corrected all references.

2.5

In line 42 there is a typo.

The typo is corrected and please see the line 44

2.6

The Dickson VM, as introduced from line 56, has not its capacitors connected in parallel. Analysing the Dickson VM during its single operation, the pumping capacitors are connected in series for the output current, two-by-two. During the complementary phase, the pairs are changed (i.e., during the first phase a pumping capacitor is connected in series to the previous one and, during the following phase, the same capacitor is connected in series with the following one). This allows a reduction of the output impedance of the VM as compared with the CW case. Reviewer would suggest different references on charge pumps (other name of voltage multiplier circuits) that could be used in the introduction:

We had improved the description of the problem, please see the line 53~58.

2.7

1) A review of charge pump topologies for the power management of IoT nodes

2) Analysis and Optimization of Switched-Capacitor DC–DC Converters

3) A simple and effective design strategy to increase power conversion efficiency of linear charge pumps

4) Linear distribution of capacitance in Dickson charge pumps to reduce rise time

-  Introduction should report a brief description of the proposed circuit and the organization of the paper.

A brief description and the organizational structure of the paper had been added to the Introduction. Please see the line 85~91.

2.8

- The hybrid voltage multiplier is not novel as idea, a further reference to be inserted is the following one "3-V Input, 70-V Output, Fully Integrated Hybrid Charge Pump"

The paper "3-V Input, 70-V Output, Fully Integrated Hybrid Charge Pump" has been added to the Reference. Please see the line 95 and item 15 of references.

2.9

Line 96 presents typos

The typo is corrected and please see the line 108

2.10

How are the gate signals of the MOSFETs Qi generated ? This information should be reported in the manuscript.

We have added this information to the manuscript. The micro-controller STM32F103 is used to generate the PWM switching control signal Qi that turns on and off the MOSFET. Please see the line 454~456.

2.11

The contains of subsection 2.3 seem to be separated by the rest of the paper and so by the proposed topology. It is not clear what is the connection between the analysis led and the VM of the proposal. Authors should re-write the section 2 with the goal of better-connecting all.

A short statement to describe what the subsection 2.3 does is added to the paper. Please see the line 149~151

2.12

The carried out analysis is interesting. Reviewer would suggest to add the effect of parasitic capacitive effects related to the capacitors, in fact another difference between Dickson and CW VM is in the sensitivity of the output voltage to this kind of parasitic. Probably the proposed solution will show a similar intermediate performance, as for the output impedance and the voltage across the capacitors.

In the IC design, the bottom stray capacitors are used as charge pumping elements [15]. However, in the application of power system case, the parasitic capacitors are much smaller than the pumping ones. To simplify the analysis, the parasitic capacitors on the power system are ignored. Please see the line 278~281.

2.13

List of the components should be provided.

The list of the components is given in Table 3. Please see the line 461,462 and Table 3.

2.14

A comparison with the state of the art should be provided.

A comparison with the state of the art is shown in Table 4. Please see the Table 4 and line 521~532

2.15

What is the power conversion efficiency of the proposed circuit and what is the target application?

1.     The line 446~450 describes the target application.

2.     Please see the line 488,489 and Figure 16. That shows the efficiency of the converter in boost mode.

3.     Please review the line 513,514 and Figure 21. That shows the efficiency of the converter in buck mode.

 

Author Response File: Author Response.pdf

Round 2

Reviewer 2 Report

The revised version of the paper is improved as compared to the oldest one. Authors have answered to all my raised questions and concerns.

To further enrich the bibliography about voltage multiplier (charge pumps), Reviewer would suggest two works aiming with optimum design strategies:

- A simple and effective design strategy to increase power conversion efficiency of linear charge pumps

- Linear distribution of capacitance in Dickson charge pumps to reduce rise time

 

Author Response

Item

The comments for the authors

Reply

1

- -A simple and effective design strategy to increase power conversion efficiency of linear charge pumps

The bibliography about voltage multiplier (charge pumps) " A simple and effective design strategy to increase power conversion efficiency of linear charge pumps " has been added to the Reference. Please see the line 279,280 and item 16 of references.

2

- Linear distribution of capacitance in Dickson charge pumps to reduce rise time

The bibliography about voltage multiplier (charge pumps) " Linear distribution of capacitance in Dickson charge pumps to reduce rise time " has been added to the Reference. Please see the line 280~282 and item 17 of references.

Author Response File: Author Response.pdf

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