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Article

An Input-Series Output-Parallel DC–DC Converter Based on Fuzzy PID Three-Loop Control Strategy

Beijing Future Technology Innovation Centre for Electrochemical Energy Storage System Integration, North China University of Technology, Beijing 100144, China
*
Author to whom correspondence should be addressed.
Electronics 2024, 13(12), 2342; https://doi.org/10.3390/electronics13122342
Submission received: 12 April 2024 / Revised: 23 May 2024 / Accepted: 29 May 2024 / Published: 15 June 2024
(This article belongs to the Topic Power Electronics Converters)

Abstract

:
In order to achieve high and low voltage isolation transformation in DC transmission and distribution networks, a multi module input-series output-parallel (ISOP) system consisting of a buck/boost converter and a CLLLC resonant converter as submodules was studied. This system can ensure that the CLLLC converter operates in the optimal state during frequency changes, achieves a soft switching function, and maintains a high conversion efficiency. This article establishes a mathematical model of a cascaded converter, analyzes its gain characteristics, and proposes a fuzzy PID three-loop control strategy to achieve good input voltage and output current sharing in the ISOP system. A simulation model is built on the MATLAB(R2023a)/Simulink platform to verify the effectiveness and superiority of the proposed control strategy. Finally, by building a prototype platform, the feasibility of the ISOP system and the effectiveness of fuzzy PID three-loop control were verified through experiments.

1. Introduction

The global environmental pollution and energy shortage issues have led to the widespread attention and development of renewable energy. With the increasing maturity of power electronic transformation technology, microgrids can efficiently integrate modules such as renewable energy generation, consumer loads, and energy storage systems with traditional power systems, becoming one of the research fields of modern smart grids. DC microgrids have the advantages of low transmission loss, no need for phase shift and frequency control, and have become a research hotspot in microgrid systems today [1,2].
At present, the voltage level in DC transmission and distribution networks is becoming higher and higher, and it is necessary to complete the transformation from high voltage to low voltage. However, due to the voltage resistance and power level of switching devices, it is difficult to achieve this function with a single isolated DC–DC converter. Modularization is one way to solve this problem [3,4]. References [5,6] introduce an input-series output-parallel system composed of a DAB converter as a sub-model, which achieves a power sharing performance. However, the power range of DAB soft switching is usually narrow and the converter may have voltage and current sharing issues, making it unsuitable for high-power applications. Reference [7] proposes an ISOP system consisting of LLC converters as sub-models, which achieves a power balance of LLC at different levels using coupled parallel inductors and multiple input transformers with shared magnetic coupling. Reference [8] designed an ISOP-LLC system using a magnetic integration method based on the principle of magnetic flux cancellation, which reduces losses and improves the efficiency of the converter. Reference [9] introduces an ISOP system composed of dual active bridges and CLLLC converters, which has advantages such as a wide soft switching range and a high efficiency. However, the system submodule structure is different, the parameter design is complex, and there is no experimental verification.
Reference [10] designed a reverse sag control strategy for ISOP DC–DC converters. Reference [11] proposes a parameter estimation based on a sensor-less power balance control method, which solves the power imbalance problem between submodules of ISOP-DAB converters. Reference [12] proposes a wireless autonomous input voltage equalization control strategy for ISOP systems, which improves system reliability. Reference [13] designed an ISOP-DAB converter based on multi-agent deep reinforcement learning, which adopts a control method combining autonomous input voltage balancing and three-phase shift modulation to achieve power balance. Reference [14] designed an ISOP-DAB converter, which includes a modulated coupling inductor and adopts a hybrid SPS control strategy to improve the system’s conversion efficiency. Reference [15] adopts an improved input voltage-balancing control strategy to achieve voltage balance of the input capacitor in the ISOP system. Reference [16] proposes a decoupling three-loop control, which belongs to a master–slave control structure and can make the system have the characteristics of power averaging and voltage stability, achieving a fast dynamic response. Reference [17] proposes a digital adaptive voltage positioning technique that operates in conjunction with Bang-Bang Charge Control (BBCC) to improve the dynamic performance of ISOP-LLC converters and reduce system complexity. Reference [18] proposes a strategy that combines sensor-less input voltage equalization with dual phase shift control, enabling the ISOP converter to have power balance characteristics. Reference [19] proposed a decentralized inverse droop control strategy with current as the control object, which enables the ISOP converter to have good voltage and current sharing effects. Reference [20] adopts triple decoupling closed-loop control, which can reduce the impact of the output of the front-end rectifier on the input of the ISOP converter in the system. Reference [21] proposes an improved ISOP DC transformer that integrates a switch resonant branch in the module input bridge to achieve voltage balance without the need for additional control. Reference [9] adopts a hybrid control of pulse frequency modulation control and single-phase shift control, which enables the ISOP SCDAB-CLLLC converter to operate stably in a DC power grid.
DAB can be used as a solid-state transformer for many high-power applications. Based on this, reference [22] proposes a new DAB topology structure that utilizes series parallel switch arrangements to achieve a low-voltage bridge configuration. Although the use of silicon carbide devices significantly improves switching losses in higher power conversion, it is difficult to achieve the soft switching characteristics of DAB due to the narrow soft switching range.
Reference [23] proposed a modified gain model for LLC converters and provided a design method for the converter, which improved the accuracy of the model and simplified the design method. Reference [24] proposes an improved LLC converter with a topology consisting of two series transformers, which increases the input voltage range and improves the operational efficiency of the converter. The limitation of LLC converters is that they can only achieve unidirectional power transmission, as their topology is asymmetric, which makes the design of converter parameters and control strategies more complex.
References [25,26] introduce a controller design method for CLLLC bidirectional converters, which has the advantages of symmetrical structure and consistent forward and reverse operating characteristics. It can be made to have soft switching characteristics through parameter design, thereby improving system efficiency. When the switching frequency is equal to the resonant frequency, the efficiency of the CLLLC converter reaches its highest point. When the switching frequency is too high, the converter cannot achieve zero current turn off, and the selection of components is not friendly. When the switching frequency is too small and the resonant network becomes capacitive, the converter cannot achieve zero voltage conduction and both will reduce the efficiency of the converter.
This article constructs a multi module series parallel combination ISOP system consisting of buck/boost + CLLLC converters as submodules. By designing parameters, the CLLLC converter is located near the resonance point and only serves as a DC transformer, while the buck/boost converter serves as a voltage regulator. The control strategy of the entire system adopts fuzzy PID three-loop control and the voltage outer loop in the double-closed loop of the CLLLC and buck/boost converter adopts fuzzy PID control. In addition, the buck/boost converter has added a voltage sharing loop to achieve a balanced input voltage of the ISOP system. The ISOP system topology proposed in this article is relatively novel and can achieve a powerful voltage regulation function and electrical isolation, improving safety performance. It is suitable for high-voltage and high-power situations, and the modules can be expanded according to the voltage level needs of the situation. The CLLLC converter works at the optimal operating point, improving system efficiency. The ISOP system can ensure the conversion efficiency, good soft switching, and dynamic characteristics of resonant converters.

2. Converter Topology and System Structure

Figure 1 shows the structure of DAB and LLC converters. This shows the changes in the converter structure.
Figure 2a shows the topology of the CLLLC converter, where S1~S8 are the switching tubes of the inverter and rectifier networks, Lm is the excitation inductance, L1 and C1 are the primary resonant elements, L2 and C2 are the secondary resonant elements, and the transformer TR ratio is n. The direction of power flow from the original edge to the secondary edge is defined as a forward operation, and vice versa as a reverse operation. During the forward operation, an inverter control drive signal is applied to S1~S4 and a synchronous rectification control drive signal is applied to S5~S8. When running in reverse, S5~S8 applies an inverter control drive signal and S1~S4 applies a synchronous rectification control drive signal. Figure 2b is a schematic diagram of the buck/boost converter topology.
The CLLLC converter has advantages such as soft switching, efficient energy transmission, and electrical isolation, and adopts a pulse frequency control method. When the input voltage of the system varies greatly, although the CLLLC converter can achieve a stable output voltage through frequency conversion control, the frequency change causes the converter to deviate from the resonant frequency point, resulting in a decrease in transmission efficiency. When the operating frequency exceeds the resonant frequency, the converter cannot achieve the soft switching function, and large voltage regulation leads to a wide range of frequency changes, which is not conducive to the selection of components such as inductors, capacitors, and transformers. To solve the above problems, by cascading non isolated buck/boost converters with isolated CLLLC converters, electrical isolation can be achieved, safety can be improved, and voltage regulation can be achieved for efficient energy transfer.
Figure 3 shows the topology of an ISOP system consisting of a buck/boost + CLLLC converter as a submodule, connected in series and parallel. A single module contains a buck/boost and a CLLLC converter, and n modules form an ISOP system with input-series output-parallel. When the system is working, the input voltage is first reduced to the intermediate stage voltage using a buck/boost converter; then, the intermediate stage voltage is reduced to the target voltage using a DC transformer, i.e., a CLLLC converter.
When the DC bus supplies power to the distribution network, subnet, or energy storage system, the ISOP system structure is suitable for situations with high voltage input and high current output. At this point, the CLLLC resonant converter also has high-frequency soft switching characteristics, which improves module efficiency and power density. The buck/boost converter is in a step-down mode, with fast output response and easy control, playing a role in matching voltage.

3. Cascade Converter Model, Characteristic Analysis, and Parameters Design

3.1. Establishment and Analysis of Mathematical Model for Cascade Converter

This article establishes an independent mathematical model for each converter and obtains an equivalent circuit model, thereby establishing a mathematical model and an equivalent circuit model for cascaded converters. Firstly, using the state space averaging method, a small signal model of the buck/boost converter can be derived. Then, using the extended descriptive function method, a small signal model of the CLLLC converter can be derived. Finally, based on the buck/boost mathematical model and the CLLLC mathematical model, the steady-state equivalent circuit diagram of the system obtained by cascading these two converters can be obtained, as shown in Figure 4.
According to the above figure, the DC voltage gain, M, of the cascaded converter can be obtained as follows:
M = M B M C ,
For buck/boost converters, the average state space model is as follows:
X ˙ s = A s X s + B s U s ,
Assuming R is the output impedance of the buck/boost converter, the following can be obtained:
A s = [ 1 C 1 R 1 0 1 C 1 0 1 C 2   R 1 D C 2 1 L 1 D L 0 ] , B s = [ 1 C 1 R 1 0 0 1 C 2 R 0 0 ] ,
If X ˙ s = 0 , the static solution of the equation can be obtained using the following equation:
X s 0 = A s 1 B s U s ,
If the static operating point is X s 0 = [ V c 1 V c 2 I L ] T , the static working point can, therefore, be obtained as follows:
X s 0 = [ ( 1 D ) 2 R V 1 + ( 1 D ) R 1 V ( 1 D ) 2 R + R 1 ( 1 D ) R V 1 + R 1 V ( 1 D ) 2 R + R 1 V 1 ( 1 D ) V ( 1 D ) 2 R + R 1 ] ,
Among them,   V indicates the output voltage of the converter.
Taking U S = V and Vo = V1, the voltage gain of the buck/boost converter can be obtained as follows:
M B = V o U s = ( 1 D ) 2 R V 1 + ( 1 D ) R 1 V ( 1 D ) R V 1 + R 1 V ,
According to Figure 4, the transfer function of the CLLLC resonant converter is as follows:
H ( j ω s ) = u CD u AB = Z m / / ( Z 2 + R eq ) Z 1 + Z m / / ( Z 2 + R eq ) × R eq R eq + Z 2 ,
Among them,
{ Z 1 = j ω s L 1 + 1 / ( j ω s C 3 ) Z 2 = j ω s L 2 + 1 / ( j ω s C 4 ) Z m = j ω s L m ω s = 2 π f ,
By defining k = L m / L 1 , h = L 2 / L 1 , g = C 4 / C 3 , ω 1 = 1 / L 1 C 3 , ω 2 = 1 / L 2 C 4 , ω n = ω s / ω 1 , Q = Z 0 / R e q = L 1 / C 3 / R e q and substituting (7), we can obtain the following:
H ( j ω s ) = k ω s C 3 R eq [ ( ω s C 3 1 ω s L 1 + k ω s C 3 ) R eq + j ( k ω s 2 ω 1 2 + k h ω s 2 ω 1 2 + h ω s 2 ω 1 2 k k g h 1 g + 1 g ω 1 2 ω s 2 ) ] ,
When the converter is in a resonant state, the imaginary part of the transfer function in Equation (9) is zero, and the resonant frequency, ωr, can be obtained as follows:
ω r = b + b 2 4 a c 2 a ω 1 ,
In the above equation,
{ a = k + h + k h b = k + h + ( k + 1 ) / g c = 1 / g ,
Through simplification, the following can be obtained:
H r ( j ω n ) = 1 j Q k [ ( k + h + k h ) ω n ( k + h + k + 1 g ) 1 ω n + 1 g ω n 3 ] + ( 1 + 1 k 1 k ω n 2 ) ,
And available for CLLLC converter voltage gain expressions:
M C = 1 ( Q k ) 2 [ a ω n b ω n + c ω n 3 ] 2 + ( 1 + 1 k 1 k ω n 2 ) 2 ,
In order to ensure the symmetry of the primary and secondary side parameters, and thus to ensure that the gain curves of the converter are the same during forward and reverse operation, take h = g = 1 and substitute it into (12) to obtain the following:
M C = 1 ( Q k ) 2 [ ( 2 k + 1 ) ω n 2 k + 2 ω n + 1 ω n 3 ] 2 + ( 1 + 1 k 1 k ω n 2 ) 2 ,
When the switching tube operates in a resonant state, substituting Equation (10) into Equation (14) yields the converter gain, as follows:
M ω r = 1 1 + 1 k ( 1 2 a b + b 2 4 a c ) = 1 1 + 1 / g h k + k / g + h h ,
Finally, the voltage gain, M, of the cascaded converter composed of buck/boost and CLLLC can be obtained as follows:
M = h ( 1 D ) 2 R V 1 + h ( 1 D ) R 1 V [ ( 1 D ) R V 1 + R 1 V ] ( 1 + 1 / g h k + k / g + h ) ,

3.2. Characteristic Analysis of CLLLC Resonant Converter

According to Equation (14), it can be inferred that the gain M of the CLLLC converter is determined by the normalized frequency, inductance ratio, and quality factor. The key to designing resonant parameters lies in the reasonable selection of k and Q. The larger the load, the more difficult it is for the converter to meet the requirement of maximum voltage gain. Therefore, when the converter is operating at full load, that is, when the switching frequency is taken as the minimum value, the voltage gain should be at its maximum value. A graph of the relationship between k, Q, and voltage gain M when ωn = ωn.min = 0.75 has been drawn, as shown in Figure 5.
The impedance characteristics are related to whether the converter can achieve a soft switching function. Based on the equivalent circuit diagram above, the impedance characteristics of the CLLLC converter can be analyzed. Its input impedance is as follows:
Z i n = j ω s L 1 + 1 / ( j ω s C 3 ) + j ω s L m / / [ R e q + j ω s L 1 + 1 / ( j ω s C 3 ) ] ,
Normalizing the above equation yields the following:
Z i n Z 0 = ω n 2 k 2 Q 1 + ( ω n k Q + ω n Q Q / ω n ) 2 + j [ ( k + 1 ) ω n 2 1 ] [ ( 2 k + 1 ) Q 2 ω n + 1 / ω n ( 2 k + 2 ) Q 2 / ω n + Q 2 / ω n 3 ] 1 + ( ω n k Q + ω n Q Q / ω n ) 2 ,
If the switching transistor of the converter needs to have a soft switching function, the voltage phase of the input resonant network needs to lead the current phase, that is, the input impedance property is inductive, and its property is independent of the real part. Therefore, the imaginary part of Equation (18) is extracted as follows:
I m ( Z i n Z 0 ) = [ ( k + 1 ) ω n 2 1 ] [ ( 2 k + 1 ) Q 2 ω n + 1 / ω n ( 2 k + 2 ) Q 2 / ω n + Q 2 / ω n 3 ] 1 + ( ω n k Q + ω n Q Q / ω n ) 2 ,
According to Equation (19), the size of the imaginary part is determined by the normalized frequency ωn, inductance ratio k, and quality factor Q. When ωn ≥ 1, the imaginary part is always greater than zero and the impedance is inductive, which can achieve soft switching. If the switching transistor wants to achieve soft switching, it needs to ensure that the input impedance at the minimum switching frequency is inductive, that is, its imaginary part is greater than zero. When ωn = ωn.min = 0.75, a graph of the relationship between k, Q, and the imaginary part of the impedance is drawn, as shown in Figure 6. The plane with Im (Zin/Z0) = 0 in the figure divides the three-dimensional diagram into two parts—upper and lower. When above the plane, the imaginary part is greater than zero. Therefore, when selecting k and Q values, it is necessary to make Im (Zin/Z0) above the plane, that is, in the projection diagram, the value of Im (Zin/Z0) should fall to the left of the line with Im (Zin/Z0) = 0. Only in this way can the soft switching function be achieved.

3.3. Design of Converter Parameters

This system is used for the transformation condition from 10 kV high voltage to 400 V low voltage. Three sub modules form an ISOP system and, under the condition of equal input voltage, the rated voltage of the sub modules is 3333 V. In the voltage range of 9 kV–11 kV, the input voltage range can be obtained. Assuming that the rated input voltage of CLLLC is 1200 V and there is a fluctuation margin, other parameters can be determined. Table 1 shows the system design parameters for a single submodule.

3.3.1. Parameter Design of Buck/Boost Converter

According to the design data, the duty cycle can be obtained as follows:
D = V C L L L C - r a t e d V i n - r a t e d = 1200 3333 0.36 ,
Furthermore, the critical inductance value can be obtained as follows:
L = 1 D 2 R T s = 1 0.36 2 × 20 × 1 20000 = 0.32 mH ,
The actual inductance value can be selected as 1.3 times the critical inductance value, which is as follows:
L B = 1.3 L = 1.3 × 0.32 0.4 mH ,
The capacitance value can be calculated based on the ripple voltage, as follows:
C = V C L L L C - r a t e d ( 1 D ) 8 L B V C L L L C - r a t e d T s 2 = 250 μ F ,

3.3.2. Parameter Design of CLLLLC Resonant Converter

According to the analysis of voltage gain characteristics, the smaller the load, the more difficult it is to achieve the minimum voltage gain. Therefore, when the converter is unloaded (with the maximum switching frequency), the minimum voltage gain should meet the following requirements:
M C . min M C ( ω n . max ) ,
When the converter is unloaded, Q = 0. According to equation (14), the minimum voltage gain is only related to the parameter k. Taking ωn = ωn.max, the range of values for parameter k can be obtained as follows:
k M C . min ( ω n . max 2 1 ) ( 1 M C . min ) ω n . max 2 ,
The inductive nature of the resonant network of the converter is a necessary condition for achieving soft switching, which is equivalent to the imaginary part in the input impedance expression being a positive number. At this point, the critical condition is considered to make it equal to zero, as follows:
[ ( k + 1 ) ω n 2 1 ] [ ( 2 k + 1 ) Q 2 ω n + 1 / ω n ( 2 k + 2 ) Q 2 / ω n + Q 2 / ω n 3 ] 1 + ( ω n k Q + ω n Q Q / ω n ) 2 = 0 ,
Furthermore, the expression for Q can be obtained as follows:
Q = ω n 2 ( 1 ω n 2 ) [ ω n 2 ( 2 k + 1 ) 1 ] ,
Because the quality factor Q is positive and Q2 has the same monotonicity as Q, solving for the derivative of Q2 yields the following:
( Q 2   ) = 2 ω n [ ( 2 k + 1 ) ω n 4 1 ] ( 1 ω n 2 ) 2 [ ( 2 k + 1 ) ω n 2 1 ] 2 ,
If the above equation is equal to 0, we can obtain the maximum value of Q when ωn = [1/(2k + 1)]1/4, as follows:
Q max = 1 2 k + 1 1 ,
So, the range of Q value parameters can be obtained as follows:
Q < 1 2 k + 1 1 ,
According to the data of VCLLLC-rated and Vo-rated in Table 1, the transformer ratio n at the rated operating point can be obtained as 3, that is, n = 3.
The minimum voltage gain is as follows:
M C . min = n V o _ min V C L L L C _ max = 3 × 390 1253 0.934 ,
Furthermore, the range of k values can be obtained according to Equation (25), as follows:
k M C . min ( ω n . max 2 1 ) ( 1 M C . min ) ω n . max 2 5.905 ,
From the perspective of transmission efficiency, the transmission efficiency of the converter increases with the increase in k value. Therefore, based on the range of k values obtained, k = 5 is taken. By substituting it into Equation (30), the range of Q values can be obtained as follows:
Q < 1 2 k + 1 1 0.432 ,
The design scheme of this article aims to make the CLLLC converter work at the resonance point as much as possible. Based on Equation (33) and Figure 5 and Figure 6, a Q value of 0.32 is selected. At this point, the gain of the converter is 1 and the input impedance is inductive with a positive imaginary part, which can achieve a soft switching function.
The equivalent resistance of the CLLLC converter is as follows:
R e q = 8 n 2 π 2 R o = 3.642 Ω ,
Furthermore, the parameters of the internal components of the converter can be obtained as follows:
{ L 1 = Q R e q 2 π f r = 1.86 μ H L 2 = L 1 n 2 = 0.827 μ H L m = k L 1 = 9.3 μ H C 3 = 1 ( 2 π f r ) 2 L 1 = 1363 nF C 4 = n 2 C 3 = 3066.75 nF ,

3.3.3. Parameter Design of Transformer

  • Selection of magnetic cores
Using the AP method to design a high-frequency transformer with an efficiency of 98%, without considering other losses, the apparent power Pt of the transformer is as follows:
P t = ( 1 + 1 η ) P o = ( 1 + 1 0.98 ) × 27000 = 54551 W ,
The AP value can be calculated as follows:
A P = 100 P t k f k w f s . m i n B J = 100 × 54551 4 × 0.2 × 75000 × 0.1 × 400 = 227.296 cm 4 ,
Among them, kf is the waveform coefficient, taken as 4; kw is the waveform coefficient, taken as 0.2; fs.min is the minimum operating switching frequency of the transformer, where 75 kHz is taken; B is the working magnetic flux density, taken as 0.1 T; and J is the current density, where 400 A/cm4 is taken.
According to Equation (37), the UY30 ferrite core is selected, Ae = 6.919 cm2, Aw = 65.39 cm2, and the AP value of the selected core is as follows:
A P = A e A w = 6.919 × 65.39 = 452.433 cm 4 > 227.296 cm 4 ,
The selected magnetic core meets the requirements.
  • The number of turns on the original and secondary sides can be calculated
When the transformer operates at the resonance point, it can reach a voltage of 400 V, and the number of secondary turns of the transformer can be calculated according to the law of electromagnetic induction, as follows:
N s = U o × 10 6 k f B A e f s = 400 × 10 6 4 × 0.1 × 691.9 × 100000 = 14.5 ,
So, the number of secondary turns is set to 15; then, the number of primary turns in the transformer is as follows:
N p = n N s = 3 × 15 = 45 ,
In summary, the primary side turns of the transformer are 45 turns and the secondary side turns are 15 turns.
  • Selection of wire diameter
Considering the influence of skin effect, the minimum skin depth is 0.12 mm and the wire diameter should be smaller than the skin depth. Therefore, a Leeds wire with a diameter of 0.1 mm is selected. The current density is taken as J = 5 A/mm2. The maximum effective values of the resonant current of the primary and secondary sides are IL1_max = 25 A and IL2_max = 75 A, respectively. The cross-sectional area of the primary and secondary side wires is calculated as follows:
{ S p = I L 1 _ m a x J 25 5 = 5 mm 2 S s = I L 2 _ m a x J 75 5 = 15 mm 2 ,
Furthermore, the number of strands of the primary and secondary side coils can be determined as follows:
{ K p = S p π   ×   0 . 1 2 / 4 637 K s = S s π   ×   0 . 1 2 / 4 1910

4. Control Strategy of the System

The main problem of the ISOP system is to ensure that the input voltage and output current of each module are evenly distributed. Scholars have proposed two types of control schemes for this system—the centralized control strategy and the decentralized control strategy. Centralized control strategies generally have common control links to ensure the interconnection of various modules, mainly including common duty cycle control, dual-loop control, and triple-loop control. The decentralized control strategy does not require ensuring communication between modules and can control each module separately, mainly including upward control and master–slave control.
The ISOP system in the article adopts a three-loop control based on fuzzy PID, which includes the output voltage loop of the entire system, the input voltage equalization loop, and the current inner loop of each submodule. The overall control block diagram of the system is shown in Figure 7. The output voltage of each module is superimposed with the input balanced voltage as the input signal, which is then processed using a fuzzy controller to obtain the given input of the corresponding module current inner loop. The output of the current inner loop is compared with the sawtooth wave and performs the corresponding processing to obtain the driving signal of the switching tube. In order to obtain a stable output voltage, all submodules in this ISOP system share a common voltage circuit. The input voltage equalization loop achieves input voltage balancing by directly adjusting the duty cycle of each module.
As shown in the above figure, both the input voltage equalization loop and the output voltage loop adopt fuzzy PID control. It combines fuzzy control with traditional PID, based on the fuzzy rules of voltage deviation and deviation change rate. Through fuzzy self-tuning PID technology, the PID parameters can be adjusted in real time [27,28,29,30]. The fuzzy PID controller is set to two-input and three-output mode, with input quantities of voltage deviation e and voltage deviation rate ec, as well as output quantities of proportional coefficient adjustment Δkp, integral coefficient adjustment Δki, and differential coefficient adjustment Δkd. Using the real-time adjustment of the above three adjustment quantities, the PID parameters are adjusted to ensure the good stability and dynamic response of the system.
Each parameter e, ec, Δkp, Δki, and Δkd are composed of seven fuzzy subsets [NB, NM, NS, Z, PS, PM, and PB]. Among them, NB represents negative big; NM represents negative medium; NS represents negative small; Z represents zero; PS represents positive small; PM represents positive medium; and PB represents positive big. The domain of e, ec, Δkp, Δki, and Δkd are set to [−0.5 12.5], [−5 5], [−0.1 0.1], [−5 5], and [−2 2]. Figure 8 shows the reasoning three-dimensional space diagrams of kp, ki, and kd.
Based on the research and analysis of the ISOP system and past expert experience, fuzzy control rules for Δkp, Δki, and Δkd and are constructed as shown in Table 2, Table 3 and Table 4.

5. Simulation Results and Analysis

To verify the effectiveness and superiority of the fuzzy PID three-loop control used in the ISOP system, a simulation model was built on the MATLAB(R2023a)/Simulink platform and was compared with the traditional PID method. The system simulation parameters are shown in Table 5.

5.1. Load Variation Condition

The initial input voltage of the system is set to 10 kV and the output side load is 2 Ω. The load drops to 1 Ω at 0.3 s and rises to 2 Ω at 0.6 s. When the output load of the system suddenly changes, the output voltage and current waveforms of the ISOP system are as shown in Figure 9.
As shown in Figure 9, when the load of the system changes, the output voltage of the system can quickly stabilize at 400 V. Compared with traditional PID control, the system output voltage under the fuzzy PID three-loop control strategy reaches a stable time of 10 ms faster, the overshoot is reduced by 5 V, and the steady-state time is about 5 ms faster. The system output current can be quickly and stably controlled. Compared with traditional PID control, the system output current overshoot under the fuzzy PID three-loop control strategy is reduced by 4 A and the steady-state time is about 5 ms faster. In summary, when the system experiences a sudden load change, the system using the fuzzy PID three-loop control strategy is less affected by external interference, has faster dynamic response speed, and a better stability performance.
Figure 10 shows the field current and resonance current waveforms of the resonant network during sudden load changes. The current value of the resonant network will change with the change of load. When the load is reduced, the resonant current will increase, leading to a slight decrease in the efficiency of the converter. When the system is fully loaded, the CLLLC converter is located near the optimal operating point, at which point the efficiency is highest. Under both the full load and light load conditions of the system, the peak value of field current is basically the same, which indicates that the conditions for achieving zero voltage switch (ZVS) and zero current switch (ZCS) of the CLLLC converter are the same in both conditions, thus verifying the effectiveness and feasibility of the converter parameter design.

5.2. Voltage Variation Condition

Under this operating condition, the initial input voltage of the system was set to 10 kV. At 0.2 s, the input voltage drops to 9 kV. At 0.4 s, the input voltage returns to 10 kV. At 0.6 s, the input voltage rises to 11 kV. At 0.8 s, the input voltage returns to 10 kV. During this process, the output voltage and current waveforms of the ISOP system are as shown in Figure 11.
As shown in Figure 11, when the input voltage of the system changes, the output voltage of the system can quickly stabilize at 400 V. Compared with traditional PID control, the system output voltage under the fuzzy PID three-loop control strategy reaches a stable time of 4 ms faster, the overshoot is reduced by 12 V, and the steady-state time is about 5 ms faster. The system output current can quickly stabilize at 200 A, the overshoot of the system output current under the fuzzy PID three-loop control strategy is reduced by 6 A, and the steady-state time is about 6 ms faster. In summary, when the system experiences voltage fluctuations, the system using the fuzzy PID three-loop control strategy has a faster dynamic response speed and a better stability performance.
Figure 12 shows the field current and resonance current waveforms of the resonant network during voltage fluctuations. When the input voltage changes, the current value of the resonant network effectively does not change and the converter remains near the resonant point.

6. Experimental Results and Analysis

In order to verify whether the proposed fuzzy PID three-loop control strategy is feasible and effective, it is necessary to build an experimental hardware platform. However, due to the limitation of laboratory conditions, it is not possible to complete the 10 kV high-voltage experiment. Currently, the effectiveness of the scheme can be indirectly verified through low-voltage experiments, so this section designed and completed a 1 kW ISOP system prototype consisting of two basic modules, where a single basic module is cascaded with a buck/boost and a CLLLC converter. Before building the hardware platform, the feasibility of the low-voltage system experiment was verified through simulation.

6.1. Low-Voltage System Simulation Verification

Using the MATLAB(R2023a)/Simulink platform to build a low-voltage system simulation model, the initial input voltage of the system was set to 266 V and the output voltage of the system was set to 48 V. Figure 13 shows the waveform of the system output voltage and current when the system load or voltage suddenly changes.
The simulation results indicate that the low-voltage experiment is feasible, and when the system experiences load or voltage sudden changes, the system voltage can quickly recover to 48 V, with good stability. Moreover, compared to traditional PID, the ISOP system based on a fuzzy PID three-loop control strategy has a smaller overshoot and a faster dynamic response speed.

6.2. Low-Voltage System Experimental Verification

The experimental hardware platform was built as shown in Figure 14, where a single submodule uses TI’s model TMS320F28335 DSP as the control circuit, and combines it with a touch screen display to display the system’s output. Two sub modules can be connected in series on the input side and in parallel on the output side to form an ISOP system.
The control system structure diagram of DSP and the flow chart of the fuzzy PID control algorithm are shown in Figure 15. The sampling circuit collects the input and output voltage signals of each module and sends them to the A/D unit in TMS320F28335. After analysis and processing using the chip control algorithm, PWM signals are generated to drive the switching tubes in both converters.

6.2.1. Steady-state Experiment of Submodule

The input voltage of a single submodule was set to 133 V, the waveform of the module’s driving signal, steady-state resonant current, and output voltage were measured, as shown in Figure 16. At this time, the output voltage of the submodule is 48 V, the resonant frequency is 100 kHz, and the resonant current of the primary and secondary sides of CLLLC is in a sinusoidal form, indicating that the converter operates near the resonant point and has the highest efficiency. The experimental results indicate that the parameter designs of both buck/boost and CLLLC converters meet the requirements.

6.2.2. Dynamic Experiment of Submodule

  • Load variation condition
To verify the load capacity of the submodule, according to the experimental conditions, it carries a resistive load with a value of 4 Ω. When the load suddenly changes, the waveform of the module drive signal, steady-state resonant current, and output voltage can be measured, as shown in Figure 17.
At time t1, the system load suddenly changed from 4 Ω to 16 Ω and the load suddenly increased. The resonant current of the submodule converter decreased and gradually changed from a sine wave to a triangular wave. This is because the sudden change in load caused a change in the working range of the CLLLC converter. At this time, the working point of the converter deviated from the resonant point, resulting in a slight decrease in efficiency and no significant change in output voltage. Similarly, at time t2, the load suddenly changes from 16 Ω to 4 Ω and, at this point, the CLLLC converter returns to the resonant operating point, resulting in the highest efficiency of the converter. This experiment demonstrates that the submodule has good anti-interference ability and fast response speed under sudden load changes.
  • Voltage variation condition
The input voltage of a single submodule was set as 133 V, with a sudden change range of ±10%. When the voltage variation occurs, Figure 18 shows the output voltage and resonant current waveforms of the submodule.
At time t1, the input voltage suddenly changed from 133 V to 146 V and the output voltage was 52 V, which deviates from the rated output of the submodule at 48 V, but the error is within 10%, which meets the design requirements. Similarly, when the input voltage drops to 120 V at time t2, the output voltage also meets the design requirements. The amplitude of the resonant current of the converter remains effectively unchanged under voltage mutation conditions, indicating that the CLLLC converter has always been near the resonant operating point.

6.2.3. Steady-State Experiment of ISOP System

The initial input voltage of the ISOP system is 266 V. Figure 19 shows the input voltage, output voltage, and current waveforms of the system in the experiment. The input voltage of submodule 1 is 132 V and the input voltage of submodule 2 is 134 V. The input voltage of the two modules is approximately equal, achieving voltage equalization. The output voltage of the ISOP system is 48 V and the output current is 20 A.

6.2.4. Dynamic Experiment of ISOP System

  • Load variation condition
Under the condition of sudden load changes, the experimental waveforms of the ISOP system are as shown in Figure 20. At time t1, the load suddenly changed from 2.4 Ω to 9.6 Ω; at time t2, the load returned to 2.4 Ω. When the system load changed, the input voltage of each submodule remained approximately unchanged and the system output voltage remained generally stable at 48 V.
  • Voltage variation condition
Under the condition of sudden voltage changes, Figure 21 shows the experimental waveforms of the ISOP system. The initial input voltage of the system is 230 V. At time t1, it suddenly changes to 266 V, and at time t2, it changes from 266 V to 230 V. When the input voltage suddenly increases or decreases, the system can quickly recover to steady state, and at steady state, each module can reach an even distribution of input voltage. The output voltage of the system will fluctuate slightly on the basis of 48 V, but all are within the error range, meeting the requirements of the indicators. The effectiveness of the proposed control strategy was verified through relevant dynamic experiments.
Figure 22 shows the efficiency curve of the ISOP system, which shows an increasing trend with the increase in system output power. When the output power reaches 72% of the rated power, the system efficiency reaches its maximum, reaching 98.2%. When the power ratio exceeds 72%, the system efficiency will slightly decrease, but still remains around 98%.

7. Conclusions

This article cascades the buck/boost converter and the CLLLC resonant converter into submodules and combines the submodules in series and parallel to form an ISOP system for high-voltage input and high current output DC conversion scenarios. The number of submodules can be configured according to the power requirements of the working environment. A cascaded system model was established, gain analysis was conducted on the system, and a fuzzy PID three-loop control strategy was proposed. The MATLAB(R2023a)/Simulink simulation showed that the ISOP system can effectively convert 10 kV DC voltage to 400 V DC voltage, verifying its feasibility in high voltage level DC conversion fields, demonstrating the superiority of the proposed control strategy. Finally, a 1 kW prototype was constructed for experimental verification.
The ISOP system has the following advantages:
  • It is suitable for medium- and high-power applications with a high-voltage input and a low-voltage output, the system is easy to modularize, and can be expanded according to voltage levels;
  • The buck/boost converter in the system is used for voltage regulation, while the CLLLC resonant converter plays a role in electrical isolation and voltage matching, and is always near the optimal operating point, resulting in a high conversion efficiency;
  • Based on the fuzzy PID three-loop control strategy, the system has a better dynamic performance and stability in the event of voltage or load changes, and can achieve good voltage and current sharing effects.

Author Contributions

Conceptualization, C.W., S.L., P.W. and J.L.; methodology, C.W. and S.L.; software, S.L.; validation, C.W., P.W., and J.L.; formal analysis, C.W. and S.L.; investigation, S.L.; resources, C.W. and P.W.; data curation, S.L. and J.L.; writing—original draft preparation, S.L.; writing—review and editing, C.W.; visualization, P.W. and J.L.; supervision, P.W.; project administration, C.W. and J.L. All authors have read and agreed to the published version of the manuscript.

Funding

This research was funded by the National Natural Science Foundation of China, grant number 51907002 and also by the Beijing Natural Science Foundation, grant number 3232044.

Data Availability Statement

The data that support the findings of this study are available from the corresponding author upon reasonable request.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. The structure of the converters. (a) DAB converter structure; (b) LLC converter structure.
Figure 1. The structure of the converters. (a) DAB converter structure; (b) LLC converter structure.
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Figure 2. The structure of the converters. (a) Topological diagram of CLLLC resonant converter; (b) topological diagram of buck/boost converter.
Figure 2. The structure of the converters. (a) Topological diagram of CLLLC resonant converter; (b) topological diagram of buck/boost converter.
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Figure 3. The topology of the ISOP system.
Figure 3. The topology of the ISOP system.
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Figure 4. Equivalent circuit of cascaded converter.
Figure 4. Equivalent circuit of cascaded converter.
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Figure 5. The relationship between k, Q, and voltage gain M. (a) Relationship surface graph; (b) relationship surface projection diagram.
Figure 5. The relationship between k, Q, and voltage gain M. (a) Relationship surface graph; (b) relationship surface projection diagram.
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Figure 6. The relationship between k, Q, and the imaginary part of the impedance. (a) Relationship surface graph; (b) relationship surface projection diagram.
Figure 6. The relationship between k, Q, and the imaginary part of the impedance. (a) Relationship surface graph; (b) relationship surface projection diagram.
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Figure 7. Control block diagram of the ISOP system.
Figure 7. Control block diagram of the ISOP system.
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Figure 8. (a) The reasoning three-dimensional space diagrams of kp; (b) the reasoning three-dimensional space diagrams of ki; (c) the reasoning three-dimensional space diagrams of kd.
Figure 8. (a) The reasoning three-dimensional space diagrams of kp; (b) the reasoning three-dimensional space diagrams of ki; (c) the reasoning three-dimensional space diagrams of kd.
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Figure 9. Simulation waveform under load variation condition. (a) Output voltage waveform of the system; (b) output current waveform of the system.
Figure 9. Simulation waveform under load variation condition. (a) Output voltage waveform of the system; (b) output current waveform of the system.
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Figure 10. Resonant network current waveform under load variation condition.
Figure 10. Resonant network current waveform under load variation condition.
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Figure 11. Simulation waveform under voltage variation condition. (a) Output voltage waveform of the system; (b) output current waveform of the system.
Figure 11. Simulation waveform under voltage variation condition. (a) Output voltage waveform of the system; (b) output current waveform of the system.
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Figure 12. Resonant network current waveform under voltage variation condition.
Figure 12. Resonant network current waveform under voltage variation condition.
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Figure 13. The waveform of the low-voltage system. (a) System output voltage waveform under load variation condition; (b) system output current waveform under load variation condition; (c) system output voltage waveform under voltage variation condition; and (d) system output current waveform under voltage variation condition.
Figure 13. The waveform of the low-voltage system. (a) System output voltage waveform under load variation condition; (b) system output current waveform under load variation condition; (c) system output voltage waveform under voltage variation condition; and (d) system output current waveform under voltage variation condition.
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Figure 14. Experimental hardware platform. (a) Physical diagram of submodule; (b) ISOP system experimental platform.
Figure 14. Experimental hardware platform. (a) Physical diagram of submodule; (b) ISOP system experimental platform.
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Figure 15. Hardware control system structure diagram. (a) DSP control structure diagram; (b) fuzzy PID control algorithm flowchart.
Figure 15. Hardware control system structure diagram. (a) DSP control structure diagram; (b) fuzzy PID control algorithm flowchart.
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Figure 16. The waveform of submodule steady-state experiment.
Figure 16. The waveform of submodule steady-state experiment.
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Figure 17. Output voltage and resonant current waveform of submodules under load variation condition.
Figure 17. Output voltage and resonant current waveform of submodules under load variation condition.
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Figure 18. Output voltage and resonant current waveform of submodules under voltage variation condition.
Figure 18. Output voltage and resonant current waveform of submodules under voltage variation condition.
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Figure 19. Input and output voltage and current waveform of ISOP system steady-state experiment.
Figure 19. Input and output voltage and current waveform of ISOP system steady-state experiment.
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Figure 20. Input and output voltage and current waveform of ISOP system under load variation condition.
Figure 20. Input and output voltage and current waveform of ISOP system under load variation condition.
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Figure 21. Input and output voltage and current waveform of ISOP system under voltage variation condition.
Figure 21. Input and output voltage and current waveform of ISOP system under voltage variation condition.
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Figure 22. ISOP system efficiency curve.
Figure 22. ISOP system efficiency curve.
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Table 1. System design parameters for a single submodule.
Table 1. System design parameters for a single submodule.
ParameterSymbolValue
buck/boost rated input voltageVin-rated3333 V
buck/boost input voltage rangeVin3000–3666 V
buck/boost output resistanceR20 Ω
buck/boost switch frequencyfs120 kHz
Voltage rippleΔV<0.2%
CLLLC rated input voltageVCLLLC-rated1200 V
CLLLC input voltage rangeVCLLLC1147–1253 V
CLLLC rated output voltageVo-rated400 V
CLLLC output voltage rangeVo390–410 V
CLLLC output resistorRo2 Ω
CLLLC switching frequencyfs275–131 kHz
Resonant frequencyfr100 kHz
Table 2. The fuzzy rule library of kp.
Table 2. The fuzzy rule library of kp.
Δkpe
NBNMNSZPSPMPB
ecNBPBPBPMPMPSZZ
NMPBPBPMPSPSZNS
NSPMPMPMPSZNSNS
ZPMPMPSZNSNMNM
PSPSPSZNSNSNMNM
PMPSZNSNMNMNMNB
PBZZNMNMNMNBNB
Table 3. The fuzzy rule library of ki.
Table 3. The fuzzy rule library of ki.
Δkie
NBNMNSZPSPMPB
ecNBNBNBNMNMNSZZ
NMNBNBNMNSNSZZ
NSNBNMNSNSZPSPS
ZNMNMNSZPSPMPM
PSNMNSZPSPSPMPB
PMZZPSPSPMPBPB
PBZZPSPMPMPBPB
Table 4. The fuzzy rule library of kd.
Table 4. The fuzzy rule library of kd.
Δkde
NBNMNSZPSPMPB
ecNBPSNSNBNBNBNMPS
NMPSNSNBNMNMNSZ
NSZNSNMNMNSNSZ
ZZNSNSNSNSNSZ
PSZZZZZZZ
PMPBNSPSPSPSPSPB
PBPBPMPMPMPSPSPB
Table 5. System simulation parameters.
Table 5. System simulation parameters.
ConverterSymbolParameterValue
buck/boostLBEnergy storage inductor0.4 mH
C1Input side capacitance700 μF
C2Output side capacitance250 μF
fs1Switching frequency20 kHz
CLLLCL1Resonant inductance1.86 μH
L2Resonant inductance0.827 μH
C3Resonant capacitor1363 nF
C4Resonant capacitor3066.75 nF
LmMagnetizing inductance9.3 μH
nTransformer ratio3
fs2Switching frequency100 kHz
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Wen, C.; Li, S.; Wang, P.; Li, J. An Input-Series Output-Parallel DC–DC Converter Based on Fuzzy PID Three-Loop Control Strategy. Electronics 2024, 13, 2342. https://doi.org/10.3390/electronics13122342

AMA Style

Wen C, Li S, Wang P, Li J. An Input-Series Output-Parallel DC–DC Converter Based on Fuzzy PID Three-Loop Control Strategy. Electronics. 2024; 13(12):2342. https://doi.org/10.3390/electronics13122342

Chicago/Turabian Style

Wen, Chunxue, Shuhui Li, Peng Wang, and Jianlin Li. 2024. "An Input-Series Output-Parallel DC–DC Converter Based on Fuzzy PID Three-Loop Control Strategy" Electronics 13, no. 12: 2342. https://doi.org/10.3390/electronics13122342

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