Modeling and Suppression of Conducted Interference in Flyback Power Supplies Based on GaN Devices

Abstract

The application of GaN power devices has significantly increased the power density of flyback power supplies but has also caused severe electromagnetic interference (EMI) issues. To address the challenge of conducted interference in flyback power supplies, a comprehensive analysis of the transmission mechanism of conducted common-mode noise is undertaken. This analysis involves simplifying the equivalent model of conducted interference and leveraging the circuit characteristics of conducted noise to propose a solution for attenuating common-mode noise. Considering the constraints of external compensation capacitors, a balanced winding is further introduced to mitigate the impact of noise. To enhance the efficacy of conducted interference suppression, it is suggested to change the winding structure of the transformer and incorporate a shielding winding. This configuration aims to minimize the generation and propagation of common-mode noise within the transformer. Finally, experimental verification is carried out using a 150 W GaN flyback power supply prototype. The experimental results demonstrate that the proposed method effectively suppresses common-mode noise in the circuit.

1. Introduction

Flyback converters are renowned for their simple structure, requiring fewer components while providing a stable output and high efficiency. They are commonly used in low- and medium-power supplies. As the demand for higher efficiency and power density in power supplies increases, wide-bandgap semiconductor devices such as Gallium Nitride (GaN) and Silicon Carbide (SiC) are being increasingly employed. These devices exhibit superior switching characteristics, enabling power supplies to operate at ultrahigh switching frequencies. Consequently, this significantly enhances power density and reduces power losses in power supplies [1,2,3,4]. Power converters based on GaN devices achieve higher switching frequencies but are also associated with higher dv/dt and di/dt conversion rates, generating electromagnetic interference (EMI) noise that can disrupt low-voltage electronics and sensitive digital circuits [5,6]. To meet electromagnetic compatibility requirements, EMI filters are widely used in flyback converters. However, the typical volume of EMI filters constitutes about one-third of the converter, which is not conducive to cost savings and power density improvement [7,8]. This study aims to investigate the noise sources and propagation paths of flyback power supplies based on GaN devices, establish a noise propagation model, and propose an effective common-mode noise suppression method. The goal is to reduce the inherent noise of the flyback power supply, simplify the design of EMI filters, and thereby decrease the size and weight of these filters, ultimately improving the power density of the power supply.

Current research on the suppression of converter conduction interference primarily focuses on the following aspects: direct suppression at the noise source, effective cutoff or compensation of the noise propagation path, and offsetting of the displacement current. Reference [9] analyzed the conduction paths of the flyback common-mode interference current, measured the equivalent common-mode capacitance values on different paths, and suppressed the interference by balancing the primary and secondary common-mode currents to reduce the total common-mode displacement current to zero. Reference [10] proposed, for multi-output flyback converters, that the boost converter should take two isolated and one non-isolated output to prevent voltage spikes in the coupling inductors and reduce device stress, thereby reducing electromagnetic interference. Reference [11] suggested placing a switching tube between the two coils to equalize noise using the symmetry of the primary coils; however, this method complicates the circuit and is difficult to control, making its feasibility low. References [12,13,14] proposed altering the distributed capacitance between windings by changing the transformer structure and winding method, thereby improving the system’s EMC characteristics. Using copper foil shielding for transformers to suppress common-mode noise is also common, but the overall design theory guidance is insufficient [15]. Reference [16] utilized core shielding to address the coupling problem caused by the transformer core and employed a converter to solve the issues of multi-Y capacitance and capacitive filtering, providing better EMI suppression compared to conventional pulse-width modulation. Reference [17] highlighted the significant influence of transformer common-mode coupling capacitance on noise suppression and demonstrated that the feasibility of the transformer can be verified without an EMI receiver, using only a signal generator and an oscilloscope. References [18,19,20] incorporated balanced winding techniques to achieve effective shielding and offset common-mode noise, and they provided a theoretical method for calculating the number of turns in a balanced winding, which is valuable for this study. The common-mode noise coupling mechanism proposed in references [11,21,22,23] is more challenging to understand, and although it performs detailed modeling reasoning, the introduced shielding layer in the transformer is overly complex. References [16,24,25,26] discuss the integration of shielded windings and the modeling of capacitance distribution in flyback converters, which serves as a good guide for transformer EMC design. Reference [27] analyzes the EMI characteristics of wide-bandwidth semiconductor power systems, facilitating a subsequent analysis of conducted interference propagation.

Based on recent studies on conducted interference suppression, several methods are available to directly cancel common-mode noise or suppress it within the noise loop; however, their general applicability is limited. This paper proposes three methods to suppress common-mode noise interference in GaN flyback power supplies and provides a detailed analysis of each method. An experimental platform is constructed using a 150 W GaN flyback power supply, and the experimental results validate the effectiveness and feasibility of the proposed methods.

The rest of the paper is organized as follows. Section 2 describes the common-mode noise transmission mechanism in GaN-based flyback power supplies. Section 3 details three methods for common-mode noise suppression. The experimental results and conclusions are presented in Section 4 and Section 5, respectively.

2. Transmission Mechanisms of Conducted Common-Mode Noise

The conducted interference transmission model of the flyback converter is shown in Figure 1. The front dashed lines, L₁, L₂, C₁, C₂, R₁, and R₂, collectively form a Line Impedance Stabilization Network (LISN). This network ensures a stable impedance for accurately testing the conducted noise of the device under test and extracting clean power quality. C_Y1, C_Y2, C_X1, C_X2, and L constitute a simple primary EMI filter. C_X1 and C_Y2 filter out differential-mode interference between the grids. C_Y acts as a common-mode capacitor, and C_Y1, C_Y2, C_Y3, and C_Y4 are connected between a high voltage and the ground to filter out common-mode interference. Typically, ceramic capacitors of 4.7 nF and 2.2 nF are selected for this purpose. A separator is used to separate the differential-mode and common-mode noise, while an EMI receiver is utilized to receive the noise signal from the separator. D₁, D₂, D₃, and D₄ are the four diodes of the rectifier bridge. C_IN is the input capacitance, C_OUT is the output capacitance, C_PS is the primary noise source on the secondary-side winding’s equivalent capacitance, C_SP is the secondary-side noise source on the primary winding’s equivalent capacitance, C_PH is the distribution capacitance between the switching tubes and heatsink, C_SG is the distribution capacitance of the heatsink with respect to the ground, and C_S is the distribution capacitance of the secondary side with respect to the ground. V_O is the output voltage, PE means the ground, PG means the transformer’s primary-side ground, and SG is the transformer’s secondary-side ground. For safety reasons, SG is generally directly connected to the ground.

Figure 2 shows the common-mode noise transfer path from the primary side of the transformer to the secondary side. In this scenario, noise originating from voltage jumps (V_P) in the primary-side switching tube generates a noise current. This current flows through the primary equivalent capacitance (C_PS) of the transformer, the secondary-side distributed capacitance relative to the ground (C_S), and the LISN, forming a complete loop for noise transfer from the primary side to the secondary side.

Given that common-mode noise currents typically exhibit low magnitudes (in the μA range), the voltage drop across the LISN’s equivalent resistor is minimal and negligible compared to the noise source potential. The raw common-mode noise intensity for this path (without filtering) can be described by the following equation:

$$i_{\mathrm{CM}1}=\frac{(C_{\mathrm{PS}}{C}_{\mathrm{S}})}{C_{\mathrm{PS}}+C_{\mathrm{S}}}\frac{d{u}_{\mathrm{P}}}{dt}$$

(1)

Figure 3 shows the common-mode noise transmission path from the secondary side of the transformer to the primary side. Here, noise originating from potential jumps in the secondary-side diode generates a noise current. This current traverses various components, including the secondary equivalent capacitance (C_SP) of the transformer, the output capacitance (C_OUT), the secondary-side distributed capacitance relative to the ground (C_S), and the LISN, forming a complete noise transmission loop from the secondary side to the primary side.

The raw common-mode noise intensity, i_CM2, (without filtering) in this pathway can be calculated using the following equation:

$$i_{\mathrm{CM}2}=\frac{(C_{\mathrm{SP}}{C}_{\mathrm{S}})}{C_{\mathrm{SP}}+C_{\mathrm{S}}}\frac{d{u}_{\mathrm{D}}}{dt}$$

(2)

The effect of the output capacitance (C_OUT) is not considered in Equation (2) because the capacitive reactance of C_OUT is significantly lower than that of C_SP within the frequency range of 150 kHz to 30 MHz, which is used for evaluating conducted electromagnetic interference (EMI). Consequently, C_OUT has minimal impact on the common-mode noise in this pathway.

As shown in Figure 4, the transmission path of the common-mode noise, i_CM3, involves a heatsink. Here, noise arising from voltage jumps (V_P) in the primary-side switching tube generates a noise current. This current flows through the distributed capacitance of the heatsink (C_PH), the distributed capacitance of the heatsink relative to the ground (C_SG), and the LISN, forming a complete noise transmission loop.

The raw common-mode noise intensity, i_CM3, (without filtering) in this method can be calculated using the following equation:

$$i_{\mathrm{CM}3}=\frac{(C_{\mathrm{PH}}{C}_{\mathrm{SG}})}{C_{\mathrm{SP}}+C_{\mathrm{SG}}}\frac{d{u}_{\mathrm{P}}}{dt}$$

(3)

In an actual engineering environment, when the leakage current permitted by safety regulations is less than 0.35 mA, the capacitance value of the applied capacitor is adjusted. Simultaneously, based on the current value on the main line inductor (3A), the inductance is chosen to be 19 mH. The upper and lower stages of the common-mode inductance, L, function as a common-mode choke. When the common-mode current flows through them, the interference current aligns with the common-mode current, creating a high-impedance characteristic that effectively suppresses the common-mode current. This plays a significant role in reducing common-mode noise in the circuit.

To further clarify the impact of conducted interference, the interference propagation path is equivalently simplified below. The equivalent circuit is shown in Figure 5: R₁ is the 20 Ω equivalent impedance of the LISN, V_C is the voltage on the LISN, V_P is the equivalent voltage of the switching tube, V_D is the equivalent voltage of the diode, i_PS is the equivalent capacitance current of the primary-side noise source with respect to the secondary-side winding, and i_SP is the equivalent capacitance current of the secondary-side noise source with respect to the primary-side winding. Obviously, the common-mode displacement current will exist equally.

3. Conducted Common-Mode Noise Improvement Measures

3.1. Compensation Capacitors Improve Noise Effects

To optimize the EMC performance of flyback power supplies, additional filter capacitors, especially Y capacitors for common-mode noise suppression, are usually introduced into the transformer’s primary and secondary circuits to mitigate the effects of the conducted noise. This principle involves measuring the actual noise current, i_PS, on the primary side and the noise current, i_SP, on the secondary side, then adjusting the impedance of the noise path according to the measured values by repositioning the added capacitor compensation accordingly to suppress common-mode noise generation. If the primary noise, i_PS, increases, the capacitor, C_Y5, across the primary and secondary edges is placed on top of the transformer winding, and the secondary impedance is lowered by C_Y5 to increase i_SP.

$$i_{\mathrm{SP}}=\frac{(C_{\mathrm{SP}}+C_{\mathrm{Y}5})d{V}_{\mathrm{P}}}{dt}$$

(4)

The secondary noise current increases with the increase in the secondary impedance. When the secondary noise is similar to the primary noise, the common-mode noise of the primary and secondary sides cancels each other out. As a result, the common-mode current flowing through the LISN impedance network decreases. Therefore, if the secondary noise, i_SP, is larger, the compensation capacitor, C_Y6, should be placed in the opposite direction. At this time, the primary-side impedance decreases, and the value of i_PS increases accordingly.

$$i_{\mathrm{PS}}=\frac{(C_{\mathrm{PS}}+C_{\mathrm{Y}6})d{V}_{\mathrm{D}}}{dt}$$

(5)

The total common-mode noise is i_CM = i_PS − i_SP. When the primary and secondary noises are equal, the conducted common-mode noise can be suppressed from the source. Based on the filtering theory, we can initially estimate the capacitance value of the Y capacitor. Under rational conditions, assuming that the maximum allowable ripple voltage is ΔV, the capacitor needs to provide a charge in one switching cycle equal to the charge change of the input current ripple, I_rip, in that cycle, and according to the basic capacitor charging and discharging principle, the capacitance calculation formula is as follows:

$$C=\frac{\left(I_{\mathrm{rip}}\times T\right)}{\Delta V}$$

(6)

where I_rip is the desired common-mode noise current ripple, T is the operating period of the switching power supply, and ΔV is the maximum common-mode noise voltage fluctuation allowed on both sides of the capacitor. Experimental investigations on various values of compensation capacitance suggest an optimal range of 5 pF to 10 pF. If the value of the compensation capacitance is too small, the compensation effect may not be significant. Conversely, if the compensation capacitance is too large, it may result in overcompensation, leading to a deterioration in the common-mode noise suppression effect. The circuit model with a compensation capacitor added is shown in Figure 6.

3.2. Balanced Winding Improves Noise Impact

The high-frequency switching characteristics of GaN devices lead to an asymmetric distribution of current in the circuit. The current conversion between the primary and secondary windings of the transformer, combined with the transformer’s leakage inductance and other parasitic parameters, unavoidably generates common-mode noise. To mitigate these issues, balanced windings are added to the transformer’s primary side to compensate for and suppress the noise. When the common-mode noise current passes through the power line, the balanced winding senses this noise and generates a reverse displacement current. This reverse displacement current creates a magnetic field in the core that cancels out the magnetic field of the original common-mode noise, significantly reducing the propagation of common-mode noise on the power line and greatly enhancing the EMI performance of the power system.

The transformer circuit model with a balanced winding added is shown in Figure 7. In this model, Pri denotes the primary winding, Sec denotes the secondary winding, and Bal denotes the balanced winding. V_SW represents the voltage across the original primary winding, and Pri1 and Pri2 refer to two single-layer primary windings connected in series with turn numbers N_P1 and N_P2, respectively. In the actual design, the balanced winding is closely surrounded by the outer secondary winding, and its heterodyne end is connected to the primary ground (PG) of the transformer. This ensures that the transformer’s original noise can be canceled out with the common-mode noise transmitted from the secondary winding to the balanced winding. The winding arrangement of the transformer with the balanced winding added is shown in Figure 8.

By disregarding the leakage flux phenomenon and ignoring the AC impedance changes caused by the skin effect and proximity effect, we can assume that the potential is uniformly distributed in the winding, and the parasitic capacitance is also uniformly distributed along the winding. Referring to the layout of the winding arrangement and its endpoint connection relationship shown in Figure 8, we can plot the potential distribution of the winding at x = 0 along the y-axis, as shown in Figure 9. Here, h represents the height of the core window, l is the length of one turn of the winding, N_B is the number of turns in the balanced winding, and h_B is the width of the balanced winding.

From the winding potential distribution relationship shown in Figure 9, the potential expression for the primary winding, Pri1, is $L\left(x,y\right)$, and the potential expression for the secondary winding, Sec, is $Q\left(x,y\right)$:

$$Q\left(x,y\right)=\frac{N_{\mathrm{S}}-1}{N_{\mathrm{P}}}\cdot \frac{y}{h}{V}_{\mathrm{SW}}+\frac{1}{N_{\mathrm{P}}}\cdot \frac{x}{l}{V}_{\mathrm{SW}}$$

(7)

$$L\left(x,y\right)=\frac{N_{\mathrm{P}1}-1}{N_{\mathrm{P}}}\cdot \frac{y}{h}{V}_{\mathrm{SW}}+\frac{1}{N_{\mathrm{P}}}\cdot \frac{x}{l}{V}_{\mathrm{SW}}$$

(8)

The common-mode displacement current, i_{Pri1_Sec}, from the primary winding, Pri1, to the secondary winding, Sec, can be derived using Equation (9), where C_{P1_S} is the parasitic capacitance between the primary winding, Pri1, and the secondary winding, Sec, and d_{P1_S} is the distance between the primary winding, Pri1, and the secondary winding, Sec.

$$i_{\mathrm{Pri}1\text{\_}\mathrm{Sec}}={\displaystyle {\int }_0^h{\displaystyle {\int }_0^l\frac{C_{\mathrm{P}1\text{\_}\mathrm{S}}}{h\cdot l}}}\cdot \frac{d}{dt}\left[L\left(x,y\right)-Q\left(x,y\right)\right]dxdy$$

(9)

$$C_{\mathrm{P}1\text{\_}\mathrm{S}}\approx \epsilon \frac{hl}{d_{\mathrm{P}1\text{\_}\mathrm{S}}}$$

(10)

The expression for the potential of the balanced winding can be calculated from Equations (7)–(10) as follows:

$$N\left(x,y\right)=\frac{N_{\mathrm{B}}}{N_{\mathrm{P}}}\cdot \frac{y}{h}{V}_{\mathrm{SW}}-\frac{N_{\mathrm{B}}}{N_{\mathrm{P}}}\cdot \frac{h}{h}{V}_{\mathrm{SW}}+\frac{1}{N_{\mathrm{P}}}\cdot \frac{x}{l}{V}_{\mathrm{SW}}$$

(11)

The common-mode displacement current, i_{Sec_Bal}, from the secondary winding to the balance winding can be determined using Equation (12), where C_{S_B} is the parasitic capacitance between the secondary winding and the balance winding, d_{S_B} is the distance between Sec and Bal, d_B is the diameter of the balance winding, and ε is the dielectric constant.

$$i_{\mathrm{Sec}\text{\_}\mathrm{Bal}}={\displaystyle {\int }_{h-h_B}^h{\displaystyle {\int }_0^l\frac{C_{\mathrm{S}\text{\_}\mathrm{B}}}{h_{\mathrm{B}}\cdot l}}}\cdot \frac{d}{dt}\left[Q\left(x,y\right)-N\left(x,y\right)\right]dxdy$$

(12)

$$C_{\mathrm{S}\text{\_}\mathrm{B}}\approx \epsilon \frac{h_{\mathrm{B}}l}{d_{\mathrm{S}\text{\_}\mathrm{B}}}$$

(13)

$$N_{\mathrm{B}}\approx \frac{h_{\mathrm{B}}}{d_{\mathrm{B}}}$$

(14)

Based on Formulas (7)–(14), and making i_{Pri1_Sec} = i_{Sec_Bal}, a numerical solution can be found by determining the number of turns in the balanced winding.

3.3. Transformer Structure Improves Noise Impact

Transformers play a crucial role in the electromagnetic compatibility (EMC) performance of power supplies. For flyback power supplies based on GaN devices, the noise generated by the high-frequency switching characteristics of GaN devices is superimposed on the noise produced by the transformer, affecting the EMI characteristics of the power supply. Therefore, it is necessary to implement improvement measures for the transformer. Elements such as the winding structure, winding sequence, and shielding form of the transformer significantly impact the electromagnetic interference (EMI) performance of the entire system. The distributed capacitance of the transformer is influenced by its structural parameters, and the size of the distributed capacitance between windings can be controlled by altering the winding structure and adding shielding layers to enhance the EMI performance of the flyback converter.

Parasitic resonance phenomena caused by the transformer’s interlayer capacitance pose a substantial challenge to the electromagnetic compatibility (EMC) performance of converters. To address these issues, the voltage and current stresses on switching tubes during switching are reduced by decreasing the interlayer capacitance, which in turn improves the transformer’s operating performance. Figure 10 shows the voltage distribution on the winding under four different winding methods (A, B, C, D). For the same winding, the inter-turn voltages of the two layers of the winding exhibit a decreasing trend, and the equivalent interlayer capacitance decreases accordingly.

Figure 11 shows the winding arrangement structure of the transformer using the ordinary winding method and sandwich winding method, respectively. Compared to the normal winding method, the sandwich winding method features a larger spacing between the two layers of primary windings, resulting in reduced interlayer capacitance. Consequently, the sandwich winding can diminish parasitic resonance in the circuit and mitigate the adverse effects of parasitic oscillations on the EMC performance of the converter.

Referring to Figure 11b, although the sandwich winding method decreases the interlayer capacitance, the increased area between the primary and secondary windings leads to an elevated intergroup capacitance. This increase in the intergroup capacitance exacerbates the common-mode noise of the transformer. To address this issue, a shielding layer can be added between the adjacent primary and secondary windings to reduce direct magnetic coupling, thereby effectively suppressing the propagation of common-mode noise.

When the flyback power supply operates at high frequencies, the common-mode noise generated by the high-speed switching of the transistors creates a strong electromagnetic field within the transformer. A sandwich-type winding structure can mitigate most of this noise by utilizing a shielding layer, which effectively guides the noise current to the ground, thereby eliminating conduction through the power line. Consequently, it significantly reduces electromagnetic interference with the external environment and the power grid.

3.3.1. Transformer Distributed Capacitance Modeling

The common-mode noise transmission path with a shielding layer added is shown in Figure 12. This figure incorporates the path i_SSH into the original common-mode noise transmission path. The noise is generated by a voltage jump, V_P, in the primary-side switching tube, forming a noise current that flows through the distributed capacitance, C_SSH, between the secondary winding and the shielding layer. It then passes through the rectifier bridge and the LISN, eventually returning to the diode, D, from the ground. Figure 13 shows an equivalent model of conducted interference with a shielding layer added.

The shielding layer can be categorized into two forms: copper foil shielding and winding shielding. Figure 14 shows the two forms of transformer shielding.

During the production process, it is crucial to prevent short circuits caused by overlapping copper foil. This can be achieved by properly wrapping insulating tape at the beginning and end of the foil. Enameled wire with diameters ranging from 0.1 mm to 0.3 mm is commonly used for shielding windings, as it helps maintain consistency in wire diameter and simplifies the manufacturing process. The number of turns and layout of the shielding winding significantly impact the overall shielding efficiency. Therefore, during fine winding operations, it is essential to use insulating tape to ensure robust and effective insulation at the winding ends. In summary, compared to relying solely on copper foil for shielding, the shielding winding design offers more advantages in terms of production convenience and cost control.

When exploring the practical engineering applications of sandwich-structure transformers, the winding point of the shielded winding is a critical yet often overlooked detail. The arrangement order of the windings is as follows: primary winding I, secondary winding, shielding winding, and primary winding II. The starting position of the shielded windings directly affects the transformer’s EMI characteristics. During the specific implementation process, the shielding winding should be wound from the transformer’s reference ground potential (RGP), with its end connected to the magnetic core. This connection strategy is significant as it ensures that during the transformer’s operation, the core and the winding’s voltages change in opposite directions, achieving a mutual offset effect and maximizing the core’s shielding effectiveness (the drain winding refers to the winding connected to the switching device). However, if the polarity of the shielding winding is misconfigured (i.e., the start and end are reversed), the voltage change direction will align with that of the drain windings, resulting in a loss in the shielding effect in the core. The winding order of the sandwich-structure transformer and the correct winding points for the shielded windings are shown in Figure 15.

3.3.2. Shielding Winding Design for Flyback Transformers

According to the common-mode noise canceling principle of the flyback transformer, the optimal number of shielding winding turns can be determined by calculating the common-mode current and the number of winding turns. The complete inference steps are described below.

Figure 16 shows the common-mode interference transmission path with a shielding winding added. Here, i_SHS represents the common-mode current transferred from the shielding winding to the secondary side, and i_SSH represents the common-mode current transferred from the secondary side to the shielding winding.

The total common-mode current can be obtained from Figure 16 as follows:

$$i_{\mathrm{CM}}=(i_{\mathrm{PS}}-i_{\mathrm{SP}})+\left(i_{\mathrm{SHS}}-i_{\mathrm{SSH}}\right)$$

(15)

where (i_PS − i_SP) represents the common-mode current between the primary and secondary windings, and (i_SHS − i_SSH) represents the common-mode current between the shielding and secondary windings.

The structure of the transformer windings significantly affects the magnitude of the common-mode current and the voltage distribution within the transformer. By utilizing the connections between the transformer windings, further calculations for the parameters (i_PS − i_SP) and (i_SHS − i_SSH) can be performed. Figure 17 shows the structural parameters between the primary and secondary windings of the transformer. Figure 18 shows the structural parameters between the shield winding and the secondary winding of the transformer.

V_P0, V_S0, and V_SH0 denote the low-potential reference points on the primary, secondary, and shielding windings, respectively. h_P1, h_P1, and x represent the distances from a point on the original edge to the low-potential point. V_P1, V_P2, and V_PX are the voltages of the primary winding at heights h_P1, h_P2, and x from the low-potential reference point. h_S1, h_S2, h_S3, h_S4, and y denote the distances from a point on the secondary side to the low-potential reference point. V_S1, V_S2, V_S3, V_S4, and V_SY represent the voltages on the secondary side at heights h_S1, h_S2, h_S3, h_S4, and y from the low-potential reference point. h_SH1, h_SH2, and z denote the distances from a point on the shielding winding to the low-potential reference point. V_SH1, V_SH2, and V_SHZ denote the voltages on the shielding winding at heights h_SH1, h_SH2, and z from the low-potential reference point. d_PS represents the distance from the primary winding to the secondary winding. d_SHS represents the distance between the shield and the secondary winding. C_PXSY represents the magnitude of the capacitance element between the primary winding and the secondary winding. C_SHSY represents the magnitude of the capacitance element between the shield winding and the secondary winding. Assuming that the distributed capacitance between adjacent ends of the winding is uniformly distributed, we obtain the following:

$$\left\{\begin{array}{l}{C}_{\mathrm{PXSY}}=\frac{C_{\mathrm{PS}0}}{\left(h_{\mathrm{P}2}-h_{\mathrm{P}1}\right)\times \left(h_{\mathrm{S}2}-h_{\mathrm{S}1}\right)}\\ C_{\mathrm{SHSY}}=\frac{C_{\mathrm{shs}0}}{\left(h_{\mathrm{SH}2}-h_{\mathrm{SH}1}\right)\times \left(h_{\mathrm{S}4}-h_{\mathrm{S}3}\right)}\end{array}\right.$$

(16)

V_PN0 represents the voltage difference between the first and last terminals of the primary winding, V_SN0 represents the voltage difference between the first and last terminals of the secondary winding, V_SHN0 represents the voltage difference between the first and last terminals of the shielding winding, N_P represents the number of turns on the primary winding, N_S represents the number of turns on the secondary winding, and v represents the voltage increment for each turn on the winding. By considering these variables, the following relationship can be derived:

$$\left\{\begin{array}{l}{V}_{\mathrm{PN}0}=N_{\mathrm{P}}\times v\\ V_{\mathrm{SN}0}=N_{\mathrm{S}}\times v\\ V_{\mathrm{SHN}0}=N_{\mathrm{SH}}\times v\end{array}\right.$$

(17)

The heights of the primary winding, secondary winding, and shielding winding are denoted as H_P, H_S, and H_SH, respectively. The following relationship can then be established:

$$\left\{\begin{array}{l}\frac{d{V}_{\mathrm{PX}}}{dt}=\frac{d\left(V_{\mathrm{P}0}+\frac{x}{H_{\mathrm{P}}}\times N_{\mathrm{P}}\times v\right)}{dt}\\ \frac{d{V}_{\mathrm{SY}}}{dt}=\frac{d\left(V_{\mathrm{S}0}+\frac{y}{H_{\mathrm{S}}}\times N_{\mathrm{S}}\times v\right)}{dt}\\ \frac{d{V}_{\mathrm{SHZ}}}{dt}=\frac{d\left(V_{\mathrm{SH}0}+\frac{z}{H_{\mathrm{SH}}}\times N_{\mathrm{SH}}\times v\right)}{dt}\end{array}\right.$$

(18)

Based on the structural parameters labeled in Figure 17 and Figure 18, and in conjunction with the current and voltage relationship in the capacitor, the following equation can be formulated:

$$\left\{\begin{array}{l}{i}_{\mathrm{P}}={\displaystyle {\int }_{h_{\mathrm{S}1}}^{h_{\mathrm{S}2}}{\displaystyle {\int }_{h_{\mathrm{P}1}}^{h_{\mathrm{P}2}}{C}_{\mathrm{PXSY}}\frac{d\left(V_{\mathrm{PX}}-V_{\mathrm{SY}}\right)}{dt}dxdy}}\\ i_{\mathrm{SH}}={\displaystyle {\int }_{h_{\mathrm{S}3}}^{h_{\mathrm{S}4}}{\displaystyle {\int }_{h_{\mathrm{SH}1}}^{h_{\mathrm{SH}2}}{C}_{\mathrm{SHSY}}\frac{d\left(V_{\mathrm{SHZ}}-V_{\mathrm{SY}}\right)}{dt}dzdy}}\end{array}\right.$$

(19)

By substituting Equation (18) into (19), we obtain the following:

$$\left\{\begin{array}{l}{i}_P={\displaystyle {\int }_{h_{\mathrm{S}1}}^{h_{\mathrm{S}2}}{\displaystyle {\int }_{h_{\mathrm{P}1}}^{h_{\mathrm{P}2}}{C}_{\mathrm{PXSY}}\left[\frac{d\left(V_{\mathrm{P}0}-V_{\mathrm{S}0}\right)}{dt}+\frac{x}{H_{\mathrm{P}}}\times N_{\mathrm{P}}\frac{dv}{dt}-\frac{y}{H_{\mathrm{S}}}\times N_{\mathrm{S}}\frac{dv}{dt}\right]dxdy}}\\ i_{SH}={\displaystyle {\int }_{h_{\mathrm{S}3}}^{h_{\mathrm{S}4}}{\displaystyle {\int }_{h_{\mathrm{SH}1}}^{h_{\mathrm{SH}2}}{C}_{\mathrm{SHSY}}\left[\frac{d\left(V_{\mathrm{SH}0}-V_{\mathrm{S}0}\right)}{dt}+\frac{z}{H_{\mathrm{SH}}}\times N_{\mathrm{SH}}\frac{dv}{dt}-\frac{y}{H_{\mathrm{S}}}\times N_{\mathrm{S}}\frac{dv}{dt}\right]dzdy}}\end{array}\right.$$

(20)

The values of d(V_P0 − V_S0)/dt, d(V_SH0 − V_S0)/dt, and dv/dt in Equation (20) are associated with the interference source. The relationship between these values can be expressed as shown in Equation (21):

$$\left\{\begin{array}{l}{i}_{\mathrm{P}}={\displaystyle {\int }_{h_{\mathrm{S}1}}^{h_{\mathrm{S}2}}{\displaystyle {\int }_{h_{\mathrm{P}1}}^{h_{\mathrm{P}2}}{C}_{\mathrm{PXSY}}\frac{d\left(V_{\mathrm{PX}}-V_{\mathrm{SY}}\right)}{dt}dxdy}}\\ i_{\mathrm{SH}}={\displaystyle {\int }_{h_{\mathrm{S}3}}^{h_{\mathrm{S}4}}{\displaystyle {\int }_{h_{\mathrm{SH}1}}^{h_{\mathrm{SH}2}}{C}_{\mathrm{SHSY}}\frac{d\left(V_{\mathrm{SHZ}}-V_{\mathrm{SY}}\right)}{dt}dzdy}}\end{array}\right.$$

(21)

By substituting Equation (21) into Equation (20), the following relationship is obtained:

$$\left\{\begin{array}{l}{i}_{\mathrm{P}}=C_{\mathrm{PS}0}\frac{\mathrm{d}v}{\mathrm{d}t}\times \left(N_0+\frac{h_{\mathrm{P}1}+h_{\mathrm{P}2}}{2\times H_{\mathrm{P}}}\times N_{\mathrm{P}}-\frac{h_{\mathrm{S}1}+h_{\mathrm{S}2}}{2\times H_{\mathrm{S}}}\times N_{\mathrm{S}}\right)\\ i_{\mathrm{SH}}=C_{\mathrm{SHS}0}\frac{dv}{\mathrm{d}t}\times \left(N_1+\frac{h_{\mathrm{SH}1}+h_{\mathrm{SH}2}}{2\times H_{\mathrm{SH}}}\times N_{\mathrm{SH}}-\frac{h_{\mathrm{S}3}+h_{\mathrm{S}4}}{2\times H_{\mathrm{S}}}\times N_{\mathrm{S}}\right)\end{array}\right.$$

(22)

C_PS0 represents the intergroup distributed capacitance between the primary and secondary windings, while C_SHS0 represents the intergroup distributed capacitance between the secondary and shielding windings. C_PS0 and C_SHS0 can be represented by the following equations:

$$\left\{\begin{array}{l}{C}_{\mathrm{PS}0}=k_{\mathrm{PS}}{\epsilon }_{\mathrm{PS}}\frac{\left(h_{\mathrm{P}2}-h_{\mathrm{P}1}\right)\times l_{\mathrm{avps}}}{d_{\mathrm{PS}}}\\ C_{\mathrm{SHS}0}=k_{\mathrm{SHS}}{\epsilon }_{\mathrm{SHS}}\frac{\left(h_{\mathrm{SH}2}-h_{\mathrm{SH}1}\right)\times l_{\mathrm{avshs}}}{d_{\mathrm{SHS}}}\end{array}\right.$$

(23)

Here, k represents a constant, ε represents the dielectric constant, and l represents the average circumference of the winding.

3.3.3. Determination of Optimum Number of Turns for Shielding Winding

Given the overall architecture and materials of the transformer, the value of the structural capacitance depends solely on the number of turns on the shielding winding, N_SH. There is a functional relationship between the common-mode current and the shielding winding, which can be represented as i_CM = g(N_SH) × dv/dt, where g(N_SH) is a function of the number of turns on the shielding winding.

For any section of the transformer where the primary winding is adjacent to the secondary winding, the common-mode current, i_P, between that adjacent section can be represented as follows:

$$i_{\mathrm{P}}=g_{\mathrm{P}}\left(N_{\mathrm{SH}}\right)\times \frac{dv}{dt}$$

(24)

$$g_{\mathrm{P}}\left(N_{\mathrm{SH}}\right)=k_{\mathrm{PS}}{\epsilon }_{\mathrm{PS}}\frac{\left(h_{\mathrm{P}2}-h_{\mathrm{P}1}\right)\times l_{\mathrm{avps}}}{d_{\mathrm{PS}}}\left(N_0+\frac{h_{\mathrm{P}1}+h_{\mathrm{P}2}}{2\times H_{\mathrm{P}}}\times N_{\mathrm{P}}-\frac{h_{\mathrm{S}1}+h_{\mathrm{S}2}}{2\times H_{\mathrm{S}}}\times N_{\mathrm{S}}\right)$$

(25)

Similarly, the common-mode current, $i_{\mathrm{SH}}$, between any section of the shielding winding and the secondary winding in the transformer can be represented as follows:

$$i_{\mathrm{SH}}=g_{\mathrm{SH}}\left(N_{\mathrm{SH}}\right)\times \frac{dv}{dt}$$

(26)

$$g_{\mathrm{SH}}\left(N_{\mathrm{SH}}\right)=k_{\mathrm{SHS}}{\epsilon }_{\mathrm{SHS}}\frac{\left(h_{\mathrm{SH}2}-h_{\mathrm{SH}1}\right)\times l_{\mathrm{avshs}}}{d_{\mathrm{SHS}}}\left(N_1+\frac{h_{\mathrm{SH}1}+h_{\mathrm{SH}2}}{2\times H_{\mathrm{SH}}}\times N_{\mathrm{SH}}-\frac{h_{\mathrm{S}3}+h_{\mathrm{S}4}}{2\times H_{\mathrm{S}}}\times N_{\mathrm{S}}\right)$$

(27)

H_SH, h_P1, h_P2, h_S1, h_S2, h_S3, and h_S4 can be represented either by known transformer construction parameters or by a function, g(N_SH), that depends on the number of turns on the shielding winding. This is shown in Equation (27), where w_P represents the width of each turn on the primary winding, w_S is the width of each turn of the primary winding, w_SH is the width of each turn on the shielding winding, H₀ is the height between the bottom end of the shielding winding and the bottom end of the primary winding, N_P2 represents the number of turns on the winding with a corresponding height of h_P2 in the primary-side winding, and N_S2 represents the number of turns on the winding with a corresponding height of h_S2 in the secondary winding.

$$\left\{\begin{array}{l}{H}_{\mathrm{SH}}=w_{\mathrm{SH}}\times N_{\mathrm{SH}}\\ h_{\mathrm{P}1}=H_0+w_{\mathrm{SH}}\times N_{\mathrm{SH}}\\ h_{\mathrm{P}2}=w_{\mathrm{P}}\times N_{\mathrm{P}2}\\ h_{\mathrm{S}1}=H_0+w_{\mathrm{SH}}\times N_{\mathrm{SH}}\\ h_{\mathrm{S}2}=w_{\mathrm{S}}\times N_{\mathrm{S}2}\\ h_{\mathrm{S}4}=h_{\mathrm{S}3}+w_{\mathrm{SH}}\times N_{\mathrm{SH}}\end{array}\right.$$

(28)

The total common-mode current in the transformer, as a function of the number of turns in the shielding winding, can be represented as follows:

$$i_{\mathrm{CM}}={\displaystyle \sum _{j=1}^n{i}_{pj}+}{\displaystyle \sum _{k=1}^m{i}_{shk}=}g\left(N_{\mathrm{SH}}\right)\times \frac{dv}{dt}$$

(29)

$i_{pj}$ represents the common-mode current in the region adjacent to the primary winding and the secondary winding in section $j$. $n$ represents the number of segments in the transformer in which an adjacent region exists between the primary winding and the secondary winding. $i_{shk}$ represents the common-mode current in the region adjacent to the shielding winding and the secondary winding in section $k$. $m$ represents the number of segments in which an adjacent region exists between the shielding winding and the secondary winding.

Combined with Equation (29), when $g\left(N_{\mathrm{SH}}\right)$ is at its minimum, the common-mode current, $i_{\mathrm{CM}}$, is also minimized. This can be solved by finding the root of $\left|g\left(N_{\mathrm{SH}}\right)\right|=0$. The optimum number of turns in the shielding winding can be obtained by taking the integer part of the root of $\left|g\left(N_{\mathrm{SH}}\right)\right|=0$.

4. Discussion

To validate the feasibility of the proposed conduction noise suppression method, a 150 W GaN flyback power supply was developed as the test subject, with its main parameters listed in

Table 1. Electrical parameters of the prototype.

Electrical Parameters	Rating
Input voltage, $V_{\mathrm{in}}/\mathrm{V}$	220
Output voltage, $V_{\mathrm{o}}/\mathrm{V}$	12
Output power, $P_{\mathrm{o}}/\mathrm{W}$	150
Switching frequency, $f/\mathrm{Hz}$	1 × 105

. To ensure experimental accuracy, three noise reduction schemes (labeled as A, B, and C) were tested using a single experimental prototype. During these tests, only one component of the flyback power supply was altered at a time, such as adding a compensation capacitor, installing a balanced winding in the transformer, or installing a shielding winding in the transformer.

To validate the common-mode interference suppression method proposed in this paper, a conducted interference test platform was constructed in accordance with the CISPR 22 standard. The electrical connection block diagram of the experimental platform is shown in Figure 19. The experimental environment and noise testing instruments are shown in Figure 20. The LISN model used is the Cybertek EM5040B (by Shenzhen Zhiyong Electronics Co., Ltd., Shenzhen, China.), the EMI receiver model is the RS ESCI7 (by Rohde & Schwarz, Munich, Germany.), and the test frequency range is from 150 kHz to 30 MHz. The model of the separator is the TBLM1 MATE (by Satake, Hiroshima, Japan). During the testing process, the LISN was employed to eliminate power grid fluctuations and isolate the required signal, which was then transmitted to the EMI receiver via the separator. The EMI receiver performed spectral analysis on the received signal to obtain the noise spectrogram, which was subsequently transmitted to the host computer for processing and storage.

The EMI test was conducted on the original flyback power supply prototype without implementing the proposed noise reduction method. The transformer in the original flyback power supply prototype employs a standard winding technique, utilizing an EFD20 core model(by TDG, Zhejiang, China), and the core material is TP4 from TDG (Zhejiang, China). The EMI spectrum of the original flyback power supply is shown in Figure 21.

Scheme A: The experimental power supply in this scheme is based on the original flyback design, with an external compensation capacitor added. Figure 22 illustrates the EMI spectrum of the flyback power supply with a 5 pF compensation capacitor, while Figure 23 shows the EMI spectrum with a 20 pF compensation capacitor.

Comparing Figure 22 with the original EMI spectrogram, it is evident that the noise profile decreases by approximately 15 dB·μV in the 150 kHz to 1 MHz range and by about 10 dB·μV in the 1 MHz to 10 MHz range. The addition of appropriately valued compensation capacitors effectively reduces the common-mode noise level, particularly in the low- and mid-frequency bands of the noise spectrum, demonstrating a significant compensatory effect. This solution employs a simple circuit and is quick and effective to implement.

By comparing the test results in Figure 23 with the noise profile in Figure 22, it is evident that increasing the compensation capacitance from 5 pF to 20 pF results in a rise of approximately 20 dB·μV in the noise profile within the 4.5 MHz to 5.5 MHz range, indicating a significant deterioration in the compensation effect. As the compensation capacitance increases, noise propagation is further exacerbated.

Scheme B: This experimental power supply is based on the original flyback power supply, with the addition of a balanced winding in the transformer. The specific parameters of the transformer are detailed in

Table 2. Transformer parameters with balanced winding added.

Parameters (Units)	Rating
NP (turns)	120
NS (turns)	9
h (mm)	9.66
dP1_S (mm)	0.325
dS_SH (mm)	0.285
dP2_S (mm)	0.452
dS_B (mm)	0.325
dB (mm)	0.200

. Figure 24 shows the EMI spectrum of the transformer with the balanced winding added. Comparing the noise curve in Figure 24 with the original spectrum, it can be observed that the noise level of the converter decreases by approximately 15 dB·μV in the range of 150 kHz to 1 MHz and by about 20 dB·μV in the range of 10 MHz to 20 MHz. This analysis indicates that the balanced winding significantly suppresses common-mode noise in both low- and high-frequency bands.

Scheme C: The experimental power supply in this scheme is based on the original flyback power supply, with the transformer employing a sandwich winding method and an additional shielding winding. The specific parameters of this transformer are shown in

Table 3. Transformer parameters with shielding winding added.

Parameters (Units)	Rating
NP (turns)	120
NS (turns)	9
NSH (turns)	40
hP1 (mm)	8
hP2 (mm)	8
hP3 (mm)	6.28
wSH (mm)	0.23

. Figure 25 shows the EMI spectrum of the transformer with the sandwich structure and additional shielding winding. Comparing the noise curve in Figure 25 with the original noise spectrum, it is evident that the noise spectrum decreased by approximately 15 dB·μV in the range of 150 kHz to 1 MHz, 10 dB·μV in the range of 10 MHz to 20 MHz, and 20 dB·μV in the range of 10 MHz to 30 MHz. The high-frequency noise peaks are significantly attenuated. In summary, the addition of the shielding winding to the transformer significantly improved the full-frequency-band common-mode noise of the flyback converter. Compared with conventional solutions, this program can achieve full-band noise suppression to a certain extent.

5. Conclusions

Flyback power supplies utilize GaN devices to increase efficiency and power density. However, the high-frequency switching characteristics of GaN devices cause EMI problems, jeopardizing the stable performance of the power supply. This paper provides a detailed analysis of the noise transmission mechanism in GaN-based flyback converters and proposes three improvement schemes to address electromagnetic interference. Scheme A: Based on the characteristics of the noise circuit, an external compensation capacitor is used to improve the impedance of the noise path, allowing primary and secondary noise to cancel each other out. Scheme B: Introducing balanced windings in the transformer effectively reduces common-mode noise caused by transformer leakage inductance and parasitic parameters. Scheme C: To suppress electromagnetic interference at the source, a method involving changes to the transformer structure and the use of shielded windings is proposed, significantly reducing common-mode noise levels and enhancing the electromagnetic compatibility of the GaN-based flyback power supply. Finally, a comparative experiment was conducted using the GaN-based flyback power supply, and the experimental results fully verify the feasibility of the proposed conducted interference suppression methods.

In this paper, three novel improvement schemes are proposed to enhance noise suppression in GaN-based flyback power supplies, providing significant practical guidance for improving their EMI performance.