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Article

Design of an Embedded Test Bench for Organic Photovoltaic Module Testing

Department of Energy, Politecnico di Milano, Via Lambruschini 4, 20156 Milan, Italy
*
Author to whom correspondence should be addressed.
Electronics 2024, 13(16), 3104; https://doi.org/10.3390/electronics13163104 (registering DOI)
Submission received: 16 June 2024 / Revised: 30 July 2024 / Accepted: 1 August 2024 / Published: 6 August 2024
(This article belongs to the Section Industrial Electronics)

Abstract

:
In this article, a multipurpose embedded system for testing organic photovoltaic modules is presented. It is designed to include all the features for real-time monitoring, data acquisition, and power conversion based on a Ćuk converter, providing useful data for scientific investigation of the outdoor operation of organic photovoltaic modules. The embedded system allows both the scan of the I–V curve and the continuous operation of the organic photovoltaic module, such as at its maximum power. Voltage and current at the terminals of the organic photovoltaic module under test and up to four temperatures are continuously measured and stored on a Secure Digital card. The communication interface allows the embedded system to connect with other instruments, such as irradiance sensors, with digital serial output. The embedded system is designed both for laboratory and in-the-field use: it can be powered either by the AC electrical grid or a battery, which can also operate as a backup battery. Galvanic isolation divides the embedded system into the field-side and the logic-side functional sections, providing improved noise immunity and safe operation. The main power distribution system within the embedded system is a +9 V bus; ultra-low-noise linear low dropout regulators provide the +3.3 V and +5 V regulated voltages to supply the analog and digital circuits within the logic-side section, and a flyback converter supplies the field-side section of the board. The proposed embedded solution is validated using an experimental setup built at SolarTechLab, Politecnico di Milano. The experimental results report the feasibility of the proposed embedded system.

1. Introduction

Organic photovoltaic (OPV) solar cells are an innovative and promising solution for harvesting energy from sunlight. Nowadays, the dominant photovoltaic (PV) technology, which covers a large portion of the market (by 97%) [1], is crystalline silicon, both monocrystalline (m-Si) and polycrystalline (p-Si). The main advantages of silicon-based PV cells are their durability and their efficiency. However, limitations affect silicon-based PV cells, such as the costs, the use of raw materials, and the efficiency drop with an increase in the cell temperature. On the other hand, the production of solar cells based on organic materials can be cheaper adopting low-cost printing methods and a reduced use of raw materials. Moreover, they are flexible and lightweight, allowing them to be laid on curved surfaces, suitable for building facades and small applications like bags, solar tablets, and cell phones [2]. Up to now, OPV cells have not been competitive with silicon-based photovoltaic cells because their efficiency and durability are still low. In contrast to these disadvantages, the market for OPV is expected to grow around 20% by 2031 [3].
The research in the field of OPV usually deals with low- or medium-technology readiness level applications, from the development of new organic photovoltaic materials to the production of OPV module prototypes; these last were tested in indoor and outdoor conditions to properly characterize them (e.g., [4,5]). In this context, test benches dedicated to OPV technology have to be designed to meet the electrical characteristics of the OPV modules, which are usually characterized by voltage and current levels much lower than those in crystalline PV modules. Embedded systems are a viable solution for designing and developing OPV technology test platforms.
Outdoor tests of PV modules usually involve (i) the measurement of the current-voltage (I–V) curve, and its post-processing allows obtaining important data and information, (ii) the recording of the voltage, current, and power when the OPV module under test operates at a specific condition; a power conversion stage in the embedded system allows meeting the two aforementioned requirements. Moreover, recording the irradiance and the PV module temperature is crucial.
Martinez et al. [6] present an embedded system focused only on the characterization, i.e., the measurement of the I–V curve of OPV modules. The authors used a four-quadrant DC supply technique for the I–V tracing, but the design of this converter is not addressed in the paper. For the study presented in [7], the embedded system is a capacitive I–V curve tracer; this hardware is not compliant with continuous operation, and the charging and discharging processes of the capacitor make the I–V scanning time longer and dependent on the irradiance and open-circuit voltage of the device under test [8]. Similar studies can be found in the literature (e.g., [4,9]), but they do not present detailed information about the equipment used to characterize the OPV module. An embedded system, including a power converter to step up the OPV low voltage and make an accurate MPP tracking system (MPPT), was developed in [10,11]. The authors of [12,13] use a boost converter for a perovskite solar cell, which was controlled using an MPPT based on a Perturb and Observe algorithm, but the proposed embedded system has not been implemented or tested under real conditions. Meanwhile, a multilevel boost converter was used in [14] for increasing the voltage, but it was tested only with a solar simulator and not in outdoor conditions. The experiment showed output voltages around 1.2 V up to 7 V from 500 mV. Garcia-Valverde et al. [15] presented a 24 W multistage DC–DC converter based on a flyback configuration, where the voltage reached up to 250 V. The authors of [16] presented a comparison between boost and Ćuk converters for c-Si PV modules, where it was shown that the Ćuk converter had a low current ripple and more stability at the maximum power point (MPP). Despite the advantages of the Ćuk converter compared to other types of DC–DC converters in PV applications, it has not been yet proposed for use with OPV modules.
This paper aims to reduce these gaps by presenting an embedded system for the laboratory testing of OPV modules specifically designed to trace the I–V curves, and to operate and continuously monitor the OPV module under test. To the best of our knowledge, no available embedded system permits these functions to be performed on the same device. Thus, the main contributions of this work are listed as follows:
  • Design and implementation of a compact and complete test bench to characterize and to control low-power PV devices, such as the OPV modules, in outdoor conditions.
  • Test the OPV in the test facility, under real outdoor conditions, by means of the proposed embedded system.
This paper is divided into the following sections. The architecture of the embedded systems is explained in Section 2. The design of the embedded system is in Section 3, which includes the power supply, the power converter, real-time monitoring and data acquisition, communication, and the human–machine interface. The experimental setup and the methodology are explained in Section 4 and Section 5, respectively. The embedded system is tested in a real installation; the results are presented and discussed in Section 6. Finally, the conclusions are drawn in Section 7.

2. Architecture of the Embedded System

The hardware architecture of the embedded system for testing OPV modules is shown in Figure 1. The core of the embedded system is the master unit, which is based on the microcontroller PIC24FJ128GC006 by Microchip (Chandler, AZ, USA). The master unit supervises and coordinates the operation of all the functional units of the system, which are (i) the DC–DC power conversion system, (ii) the real-time monitoring and data acquisition system, (iii) the human–machine interface, and (iv) the communication interface.
The hardware of the DC–DC power conversion system comprises the Ćuk DC–DC converter, the voltage and current transducers, and the DC–DC controller based on the microcontroller dsPIC33FJ128MC204 by Microchip. The DC–DC controller (i) measures the voltage and the current at the terminals of the PV device under test and (ii) generates the Pulse Width Modulation (PWM) signal to adjust the converter operation according to the requirements of the running test. The main focus of the DC–DC controller is to manage the OPV module according to the test program, such as to trace the I–V curve or to operate the OPV module at its maximum power.
The hardware of the real-time monitoring and data acquisition system comprises several functional units: the Resistance Temperature Detector (RTD) Interface and the communication interface, as well as the master unit and the DC–DC controller. The real-time monitoring performs several operations: (i) the real-time temperature measurement, (ii) the real-time irradiance measurement, (iii) the real-time measurement of the voltage and current at the terminal of the OPV under test, (iv) the time stamp generation, and (v) data storage on an Secure Digital (SD) card. The real-time irradiance measurement uses one or more sensors with RS-485 serial output connected to the embedded system. The time stamp generation uses the Real-Time Clock and Calendar (RTCC) peripheral within the master unit microcontroller. An SPI bus in the multidrop bus configuration connects the master unit, that is, the main (or master) device, to the DC–DC controller and the integrated circuit for the measurement of RTDs, which are the sub- (or slave) devices. This bidirectional communication channel allows the master unit to send commands and read data to and from the slave devices.
The hardware of the human–machine interface (HMI) comprises a 4 × 20-character Liquid Crystal Display (LCD) and a five-position multi-direction navigation switch. The HMI allows users to select the operating mode, set the test parameters, and manage the tests. During the test, the LCD shows the main operating data in real time.
The communication interface comprises two RS-485 interfaces, one for each microcontroller, and a USB interface for the master unit. The RS-485 interfaces give the microcontrollers direct access to and from remote devices, such as irradiance sensors or computers. The USB interface was included in the embedded system mainly for remote control reasons.
The design of the main components of the embedded system is explained in the following section.

3. Design of the Embedded System

The hardware design of the embedded system is presented in this section. In particular, the design of the power supply, the power converter and its control, the communication interface, the monitoring, and the HMI are addressed, and the corresponding circuit diagrams are reported in Appendix A.

3.1. Power Supply

The power supply scheme of the embedded system is shown in Figure 2. Its design takes into account several requirements, as follows:
  • The embedded system can be powered either by the AC electrical grid or a battery for stand-alone operation;
  • There is no power drawn from the device under test to supply the board;
  • Galvanic isolation between the field side and the logic side of the board;
  • Low noise supply for the logic side of the board.
The solution for the entire board power supply system is based on a main +9 V bus. The main bus can be powered either by the AC electrical grid using the onboard isolated AC/DC converter or by a +9 V battery, as shown in Figure A1. During mains powered operation, a rechargeable battery can also provide a backup during short outages. The logic side of the board requires a stable and low noise +3.3 V supply and a +5 V supply for the digital and analog circuits. They are derived from the main bus through an ultra-low-noise, high-PSRR, adjustable Low-Dropout Voltage (LDO) regulator. Both the +3.3 V and +5 V power supplies are based on the same LDO, that is, the Texas Instruments (Dallas, TX, USA) LP38798, and the same circuit topology. Figure A3 shows the diagram of the +3.3 V power supply; to obtain the +5 V power supply, it is necessary to use a feedback resistor (R16 in the diagram) of 47.5 kΩ instead of 26.8 kΩ.
The board’s field-side section requires an isolated +12 V supply for the MOSFET gate unit and an isolated +5 V supply for the high-voltage side of the isolated voltage amplifier. A flyback converter [17,18] provides the isolated +12 V bus, and a LDO voltage regulator generates the isolated +5 V supply. Since the flyback converter shares the main bus, an EMC filter is introduced between the main bus and the flyback input to limit the propagation of noise generated by the switching. The flyback converter operates in discontinuous mode (DCM) and is controlled by the no-opto isolated flyback controller MAX17690 by Maxim Integrated (San Jose, CA, USA).It has a peak current mode with a fixed switching frequency. The controller is specifically designed for the isolated flyback topology operating in DCM. This controller senses the reflected output voltage directly from the primary-side flyback waveform during the primary switch off-time, and then no auxiliary winding or optocoupler is required for output-voltage regulation. The switching frequency is programmable with a resistor and was set to f s w = 143.68 kHz. In this design, the flyback converter makes use of the 750317235 transformer by Wurth Elektronik (Waldenburg, Germany), that is a 1:1 ratio transformer with a magnetizing inductance of 16 μ H. The circuit diagram of the flyback converter is illustrated in Figure A2.

3.2. Power Converter

A DC–DC Ćuk converter is used as an interface for the OPV under test with the load. The Ćuk converter is a boost converter followed by a buck converter, sharing the same switching device as shown in Figure 3. As a consequence, the intermediate capacitor, that is the output capacitor of the boost section of the converter, operates as the energy source for the buck converter [19]. The Ćuk converter provides a negative-polarity regulated output voltage, which can be higher or lower, in absolute value, than the input voltage. Its main advantage is the low current ripple due to the filtering effect of the input inductor, which is the main requirement for any converter used for PV application [20]. The transformation ratio between input and output, according to the voltages and currents measured as in Figure 3, is given by the following equations:
V l o a d V o p v = δ 1 δ or equivalently I l o a d I o p v = 1 δ δ
where V o p v and I o p v are the input voltage and current given by the OPV, and V l o a d and I l o a d are the output voltage and current that are applied to the specific load. The transformation ratio depends on the duty cycle δ . The Ćuk converter is designed to operate at a switching frequency of 40 kHz. The inductors have been optimized to integrate them on the board to limit the input and output current ripple and the inductor size. The inductor and the capacitance have a value of 680 μ H and 22 μ F, respectively.

Power Controller

The power controller is programmed to carry out two operating modes: I–V tracer and continuous tracking of the maximum power point.
In the I–V tracer mode, the controller generates a duty cycle sweep—from the minimum to the maximum duty—and measures, at the same time, the current and the voltage at the OPV terminals. Voltage and current samples are temporarily stored in the microcontroller Random Access Memory (RAM). The beginning of the test is triggered by the Master Controller, which reads the data at the end of the I–V scan and stores it on the SD card. Sweep duration, sampling frequency, trigger interval, and the selection of the I–V tracer mode are user-selectable through the HMI.
In the maximum power point tracking (MPPT) mode, several MPPT algorithms can be selected to operate the OPV module at its maximum power. This application uses the Perturb and Observe algorithm as the default option. This algorithm adjusts the voltage by small voltage variations, observing the increase or decrease in active power until it finds the maximum power [21] in each instant. For example, if both the power variation and the input voltage variation to the Cùk converter ( V O P V ) are positive, it indicates that the tracking point is on the ascending part of the PV curve. In this case, ( V O P V ) is increased to keep on moving towards the maximum power point (MPP). Conversely, if the ( V O P V ) variation is negative, V O P V is further reduced, indicating that the MPP is being approached from the descending part of the PV curve. If the power variation is negative, the voltage is adjusted inversely: it is decreased if its variation is positive and increased if it is negative. When the MPP is reached, the system continuously adjusts around this point, resulting in oscillations of current and voltage values. This well-known method is easy to implement but leads to oscillations in the PV output power. The step variation applied to the voltage can be minimized to reduce this effect, though this trade-off reduces the dynamic performance in favor of increased accuracy.
To vary the input voltage of the module, the duty cycle applied to the switch of the power converter is varied continuously such that the equivalent load impedance seen by the OPV module is matched with its own apparent impedance at any time [22]. The system can be modeled as presented in Figure 4, where the equivalent resistance can be calculated as follows:
R e q ( δ ) = R l o a d · 1 δ δ 2
Figure 5 illustrates the effect of the load variation and the duty on the point of operation inside the I–V curve. Hence, the variation in the load resistor seen by the OPV module results in a change in its input voltage V O P V .
The circuit of the power conversion and the voltage and current measurement are displayed in Figure A4.

3.3. Real-Time Monitoring

The real-time monitoring focused on measuring the plane of array irradiance and the OPV’s temperature, current, and voltage. This section presents the design of the hardware for measuring and acquiring these parameters. The irradiance acquisition system is not reported in this paper, as it is only the protocol to be loaded into the master unit to communicate with the irradiance sensors.

3.3.1. Temperature Acquisition

The embedded system uses RTDs for temperature measurements; four channels designed for PT100 are available. The PT100 is a widely used RTD made of platinum, whose resistance is 100 Ω at 0 °C. The Callendar–Van Dusen correlates the resistance of a platinum-based RTD with its temperature [23]:
R RTD ( T ) = R 0 [ 1 + A T + B T 2 + C T 3 ( T 100 ) ] for 220   ° C T < 0   ° C , R RTD ( T ) = R 0 ( 1 + A T + B T 2 ) for 0   ° C T 661   ° C .
where T is the temperature in (°C), R 0 is the resistance at 0 °C in ( Ω ), and the coefficients A, B, and C are specified by the IEC-60751 standard [24]. For a PT100, the values are A = 3.9083 × 10 3 , B = 5.775 × 10 7 , and C = 4.183 × 10 12 .
The core of the RTD interface is the precision, 24 bit, Delta-Sigma ADC ADS124S08 by Texas Instruments. In addition to the ADC, this component offers several integrated features that allow a reduction in system cost, component count, and printed circuit board (PCB) area in small signal sensors. In particular, two programmable excitation current sources for easy and accurate RTD biasing, a Programmable Gain Amplifier (PGA), internal multiplexers, and low-latency digital filter for rejecting 50 Hz and 60 Hz line cycle noise make the ADS124S08 suitable for measuring RTDs, even in particularly noisy environments.
The circuit diagram of the RTD acquisition and conversion is illustrated in Figure A5. The hardware was designed for four-wire RTDs for the best measurement accuracy and sequential scan. However, three-wire and two-wire RTDs can also be measured by adding appropriate jumpers to the RTD connectors. A ratiometric measurement scheme was developed to measure the RTD resistance accurately. In this configuration, the ADC output code is based on the ratio of the input voltage to the reference voltage as follows:
n = 2 N 1 · gain · V MEAS V REF
where N is the ADC resolution and 2 N 1 is the maximum count for an N-bit bipolar ADC; “gain” is the amplification factor applied to the input signal. This gain ensures the signal is within the ADC’s input range and improves the signal-to-noise ratio. Additionally, V MEAS is the measured voltage and V REF is the reference voltage used by the ADC. In this application, N 1 = 23 bits.
During the RTD measurement process, the current source injects an electric current through the RTD to be measured and to the known bias resistor ( R BIAS ), that are series connected. The voltage drop across R BIAS is the reference voltage for the ADC, while the voltage drop across the RTD is the voltage to be converted. Since these voltages are proportional to the same current, it is possible to calculate the resistance of the RTD ( R RTD ) from the digital code using the following formula:
R RTD = R BIAS · n 2 23 · gain
In this application, R BIAS is a high precision 2.2 kΩ resistor ( R 72 in Figure A5) and the biasing current is 750 μA.
An analog RC low-pass filter, to minimize the effect of noise and electromagnetic interference on the temperature measurement accuracy, completes the circuitry of each channel. This filter consists of a pair of matched series resistors, a differential capacitor, and two common-mode capacitors. The differential mode corner frequency, which is the frequency at which the filter begins to attenuate the differential signal, is calculated as follows:
f 3 dB = 1 2 π C D I F F , e q ( R R T D + R F 1 + R F 2 ) = 240.84 Hz for a PT 100 RTD at 0   ° C
In this equation, C D I F F , e q is the equivalent differential mode capacitance, and R F 1 and R F 2 are the filter resistors. The equivalent differential mode capacitance is differential mode capacitance C D I F F , with additional differential mode capacitance provided by the common-mode filter capacitors, C C M 1 and C C M 2 :
C D I F F , e q = C D I F F + C C M 1 · C C M 2 C C M 1 + C C M 2
Similarly, the common-mode corner frequency, which is the frequency at which the filter begins to attenuate the common-mode signal, is given by the following:
f 3 dB = 1 2 π C C M 1 ( R R T D + R F 1 + R B I A S ) = 3.65 kHz for a PT 100 RTD at 0   ° C
Regarding the circuit diagram of the channel TEMP-4 in Figure A5, the pair of filter resistors R F 1 and R F 2 are R 74 and R 75 , the differential capacitance C D I F F is C 65 and the common mode capacitances C C M 1 and C C M 2 are C 69 and C 70 . These corner frequencies ensure the desired signal is preserved while high-frequency noise is attenuated, enhancing the temperature measurements accuracy and reliability.

3.3.2. Voltage and Current Acquisition

The voltage ( V O P V ) and the current ( I O P V ) at the terminals of the OPV under test have to be transduced towards the logic side of the board. A resistive voltage divider on the field side of the board reduces the voltage V O P V to a voltage level compliant with the input of the voltage sensing isolated amplifier (the AMC1311 by Texas Instruments), which in turn generates at the logic-side output a differential signal whose amplitude is the same as the input voltage. The current I O P V is converted into a voltage signal by a unidirectional Giant Magneto-Resistive (GMR) current sensor (ACS70331EESATR-2P5U3 by Allegro Microsystem (Manchester, NH, USA)). This device has a single-ended output, a current sensing range from 0 A to 2.5 A , a transconductance of 800 mV/A and an offset of 250 mV (the sensors start at 0.25 V with zero current through the primary). The circuit diagram is illustrated together with the power converter in Figure A4. The transduced signals are converted into 10-bit digital codes by the Successive Approximation ADC available in the power controller. The ADC has been programmed for the simultaneous sampling of a differential channel and a single-ended channel, and for the continuous sampling mode. The digital codes are stored in the microcontroller RAM using Direct Memory Access (DMA) and a ping-pong buffer for each channel. A ping-pong buffer is a double buffer: when one buffer is being written by the data from the ADC, the other is being read by the application; when a buffer is being written is full, the application will switch to read this buffer and the other buffer starts to be filled by the data from the ADC. Since writing and reading processes are asynchronous, the ping-pong buffer keeps up with the sampling rate and prevents loss of data.

3.4. Communication Bus and Communication Interfaces

The microcontrollers and the integrated circuit for the temperature acquisition interface share information through a Serial Peripheral Interface (SPI) communication channel in the multidrop bus configuration. The SPI bus is a synchronous, full-duplex, and master–slave-based communication bus. It relies on four signal channels, namely: Master In–Slave Out (MISO), Master Out–Slave In (MOSI), Serial Clock (SCKL), and Slave Select (SS) [25]. The communication is initiated by the master device by a signal on the SS, which is active low, that selects which slave has to be active. The data have to be transferred from the master to the slave on the MOSI by sending the required number of pulses on the SCLK channel and, simultaneously, the data to be transferred from the slave to the master are sent on the MISO. This simultaneously implies that the slave data are always a response to the previous master order and not to the one being currently transferred. In the embedded system, the master device is the master unit: it generates the clock and the slave selects signals for data transfer, whereas the DC–DC controller and the integrated circuit for the temperature acquisition interface are slaves [26].
In addition to the SPI bus within the board, two RS-485 ports and a USB port are available for communication with remote devices. Each microcontroller has its own RS-485 port, whose circuit diagram is shown in Figure A7. RS-485 ports are completely managed by the microcontroller UART peripherals through the UART transmitter pin, the UART receiver pin, and the hardware flow control pins. The RS-485 transceiver is in the receiver mode by default; it goes in transmitter mode when the user application loads data in the UART transmit register and the bus is idle, and it goes back to the receiver mode by hardware as soon as the last stop bit has been sent. This feature allows the synchronization of the RS-485 transceiver operating mode with the user application, minimizing both the bus occupancy and the instructions in the user application to transmit data. On the bus side, the bus termination network in the split termination configuration is selectable by means of a pair of jumpers, and overvoltage protection devices complete the RS-485 port. RS-485 ports have been intended as a multipurpose communication bus that gives direct access to the microcontrollers: they can be used for debugging and for exchanging data with remote devices, such as irradiance sensors or computers. The embedded system includes a USB interface mainly for remote control. The USB bus is directly connected to the master unit’s microcontroller, and it uses the USB peripheral within the microcontroller, supporting the USB 2.0 communication protocol.

3.5. Data Storage

The data are stored on an 8 GB SD Card, FAT-32 formatted. The hardware of the SD card interface includes an SPI bus and two digital inputs. The SD card interface is connected to the master unit, which is the microcontroller that collects data from different sources to be written on the memory card. The daily files written on it contain the time stamp given by the RTCC of the general controller, which is a 100-year clock and calendar with automatic leap year detection. Moreover, the file also registers the values from the four RTDs and the pairs of voltages and currents at the OPV terminals. The circuit diagrams for the SD card interface are in Figure A6.

3.6. Human–Machine Interface

The hardware of the HMI consists of a five-position multi-direction navigation switch and an LCD display. During tests, the LCD shows the main operating data and the test status in real time; otherwise, it shows the operating system menu, which includes both the start of the tests and the setting of the test parameters. The navigation switch consists of a single device with five contacts equivalent to five buttons correlated to the positions up, down, left, right, and center. These movements are usually correlated to the following logic functions:
  • CENTER: Confirm the selection.
  • LEFT: Decrease the value of the selected parameter.
  • RIGHT: Increase the value of the selected parameter.
  • UP: Go to the next menu item.
  • DOWN: Go to the previous menu item.

4. Experimental Setup

The study was conducted at SolarTech Lab, Politecnico di Milano, located at 45.503° N latitude and 9.157° E longitude. The structure is oriented toward the south-east, and the azimuth angle is −6°30′. The irradiance data are available thanks to the on-site meteorological station that measures the global horizontal solar irradiance, the global on the plane of the array and the diffuse irradiance, the ambient temperature, the wind speed, and the humidity.
The meteorological station includes various sensors (anemometer, thermohygrometer, electric rain gauge, broadband radiometer, lux meter, and pyranometer) connected to a data logger that collects and transmits measurements to a computer. This study aims to validate the embedded system build for the OPV. Thus, two OPV modules in the structure built at the SolarTechLab (see Figure 6) were placed.
The OPV modules were already tested at SolarTech Lab; the study of their main characteristics is in [27,28]. The main characteristics of the OPV modules under study are summarized in Table 1. Additionally, the coefficient temperature for the open circuit voltage was reported to be less than 0.05%/K.
The board is installed in a box with IP65 to protect it from dust and water (Figure 7) with the corresponding terminals to connect the RTDs, the power source, and the OPV modules. The embedded system can be installed near a PV module for testing if there is access to a grid connection nearby. If an outage occurs, the battery can supply power for about 30 min. The load is a resistor of 22 Ω .

5. Methodology

To validate the embedded system, the maximum power point tracked by the embedded system in I–V tracer mode and the maximum power point obtained with an I–V tracer are compared. This comparison is conducted using two OPV modules placed side by side. One OPV module is connected to the I–V tracer, while the other is connected to the embedded system. The OPV module connected to the I–V tracer does not provide power to any load, as no converter is used. The power generated by the second OPV module, connected to the embedded system, is dissipated by the load resistor.
The I–V tracer, based on capacitive load, used for comparison purposes is a custom-developed device, not a commercial product, used by SolarTech Lab since 2013. The I–V tracer has an automatic control that activates S 1 and S 2 , as shown in Figure 8. Initially, S 1 is closed while S 2 remains open to charge the capacitor C via the module current. Then, the voltage and the current during the transient are continuously measured. Once the open circuit voltage V o c is reached, S 1 opens, and S 2 closes, discharging the capacitor through R d i s to start the next acquisition. The I–V tracer capacitor was sized to complete the charging transient within 500 ms when the Plane on Array (PoA) irradiance is 100 W/m2. The I–V tracer operates in time-triggered mode, measuring an I–V curve every minute. The tracer stops operating when the global irradiance is lower than 5 W/m2 and restarts the next day when irradiance exceeds this value. The voltage is measured using a direct connection, and the current is taken indirectly through the shunt resistor R s h u n t . Data were displayed and recorded via a software interface, and module back temperature was measured using thermocouples.
Moreover, the temperature measurement system was validated. Therefore, the PT100 sensors were installed at the back of the OPV modules, with one sensor per module. Due to their small size, they were glued with a bi-component adhesive to an aluminum support, which was a few centimeters in size. This metallic support was then attached to the back of the OPV modules. As aluminum is a good thermal conductor and made of the same material as the OPV support, its impact on the PT100 resistance change due to temperature was considered negligible. This was verified by comparing data from two calibrated thermocouples placed at the back of a module, one with the aluminum support and one without.
It is important to mention this methodology records the raw data acquired from the back temperature. These data could be used directly in the equation where the back side temperature is considered [29] but also can be translated to an actual cell temperature if necessary.

6. Results and Discussion

The embedded system operated for four days for validation purposes. The tests started on 14 June at 11:00 and finished on 18 June at 16:00. The output power of the OPV using the embedded system for these days is illustrated in Figure 9. For analysis, a single day corresponding to 16 June was chosen.
Figure 10 illustrates the MPP using the I–V tracer and the embedded system for June 16th. It also shows the solar irradiance variation. On this day, the solar irradiance has quick changes, and both systems follow the changes accordingly. It can be seen that, after 1 p.m. with higher solar irradiance, the embedded system produces less power than I–V tracer as the last one is not connected to a load.
The corresponding voltage and current are in Figure 11 and Figure 12, respectively, showing the operation with the embedded system and the I–V tracer. The voltage has higher variations using the I–V tracer as the operation is based on a capacitor, which is affected by the quick changes in solar irradiance. It presents variations from 10.8 to 13.2 V. Meanwhile, the embedded system has variations from 12.6 to 13.3 V when higher solar irradiance occurs. After 1 p.m. with higher solar irradiance, the embedded system presents a higher voltage than the I–V tracer. The discrepancy occurs due to the presence of the load when the embedded system changes the point of operation. Thus, the DC voltage measured using the embedded system is higher than the one using the I–V tracer.
The correct operation of the RTD interface was confirmed by comparing data acquired from the thermocouple and the PT100 for the same OPV module. Both measurements exhibit similar trends, but show differences throughout the day with a Δ T less than 1.5  °C (Figure 13).

Uncertainty Analysis

Several factors were considered when evaluating the accuracy and uncertainty of the data provided by the embedded system. Concerning the voltage and the current data, it is necessary to consider both the uncertainty introduced by the analog-to-digital conversion and the uncertainty introduced by the sensing and analog signal processing circuits. In detail, for voltage measurements ( V O P V ), the combined uncertainties of the resistive voltage divider (1% tolerance) and the isolated operational amplifier (0.5% gain error and 1 mV offset error) result in a total voltage measurement uncertainty of approximately 1.12%. The current measurements ( I O P V ), based on the ACS70331EESATR-2P5U3 GMR current sensor, exhibit an uncertainty of 2% due to sensor accuracy. Moreover, the ADC adds a quantization uncertainty to both the voltage and the current measurements, that is 3.23 mV per step. Concerning the ADC, for a better uncertainty analysis, it is also necessary to consider offset error, gain errors, and differential and integral nonlinearity.
Finally, as regards the operation in I–V tracer mode, it is necessary to consider that the duty ratio of the converter can be modulated in steps of 1.52% and this adds further quantization uncertainty to the maximum power tracked by the embedded system.

7. Conclusions

This paper presents the design and the operation of an embedded system specifically designed for the laboratory testing of organic photovoltaic (OPV) modules. It responds to the need for an integrated system for testing photovoltaic modules with specific electrical characteristics and the lack of suitable tools available on the market. The design and implementation were conducted at the SolarTech Lab, Politecnico di Milano. The system allows both the accurate I–V curve measurement and the operation of the OPV module at the maximum power, providing real-time monitoring of temperature, voltage, and current. The results indicate that the embedded system effectively generates useful and accurate data to study the OPV module operation under outdoor conditions. Thanks to the architecture of the power section, based on a static converter that can be connected to different loads, the embedded system can be used and optimized for several different experimental tests. Further improvements, thanks to the in-house firmware, updating the implemented features, adding new ones, or programming new test cycles are made possible. The experimental campaigns aimed at testing the functionality of the embedded system demonstrated good reliability of the entire system, both in terms of measurement accuracy of electrical quantities, OPV module temperatures, and operation of the OPV module at its MPP.
Future works will focus on adding a new protocol to interface the embedded system with more sensors with digital output based on the RS-485 serial interface available in the test facility and the implementation of remote monitoring capabilities and cloud-based data storage to facilitate online access.

Author Contributions

Conceptualization, A.D. and L.H.; methodology, A.D. and E.O.; formal analysis, A.D. and L.H.; writing—original draft preparation, A.D., A.C.-T. and L.H.; writing—review and editing, A.D., A.C.-T. and S.L.; supervision, A.D. and S.L.; funding acquisition, A.D. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported by the Ministero dell’Istruzione, dell’Universita e della Ricerca (Italy) under Grant PRIN2020–HOTSPHOT 2020LB9TBC.

Data Availability Statement

The original contributions presented in the study are included in the article; further inquiries can be directed to the corresponding author.

Conflicts of Interest

The authors declare no conflicts of interest.

Appendix A

The main electrical diagrams of the diverse components of the embedded system are illustrated in this appendix.

Appendix A.1. Power Supply Diagrams

Figure A1. Circuit diagram of the +9 V power supply.
Figure A1. Circuit diagram of the +9 V power supply.
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Figure A2. Circuit diagram of the flyback converter.
Figure A2. Circuit diagram of the flyback converter.
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Figure A3. Circuit diagram of the +3.3 V power supply.
Figure A3. Circuit diagram of the +3.3 V power supply.
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Appendix A.2. Power Converter Diagrams

Figure A4. Circuit diagram of the power converter together with the gate unit and the voltage and current transducers.
Figure A4. Circuit diagram of the power converter together with the gate unit and the voltage and current transducers.
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Appendix A.3. Temperature Acquisition

Figure A5. Circuit diagram of the RTD interface.
Figure A5. Circuit diagram of the RTD interface.
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Appendix A.4. Data Storage and Communication

Figure A6. Circuit diagram of the SD card interface.
Figure A6. Circuit diagram of the SD card interface.
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Figure A7. Circuit diagram of the RS485 interface.
Figure A7. Circuit diagram of the RS485 interface.
Electronics 13 03104 g0a7

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Figure 1. Block diagram of the embedded system.
Figure 1. Block diagram of the embedded system.
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Figure 2. Power supply scheme of the embedded system.
Figure 2. Power supply scheme of the embedded system.
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Figure 3. Ćuk converter scheme.
Figure 3. Ćuk converter scheme.
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Figure 4. Equivalent electrical circuit at the OPV terminals.
Figure 4. Equivalent electrical circuit at the OPV terminals.
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Figure 5. OPV operating point as a function of the converter duty cycle ( δ ).
Figure 5. OPV operating point as a function of the converter duty cycle ( δ ).
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Figure 6. Experimental setup for two OPV modules.
Figure 6. Experimental setup for two OPV modules.
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Figure 7. Embedded system within the box for the outdoor operation.
Figure 7. Embedded system within the box for the outdoor operation.
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Figure 8. Functional diagram of the I–V tracer used in this study.
Figure 8. Functional diagram of the I–V tracer used in this study.
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Figure 9. OPV power production using the embedded system.
Figure 9. OPV power production using the embedded system.
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Figure 10. Comparison of the maximum power using the I–V tracer and the embedded system.
Figure 10. Comparison of the maximum power using the I–V tracer and the embedded system.
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Figure 11. Comparison of the voltage at MPP using the I–V tracer and the embedded system.
Figure 11. Comparison of the voltage at MPP using the I–V tracer and the embedded system.
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Figure 12. Comparison of the current at MPP using the I–V tracer and the embedded system.
Figure 12. Comparison of the current at MPP using the I–V tracer and the embedded system.
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Figure 13. Comparison of the OPV module temperature using the PT100 read by the embedded system and the thermocouple.
Figure 13. Comparison of the OPV module temperature using the PT100 read by the embedded system and the thermocouple.
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Table 1. Main parameters in Standard Test Conditions (STCs) of the OPV modules under study [27].
Table 1. Main parameters in Standard Test Conditions (STCs) of the OPV modules under study [27].
ParameterOrganic PV AOrganic PV B
Open-Circuit Voltage (V)16.216.5
Short-Circuit Current (A)2.102.06
Maximum Power Voltage (V)11.912.0
Maximum Power Current (A)1.671.65
Maximum Power (W)19.8619.81
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Dolara, A.; Cabrera-Tobar, A.; Ogliari, E.; Leva, S.; Hanne, L. Design of an Embedded Test Bench for Organic Photovoltaic Module Testing. Electronics 2024, 13, 3104. https://doi.org/10.3390/electronics13163104

AMA Style

Dolara A, Cabrera-Tobar A, Ogliari E, Leva S, Hanne L. Design of an Embedded Test Bench for Organic Photovoltaic Module Testing. Electronics. 2024; 13(16):3104. https://doi.org/10.3390/electronics13163104

Chicago/Turabian Style

Dolara, Alberto, Ana Cabrera-Tobar, Emanuele Ogliari, Sonia Leva, and Louise Hanne. 2024. "Design of an Embedded Test Bench for Organic Photovoltaic Module Testing" Electronics 13, no. 16: 3104. https://doi.org/10.3390/electronics13163104

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