Frequent Power-Up-and-Down-Induced Degradation of Device and Bandgap Voltage Reference in 14-nm FinFET Technology
Abstract
:1. Introduction
2. NBTI Degradation Model
3. Results and Discussion
3.1. Circuit Modules and Simulation
3.1.1. Configurations of Simulated Bandgap Voltage Reference
3.1.2. Aging Analysis and Problem Identification
3.2. Device Aging Test Results and Discussion
4. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
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Shi, Y.; Li, Y.; Li, M.; Xu, X.; Zhu, H.; Sun, Q. Frequent Power-Up-and-Down-Induced Degradation of Device and Bandgap Voltage Reference in 14-nm FinFET Technology. Electronics 2024, 13, 3506. https://doi.org/10.3390/electronics13173506
Shi Y, Li Y, Li M, Xu X, Zhu H, Sun Q. Frequent Power-Up-and-Down-Induced Degradation of Device and Bandgap Voltage Reference in 14-nm FinFET Technology. Electronics. 2024; 13(17):3506. https://doi.org/10.3390/electronics13173506
Chicago/Turabian StyleShi, Yiqun, Yunpeng Li, Meng Li, Xin Xu, Hao Zhu, and Qingqing Sun. 2024. "Frequent Power-Up-and-Down-Induced Degradation of Device and Bandgap Voltage Reference in 14-nm FinFET Technology" Electronics 13, no. 17: 3506. https://doi.org/10.3390/electronics13173506