Gate-Driving Performance Evaluation Based on a New Figure of Merit
Abstract
:1. Introduction
- An algorithm to calculate the FOM in experimental switching waveforms that takes into account important aspects in the extraction of switching patterns: the duration of extraction, centering the extraction time interval, and the sampling period.
- An evaluation of the effects on the FOM at different sampling periods and different noise levels.
- A definition of a criterion to select an adequate sampling period.
- The implementation of the FOM to evaluate switching waveforms on an experimental platform.
2. Definitions
2.1. Time and Frequency Spread
2.2. Heisenberg–Gabor Inequality
2.3. Model of a Switching Waveform
2.4. Key Properties of Switching Patterns
2.5. Figure of Merit Definition
2.5.1. Theoretical Analysis of Symmetric Waveforms
2.5.2. Practical Analysis for Non-Symmetric Waveforms
3. FOM Calculation
3.1. Preprocessing
3.2. Extraction
3.3. Calculation of and
3.4. Time–Frequency Co-Spread and FOM Calculation
4. FOM Validation
4.1. Switching Pattern Evaluation
4.2. Sampling Period
4.3. Signal-to-Noise Ratio Evaluation
5. Practical Evaluation
5.1. Test Circuit
5.2. Results
5.3. Sampling Period and Filtering
6. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
References
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Rectangular | ∞ | indeterminate | |
Triangular | |||
Gaussian |
Parameter | Estimated | Theoretical |
---|---|---|
Triangular | 7.88 | 7.90 |
Triangular | 7.04 | 6.92 |
Triangular | 0.55 | 0.547 |
Triangular FOM | 1.1 | 1.094 |
Gaussian | 3.59 | 3.53 |
Gaussian | 14.03 | 14.14 |
Gaussian | 0.49 | 0.50 |
Gaussian FOM | 0.98 | 1 |
Parameter | Value |
---|---|
Switching period (T) | 50 s |
Threshold voltage () | 5.7 V |
Collector voltage (V) | 40 V |
Resistance load (R) | 12.5 |
Inductance load (L) | 0.71 H |
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Martinez-Padron, D.S.; Patin, N.; Monmasson, E. Gate-Driving Performance Evaluation Based on a New Figure of Merit. Electronics 2024, 13, 609. https://doi.org/10.3390/electronics13030609
Martinez-Padron DS, Patin N, Monmasson E. Gate-Driving Performance Evaluation Based on a New Figure of Merit. Electronics. 2024; 13(3):609. https://doi.org/10.3390/electronics13030609
Chicago/Turabian StyleMartinez-Padron, Daniel Sting, Nicolas Patin, and Eric Monmasson. 2024. "Gate-Driving Performance Evaluation Based on a New Figure of Merit" Electronics 13, no. 3: 609. https://doi.org/10.3390/electronics13030609
APA StyleMartinez-Padron, D. S., Patin, N., & Monmasson, E. (2024). Gate-Driving Performance Evaluation Based on a New Figure of Merit. Electronics, 13(3), 609. https://doi.org/10.3390/electronics13030609