The Impact of Computational Accuracy on the Quality of Direct Drive Control
Abstract
:1. Introduction
- Research the influence of computational accuracy on the quality of FOC control. The impact of different levels of computational accuracy on motor position and torque control has been investigated;
- Analysis of the impact of computational accuracy on the usage of FPGA resources.
2. Field-Oriented Control
3. Investigation into Electronic Commutation Algorithms
- Test stand—Built in a modular way, which allows for a quick change of its configuration and easy adaptation to the requirements of the currently conducted research. The test stand enables, among others, the measurement of torque and the application of an external load to the tested drive (inertial or active load through another electric drive);
- Power stage prototypes—Two power stage prototypes have been designed. The first stage is based on the power MOSFET transistors and an integrated driver for MOSFET/IGBT transistors intended for medium-power drives (1.5 kW). The second power stage is based on the bipolar transistors and an optically isolated driver designed for low-power drives (200 W). Both power stages are equipped with circuits allowing for the support of Hall sensors, an incremental encoder, and the measurement of phase currents in two phases of the motor;
- HDL Hardware Module Library—This allows for the implementation of a direct drive control system operating in various modes (position, speed, current) with various levels of complexity and various levels of computational accuracy;
- Application for PC—This enables communication with a hardware platform on which an electronic commutation system (FPGA) has been implemented to write/read operating parameters and record measurement data, additionally allowing online viewing.
3.1. Stand for Testing Electronic Commutation Algorithms
- Measurement of the analog signal from the torque sensor and its conversion through the built-in 16-bit ADC (analog-to-digital converter);
- Generation of an analog signal in the ±10 V standard, constituting the load torque setpoint for the (ML) drive controller, through the built-in 16-bit DAC (digital-to-analog converter);
- Communication with the MLD controller through the RS-485 [38] serial interface and digital input and output ports;
- Communication with a PC via a serial port, which enables setting and reading parameters and acquisition of measurement data (e.g., speed, shaft position, signal from a torque sensor);
- Communication with the CP (e.g., changing the operating mode, starting and stopping the measurement, signaling errors and failures);
- Generation of the set value waveforms (position, speed, or torque) and the set load and braking torque through the implemented waveform generator;
- Measurement of the current angular position of the shaft based on signals generated by the MLD controller in the RS-422 standard [39];
- Temperature measurement from four independent channels (e.g., on the power stage, drive, brake).
- Const—constant component: maintaining a constant set value (settable parameters: value, segment duration);
- Ramp—waveform segment described by a linear function (settable parameters: initial value, final value, segment duration);
- Pulse—the sequence of rectangular pulses: trajectory segment intended for testing the step response of the control system (settable parameters: period, positive pulse time, negative pulse time, positive pulse amplitude, negative pulse amplitude, constant component, number of segment repetitions);
- Saw—sawtooth waveform (settable parameters: period, amplitude, constant component, number of segment repetitions);
- Trapeze—trapezoidal waveform (settable parameters: period, amplitude, edge rising time, constant component, number of segment repetitions);
- Sin—a sinusoidal waveform, a smooth waveform with all derivatives continuous (settable parameters: amplitude, period, constant component, number of segment repetitions);
- SinSat—sinusoidal waveform with saturation (cutting): a gentle waveform with a dynamic transition to the static phase maintaining the set value (settable parameters: amplitude, saturation value, period, constant component, number of segment repetitions).
3.2. HDL Hardware Module Library
- Base clock frequency: 50 to 100 MHz;
- Position sensor resolution: 8 to 24 bits;
- Operating (sampling) frequency: 2.5 to 40 kHz;
- Maximum phase current of the drive: ±25 A;
- Maximum drive rotational speed: ±30,000 rpm;
- Possibility of changing parameters that cannot be set in the commercially available direct drive controllers (e.g., operating frequency, so-called “dead times”);
- Architectural flexibility—the possibility to expand the library with additional elements ensuring cooperation with other types of drives and power stages (e.g., multi-level power stages or other types of PWM modulation).
- Relative angle—rotor position given within one full revolution (from 0 to 2π), relative to the initial rotor position (at the moment of startup);
- Absolute angle—rotor position is given in the range of one revolution (from 0 to 2π); position 0 is set based on the third sensor channel (index);
- Relative position—rotor position, relative to the initial rotor position (at the moment of startup);
- Absolute position—rotor position; position 0 is set based on the third sensor channel (index);
- Angular velocity—the value of the current angular velocity, measured in two modes (as a position difference in a fixed period or as a time measured between two pulses), and then the value with the lowest error is selected; the module is equipped with a fourth-order low-pass filter;
- Electric angle—the angle of the position of the magnetic flux vector coming from permanent magnets when Hall sensors are used.
- An implemented CORDIC (COordinate Rotation DIgital Computer) method to determine the values of trigonometric sine and cosine functions;
- Implemented sequential multiplication methods allowing the obtaining the product of two arguments in the two’s complement representation (U2);
- A state machine (Moore’s finite machine), the task of which is to take input values (phase currents), determine the transform using the following components: CORDIC, sequential multiplication, and basic arithmetic operations, and return the final result.
3.3. DDSApp Application
- Set the data transmission parameters between the application and the test stand controller (transmission speed, data frame type);
- Set the data transmission parameters between the application and the drive controller (transmission speed, data frame type);
- Set the measurement data display parameters (sampling period, window width, displayed channels);
- Set the parameters of the controller’s function waveform generator;
- Set the operating parameters of the drive controller (e.g., settings of regulators);
- Set the parameters of saving data to the local disk (e.g., file name).
4. Experimental Research
4.1. Static Experiment
- tedge—the average rise and fall time of the Iq component of the stator current, expressed as the rise or fall time of the edge between 10% and 90% of the steady-state value of the Iq component of the stator current (Figure 8);
- tdel—delay time, expressed as the time between the rising (or falling) of the edge of the set current and the point of reaching 10% of the set value of the Iq component of the stator current (Figure 8);
- Iqsv—the steady-state value of the Iq component of the stator current determined as the arithmetic mean of the second half of the duration of the high (or low) state of the rectangular impulse (Figure 8);
- SRq—the average rate of rising and falling of the edges of the Iq component of the stator current, expressed as the quotient of 80% of the steady-state value of the Iq current component and the tedge time;
- I%qsv—the steady-state value of the Iq component of the stator current concerning the set value;
- IqMaxErr—maximal error of the Iq component of the stator current determined in the second half of the duration of the high state of the rectangular impulse, determining the maximal torque ripple (Figure 8);
- IqAvgErr—average value of the error of the Iq component of the stator current determined in the second half of the duration of the high (low) state of the rectangular impulse, determining the average torque ripples (Figure 8);
- IqRMSErr—the root mean square error of the Iq component of the stator current determined in the second half of the duration of the high (or low) state of the rectangular impulse, determining the root mean square value of the torque ripples;
- IdMaxErr—the maximal value of error of the Id component of the stator current, determined over the entire measurement period (Figure 8);
- IdAvgErr—average value of error of the Id component of the stator current, determined over the entire measurement period;
- IdRMSErr—the root mean square error of the Id component of the stator current, determined over the entire measurement period;
- TMax—the maximum value of torque ripples determined in the second half of the duration of the high (or low) state of the square impulse, based on data from the torque sensor;
- TAvg—the average value of torque ripples determined in the second half of the duration of the high (or low) state of the square impulse, based on data from the torque sensor;
- TRMS—the root mean square error of the torque ripple determined in the second half of the duration of the high (or low) state of the square impulse, based on data from the torque sensor.
4.2. Dynamic Experiment
5. Results
5.1. Static Experiment
5.2. Dynamic Experiment
6. Discussion
7. Conclusions
Author Contributions
Funding
Data Availability Statement
Conflicts of Interest
Abbreviations
FPGA | Field-Programmable Gate Arrays |
PMSM | Permanent Magnet Synchronous Motor |
BLDC | Brushless Direct Current Motor |
BEMF | Back Electromotive Force |
FOC | Field-Oriented Control |
DTC | Direct Torque Control |
PWM | Pulse Width Modulation |
DSP | Digital Signal Processors |
DC | Direct Current |
PI | Proportional–Integral |
SPM | Surface Permanent Magnet |
IPM | Interior Permanent Magnet |
MTPA | Maximum Torque Per Ampere |
MPC | Model Predictive Control |
MOSFET | Metal-Oxide-Semiconductor Field-Effect Transistor |
IGBT | Insulated Gate Bipolar Transistor |
HDL | Hardware Description Language |
RLC | RLC measurement bridge |
MT | Tested Motor |
TS | Torque Sensor |
EB | Electric Brake |
ML | Motor Load |
MLD | Motor Load Drive Controller |
SC | Test Stand Controller |
MTI | Tested Motor Power Stage |
MTC | Tested Motor Commutator |
CP | Control Panel |
PS | Power Supply |
USB | Universal Serial Bus |
TTL | Transistor-Transistor Logic |
PCB | Printed Circuit Board |
VHDL | Very High Speed Integrated Circuits Hardware Description Language |
SVPWM | Space Vector Pulse Width Modulation |
UART | Universal Asynchronous Receiver-Transmitter |
SPI | Serial Peripheral Interface |
ADC | Analog to Digital Converter |
DAC | Digital to Analog Converter |
CORDIC | Coordinate Rotation Digital Computer |
PLL | Phase-Locked Loop |
PID | Proportional–Integral–Derivative |
P | Proportional |
RMS | Root Mean Square |
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Modules | Comput. Accuracy | Logic Elements (LEs) | Registers | Memory Bits | DSP Blocks | Max. Freq. [MHz] |
---|---|---|---|---|---|---|
EncoInc(#1) | 6 bits | 95 (0.4%) | 31 (0.1%) | 0 (0%) | 0 (0%) | 218.3 |
EncoInc(#2) | 6 bits | 844 (3.8%) | 519 (2.3%) | 0 (0%) | 0 (0%) | 161.4 |
EAngleNorm | 6 bits | 131 (0.6%) | 120 (0.5%) | 0 (0%) | 0 (0%) | 287.4 |
ClarkParkTrans | 6 bits | 484 (2.2%) | 212 (0.9%) | 0 (0%) | 0 (0%) | 149.1 |
RegP(#1) | 6 bits | 59 (0.3%) | 2 (<0.1%) | 0 (0%) | 0 (0%) | 1488.4 |
RegP(#2) | 6 bits | 320 (1.4%) | 91 (0.4%) | 0 (0%) | 4 (3.0%) | 715.3 |
SVPWM | 6 bits | 506 (2.3%) | 180 (0.8%) | 0 (0%) | 0 (0%) | 151.7 |
PWM-HL | 6 bits | 548 (2.5%) | 203 (0.9%) | 0 (0%) | 0 (0%) | 254.2 |
EncoInc(#1) | 8 bits | 95 (0.4%) | 31 (0.1%) | 0 (0%) | 0 (0%) | 218.3 |
EncoInc(#2) | 8 bits | 844 (3.8%) | 519 (2.3%) | 0 (0%) | 0 (0%) | 161.4 |
EAngleNorm | 8 bits | 132 (0.6%) | 122 (0.5%) | 0 (0%) | 0 (0%) | 296.7 |
ClarkParkTrans | 8 bits | 580 (2.6%) | 262 (1.2%) | 0 (0%) | 0 (0%) | 146.1 |
RegP(#1) | 8 bits | 119 (0.5%) | 2 (<0.1%) | 0 (0%) | 0 (0%) | 1420.5 |
RegP(#2) | 8 bits | 451 (2.0%) | 99 (0.4%) | 0 (0%) | 4 (3.0%) | 716.9 |
SVPWM | 8 bits | 593 (2.7%) | 224 (1.0%) | 0 (0%) | 0 (0%) | 144.8 |
PWM-HL | 8 bits | 665 (3.0%) | 209 (0.9%) | 0 (0%) | 0 (0%) | 262.5 |
EncoInc(#1) | 10 bits | 95 (0.4%) | 31 (0.1%) | 0 (0%) | 0 (0%) | 218.3 |
EncoInc(#2) | 10 bits | 844 (3.8%) | 519 (2.3%) | 0 (0%) | 0 (0%) | 161.4 |
EAngleNorm | 10 bits | 131 (0.6%) | 124 (0.5%) | 0 (0%) | 0 (0%) | 303.2 |
ClarkParkTrans | 10 bits | 706 (3.2%) | 315 (1.4%) | 0 (0%) | 0 (0%) | 140.7 |
RegP(#1) | 10 bits | 203 (0.9%) | 2 (<0.1%) | 0 (0%) | 0 (0%) | 1420.5 |
RegP(#2) | 10 bits | 640 (2.9%) | 107 (0.5%) | 0 (0%) | 8 (6.1%) | 715.3 |
SVPWM | 10 bits | 732 (3.3%) | 271 (1.2%) | 0 (0%) | 0 (0%) | 138.5 |
PWM-HL | 10 bits | 677 (3.0%) | 209 (0.9%) | 0 (0%) | 0 (0%) | 298.7 |
EncoInc(#1) | 12 bits | 95 (0.4%) | 31 (0.1%) | 0 (0%) | 0 (0%) | 218.3 |
EncoInc(#2) | 12 bits | 844 (3.8%) | 519 (2.3%) | 0 (0%) | 0 (0%) | 161.4 |
EAngleNorm | 12 bits | 133 (0.6%) | 126 (0.6%) | 0 (0%) | 0 (0%) | 281.5 |
ClarkParkTrans | 12 bits | 825 (3.7%) | 368 (1.6%) | 0 (0%) | 0 (0%) | 127.1 |
RegP(#1) | 12 bits | 311 (1.4%) | 2 (<0.1%) | 0 (0%) | 0 (0%) | 1420.5 |
RegP(#2) | 12 bits | 825 (3.7%) | 115 (0.5%) | 0 (0%) | 8 (6.1%) | 713.8 |
SVPWM | 12 bits | 852 (3.8%) | 318 (1.4%) | 0 (0%) | 0 (0%) | 125.9 |
PWM-HL | 12 bits | 594 (2.7%) | 203 (0.9%) | 0 (0%) | 0 (0%) | 279.0 |
EncoInc(#1) | 14 bits | 95 (0.4%) | 31 (0.1%) | 0 (0%) | 0 (0%) | 218.3 |
EncoInc(#2) | 14 bits | 844 (3.8%) | 519 (2.3%) | 0 (0%) | 0 (0%) | 161.4 |
EAngleNorm | 14 bits | 138 (0.6%) | 130 (0.6%) | 0 (0%) | 0 (0%) | 269.3 |
ClarkParkTrans | 14 bits | 918 (4.1%) | 418 (1.9%) | 0 (0%) | 0 (0%) | 123.4 |
RegP(#1) | 14 bits | 976 (4.4%) | 3 (<0.1%) | 0 (0%) | 0 (0%) | 1420.5 |
RegP(#2) | 14 bits | 1053 (4.7%) | 123 (0.5%) | 0 (0%) | 8 (6.1%) | 677.5 |
SVPWM | 14 bits | 944 (4.2%) | 362 (1.6%) | 0 (0%) | 0 (0%) | 124.0 |
PWM-HL | 14 bits | 638 (2.9%) | 209 (0.9%) | 0 (0%) | 0 (0%) | 269.5 |
EncoInc(#1) | 16 bits | 95 (0.4%) | 31 (0.1%) | 0 (0%) | 0 (0%) | 218.3 |
EncoInc(#2) | 16 bits | 844 (3.8%) | 519 (2.3%) | 0 (0%) | 0 (0%) | 161.4 |
EAngleNorm | 16 bits | 139 (0.6%) | 134 (0.6%) | 0 (0%) | 0 (0%) | 295.4 |
ClarkParkTrans | 16 bits | 1073 (4.8%) | 474 (2.1%) | 0 (0%) | 0 (0%) | 116.4 |
RegP(#1) | 16 bits | 1263 (5.7%) | 3 (<0.1%) | 0 (0%) | 0 (0%) | 1420.5 |
RegP(#2) | 16 bits | 1290 (5.8%) | 131 (0.6%) | 0 (0%) | 8 (6.1%) | 684.0 |
SVPWM | 16 bits | 1102 (4.9%) | 408 (1.8%) | 0 (0%) | 0 (0%) | 113.7 |
PWM-HL | 16 bits | 643 (2.9%) | 209 (0.9%) | 0 (0%) | 0 (0%) | 288.5 |
Comput. Accuracy | tedge [ms] | tdel [ms] | Errors of Iq Component [mA] | Errors of Id Component [mA] | I%qsv [%] | SRq [A/ms] | ||||
---|---|---|---|---|---|---|---|---|---|---|
IqMaxErr | IqAvgErr | IqRMSErr | IqMaxErr | IqAvgErr | IqRMSErr | |||||
6 bits | 1.40 | 0.38 | 261.13 | 68.66 | 90.22 | 325.52 | 73.64 | 121.28 | 75.89 | 0.69 |
8 bits | 1.42 | 0.41 | 52.46 | 15.97 | 21.33 | 85.45 | 8.49 | 20.18 | 75.62 | 0.67 |
10 bits | 1.39 | 0.41 | 19.41 | 5.05 | 6.60 | 34.59 | 4.00 | 7.39 | 75.77 | 0.68 |
12 bits | 1.38 | 0.41 | 14.48 | 2.78 | 3.55 | 30.26 | 5.08 | 6.66 | 75.67 | 0.69 |
14 bits | 1.37 | 0.41 | 13.33 | 2.68 | 3.40 | 24.60 | 3.53 | 4.56 | 75.50 | 0.69 |
16 bits | 1.39 | 0.41 | 13.03 | 2.52 | 3.20 | 22.09 | 3.73 | 4.64 | 75.80 | 0.68 |
Comput. Accuracy | Ripples of the Rotational Torque [mNm] | TSV [mNm] | ||
---|---|---|---|---|
TMaxRipp | TAvgRipp | TRMSRipp | ||
6 bits | 46.14 | 8.52 | 11.49 | 372.16 |
8 bits | 18.91 | 2.96 | 3.96 | 343.69 |
10 bits | 14.39 | 1.87 | 2.43 | 350.31 |
12 bits | 14.06 | 1.75 | 2.30 | 348.90 |
14 bits | 14.29 | 1.78 | 2.34 | 345.23 |
16 bits | 14.16 | 1.75 | 2.31 | 345.93 |
Comput. Accuracy | Logic Elements (LEs) | Registers | Memory Bits | DSP Blocks |
---|---|---|---|---|
6 bits | 1768 (8%) | 742 (3%) | 0 (0%) | 0 (0%) |
8 bits | 2072 (9%) | 833 (4%) | 0 (0%) | 0 (0%) |
10 bits | 2411 (11%) | 927 (4%) | 0 (0%) | 0 (0%) |
12 bits | 2686 (12%) | 1018 (5%) | 0 (0%) | 0 (0%) |
14 bits | 3385 (15%) | 1022 (5%) | 0 (0%) | 0 (0%) |
16 bits | 3977 (18%) | 1124 (5%) | 0 (0%) | 0 (0%) |
Comput. Accuracy | Position-Holding Errors [°] | Trajectory-Tracking Errors [°] | ||||
---|---|---|---|---|---|---|
ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | |
6 bits | 3.1 | 1.49 | 1.65 | 8.5 | 1.62 | 1.94 |
8 bits | 2.92 | 1.59 | 1.74 | 8.68 | 1.74 | 2.09 |
10 bits | 3.1 | 1.57 | 1.72 | 8.42 | 1.71 | 2.05 |
12 bits | 3.2 | 1.58 | 1.72 | 8.96 | 1.74 | 2.09 |
14 bits | 3.06 | 1.57 | 1.72 | 8.6 | 1.73 | 2.07 |
16 bits | 2.52 | 1.57 | 1.71 | 8.42 | 1.69 | 2 |
Comput. Accuracy | Trapezoidal Signal [°] | Sinusoidal Signal with Saturation [°] | Sinusoidal Signal [°] | ||||||
---|---|---|---|---|---|---|---|---|---|
ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | |
6 bits | 8.42 | 1.81 | 2.26 | 4.57 | 1.56 | 1.82 | 4.75 | 1.55 | 1.81 |
8 bits | 8.6 | 1.98 | 2.49 | 5.04 | 1.7 | 1.99 | 4.64 | 1.63 | 1.89 |
10 bits | 8.42 | 1.95 | 2.45 | 4.9 | 1.65 | 1.93 | 4.68 | 1.6 | 1.85 |
12 bits | 8.96 | 2.01 | 2.53 | 4.97 | 1.66 | 1.95 | 4.68 | 1.62 | 1.88 |
14 bits | 8.6 | 1.97 | 2.47 | 5.08 | 1.67 | 1.95 | 4.61 | 1.63 | 1.88 |
16 bits | 8.42 | 1.87 | 2.32 | 4.97 | 1.64 | 1.92 | 4.21 | 1.61 | 1.84 |
Comput. Accuracy | Position-Holding Errors [°] | Trajectory-Tracking Errors [°] | ||||
---|---|---|---|---|---|---|
ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | |
6 bits | 29.38 | 17.06 | 18.97 | 58.32 | 16.79 | 19.71 |
8 bits | 27.11 | 16.21 | 18 | 55.87 | 16.04 | 18.83 |
10 bits | 27.61 | 16.49 | 18.31 | 55.84 | 16.29 | 19.13 |
12 bits | 27.25 | 16.42 | 18.22 | 55.76 | 16.23 | 19.05 |
14 bits | 27.47 | 16.58 | 18.4 | 54.54 | 16.35 | 19.12 |
16 bits | 27.68 | 16.95 | 18.81 | 55.51 | 16.51 | 19.25 |
Comput. Accuracy | Trapezoidal Signal [°] | Sinusoidal Signal with Saturation [°] | Sinusoidal Signal [°] | ||||||
---|---|---|---|---|---|---|---|---|---|
ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | |
6 bits | 58.32 | 18 | 22.31 | 39.06 | 17.07 | 19.58 | 32.26 | 16.9 | 18.99 |
8 bits | 53.32 | 17.17 | 21.05 | 38.48 | 16.32 | 18.84 | 31.28 | 16.08 | 18.12 |
10 bits | 54.32 | 17.46 | 21.44 | 38.38 | 16.62 | 19.15 | 31.61 | 16.35 | 18.4 |
12 bits | 53.89 | 17.41 | 21.34 | 38.34 | 16.54 | 19.06 | 31.79 | 16.28 | 18.32 |
14 bits | 54.11 | 17.56 | 21.48 | 38.88 | 16.73 | 19.26 | 32.22 | 16.46 | 18.52 |
16 bits | 55.15 | 17.68 | 21.52 | 38.95 | 16.98 | 19.48 | 32.62 | 16.72 | 18.81 |
Comput. Accuracy | Position-Holding Errors [°] | Trajectory-Tracking Errors [°] | ||||
---|---|---|---|---|---|---|
ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | |
6 bits | 0.65 | 0.19 | 0.24 | 22.32 | 2.5 | 4.59 |
8 bits | 0.4 | 0.15 | 0.17 | 22.72 | 2.11 | 4.13 |
10 bits | 0.36 | 0.15 | 0.17 | 22.9 | 2.46 | 4.38 |
12 bits | 0.36 | 0.15 | 0.17 | 22.9 | 2.42 | 4.41 |
14 bits | 0.32 | 0.15 | 0.17 | 22.79 | 2.4 | 4.5 |
16 bits | 0.4 | 0.15 | 0.17 | 22.32 | 2.53 | 4.56 |
Comput. Accuracy | Trapezoidal Signal [°] | Sinusoidal Signal with Saturation [°] | Sinusoidal Signal [°] | ||||||
---|---|---|---|---|---|---|---|---|---|
ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | ϕMaxErr | ϕAvgErr | ϕRMSErr | |
6 bits | 18.83 | 6.48 | 8.23 | 16.34 | 5.51 | 6.83 | 4 | 1.48 | 1.8 |
8 bits | 13.93 | 2.97 | 4.5 | 18.4 | 4.99 | 6.62 | 3.42 | 1.43 | 1.7 |
10 bits | 15.73 | 5.62 | 6.94 | 15.08 | 5.26 | 6.51 | 6.08 | 1.73 | 2.15 |
12 bits | 15.7 | 5.6 | 6.97 | 18.61 | 5.42 | 7.06 | 5.69 | 1.68 | 2.07 |
14 bits | 14.8 | 4.84 | 6.65 | 20.23 | 5.74 | 7.59 | 5.94 | 1.74 | 2.15 |
16 bits | 18.04 | 5.94 | 7.52 | 18.68 | 5.34 | 6.92 | 6.8 | 1.84 | 2.31 |
Comput. Accuracy | Logic Elements (LEs) | Registers | Memory Bits | DSP Blocks |
---|---|---|---|---|
6 bits | 1874 (8%) | 775 (3%) | 0 (0%) | 4 (3%) |
8 bits | 2181 (10%) | 866 (4%) | 0 (0%) | 4 (3%) |
10 bits | 2522 (11%) | 960 (4%) | 0 (0%) | 4 (3%) |
12 bits | 2815 (13%) | 1051 (5%) | 0 (0%) | 4 (3%) |
14 bits | 3495 (16%) | 1055 (5%) | 0 (0%) | 4 (3%) |
16 bits | 4119 (18%) | 1157 (5%) | 0 (0%) | 4 (3%) |
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Góra, G.; Petko, M.; Gac, K.; Górski, J.; Iwaniec, J.; Mańka, M.; Zabierowski, W. The Impact of Computational Accuracy on the Quality of Direct Drive Control. Electronics 2024, 13, 1052. https://doi.org/10.3390/electronics13061052
Góra G, Petko M, Gac K, Górski J, Iwaniec J, Mańka M, Zabierowski W. The Impact of Computational Accuracy on the Quality of Direct Drive Control. Electronics. 2024; 13(6):1052. https://doi.org/10.3390/electronics13061052
Chicago/Turabian StyleGóra, Grzegorz, Maciej Petko, Konrad Gac, Jakub Górski, Joanna Iwaniec, Michał Mańka, and Wojciech Zabierowski. 2024. "The Impact of Computational Accuracy on the Quality of Direct Drive Control" Electronics 13, no. 6: 1052. https://doi.org/10.3390/electronics13061052
APA StyleGóra, G., Petko, M., Gac, K., Górski, J., Iwaniec, J., Mańka, M., & Zabierowski, W. (2024). The Impact of Computational Accuracy on the Quality of Direct Drive Control. Electronics, 13(6), 1052. https://doi.org/10.3390/electronics13061052