3.1. A Description of the Problem
It can be seen in (3) that the changing carrier frequency of each hopping time slot leads to the variable Doppler frequency, and the Doppler frequency jump between two adjacent hopping time slots can be expressed as follows:
In general, it can be assumed that the velocity is almost the same in two adjacent frequency hopping time slots due to the high frequency hopping rate, so (4) can be written as follows:
Equation (5) indicates that the Doppler frequency jump between adjacent hopping time slots is small when the relative motion velocity between the transmitter and receiver is small. In this case, an FLL can be used for carrier tracking, and the Doppler frequency jump will be huge when the relative motion velocity becomes large. This Doppler frequency jump continuously introduces a frequency step excitation to the FLL, causing a continuous response of the frequency step excitation, which makes it difficult to maintain steady-state tracking.
To address the above problem, considering that the relative motion velocity is almost constant while the Doppler frequency is severely hopping between the two adjacent hopping time slots, we replace the FLL with a VLL in hybrid DS/FH spread spectrum signal carrier tracking. A VLL is much the same as an FLL except for the velocity discriminator. After the synchronization of the FH code, both the transmitter and receiver know the prior information of the FH sequence; thus, the velocity value can be converted to the corresponding Doppler frequency value in the multi-carrier NCO module. The structure of the VLL is shown in
Figure 1.
The FLL and serially assisted PLL and the FLL with a parallelly assisted PLL are commonly used coupled structures of FLLs and PLLs for DS spread spectrum signal carrier tracking. Since a VLL is used instead of an FLL for hybrid DS/FH spread spectrum signal carrier tracking, there are corresponding structures of a VLL with a serially assisted PLL (VLL-SA-PLL) and a VLL with a parallelly assisted PLL (VLL-PA-PLL), as shown in
Figure 2 and
Figure 3, respectively. In addition, note that both the VLL and HD-VLL are second-order and the PLL is third-order in the following discussion and simulation.
There are not only high relative motion velocities, but also large acceleration and jerk in the high dynamic environment. However, the VLL loop filter suffers from insensitivity to acceleration and jerk.
Taking the second-order VLL loop filter as an example, the filter output is fixed during each loop update period (the loop update period is generally the same as the coherent integration period). Assuming that in the
th loop update period, the initial phase of the multi-carrier NCO accumulator is
, the filter output
in the last period plus velocity by acquisition
is taken as an estimated value of the velocity
, which is converted into Doppler frequency according to the carrier frequency of the current hopping time slot. Then, the local instantaneous phase generated by the multi-carrier NCO during the
th loop update period is given by (6) as follows:
where
denotes the sampling interval, and
and
denote the
th sampling point and the number of sampling points in a loop update period, respectively.
Practically, the instantaneous phase of the received signal is not only affected by velocity, but also by acceleration and jerk. Considering a high dynamic scenario with simultaneous velocity
, acceleration
, and jerk
, the instantaneous phase
of the received signal during the
th loop update period can be expressed as follows:
where
denotes the initial phase of the
th loop update period,
denotes the loop update interval, and
.
By discretizing the analog signal in (7), we obtain
The purpose of the carrier tracking loop is to generate a replica signal of the received carrier signal, that is, the error between the local instantaneous phase of the replica signal and the instantaneous phase of the received signal should be as small as possible at each moment. By comparing (6) with (8), it can be seen that (6) only takes into account the effect of velocity on the local instantaneous phase but leaves out the effects of acceleration and jerk. Consequently, there is an accumulated phase tracking error of at the end of the th loop update period. This accumulated phase tracking error is little when the dynamic is small; in this case, the impact on the loop can be ignored. However, as the dynamic increases, this accumulated phase tracking error poses challenges to the steady-state tracking of the loop.
3.2. HD-VLL
According to the discussion in
Section 3.1, the filter output of the second-order VLL loop filter remains constant during a loop update period without taking into account the phase variation caused by acceleration and jerk, eventually causing the accumulated phase tracking error. To address the accumulated phase tracking error of the second-order VLL under high dynamic conditions, an HD-VLL based on the second-order VLL is proposed, which can simultaneously process jerk, acceleration, and velocity.
By comparing (6) and (8), it can be seen that at the th sampling point of the th loop update period, the phase variation generated by jerk and acceleration is , which should be compensated in real time. However, it is observed that the values of acceleration and jerk cannot be obtained directly; thus, it is necessary to find reasonable estimates of acceleration as well as jerk, respectively.
The structure of the second-order VLL loop filter is depicted in
Figure 4.
In the figure, and represent the characteristic angular frequency and the gain of the second-order VLL loop filter, and represents the unit delay, respectively.
The corresponding discrete transfer function is
After filtering the input velocity error signal, the filtered state variables of the high-order loop filter also contain high-order information in addition to the filtered velocity error result, such as acceleration and jerk [
24,
25,
26,
27,
28,
29,
30]. In the second-order VLL loop filter structure shown in
Figure 4, signal ① located before Integrator 1 is actually the filtered second-order change rate of the velocity error (i.e., jerk), and the corresponding discrete transfer function between the input and ① is
Signal ②, located before Integrator 2, is actually the filtered first-order change rate of the velocity error (i.e., acceleration), and the corresponding discrete transfer function between the input and ② is
Hence, there is high-order information in the second-order VLL loop filter, which makes it adaptable to scenarios with certain acceleration and jerk. The filter output , which is obtained by integrating the filtered acceleration and the filtered jerk, is constant during a loop update period and is actually the estimate of the velocity at the start of the next loop update period. However, as the acceleration and jerk become greater, it is not only necessary to estimate the velocity variation between adjacent loop update periods, but also to provide a reasonable prediction of the velocity variation caused by acceleration and jerk at each sampling point during the loop update period. In this way, the difference between the local instantaneous phase of the replica signal and the instantaneous phase of the received signal at each sampling point can be as small as possible.
Therefore, the structure of the HD-VLL is proposed by adding acceleration and jerk compensation modules operating at the system clock to the second-order VLL loop filter. According to the previous analysis, ① is regarded as the estimated value of jerk , and ② is regarded as the estimated value of acceleration , so the acceleration and jerk compensation modules should compensate for a phase of + at the th sampling point.
Since the process of summing or by the accumulator is analogous to the integration process of the continuous signal, the workflow of HD-VLL to generate the local instantaneous phase is given below.
Accumulator 1 in the jerk compensation module accumulates the filtered jerk value
at each system clock, and the output
at the
th sampling point can be written as follows:
The output of Accumulator 1 and the filtered acceleration value
are added and sent to the acceleration compensation module. Accumulator 2 in the acceleration compensation module accumulates
at each system clock, and the output
at the
th sampling point can be written as follows:
where (13) is an approximation valid for
.
The output of Accumulator 2 and the filtered velocity value
are added together as the final output
, which can be expressed as follows:
The output
of the HD-VLL filter and the acquisition velocity
are summed and converted to Doppler frequency according to the carrier frequency of the current frequency hopping time slot, which is accumulated by the multi-carrier NCO to produce the local instantaneous phase, and the result is given in (15).
Compared to the local instantaneous phase produced by the second-order VLL in (6), which only contains the phase generated by velocity, the local instantaneous phase produced by the HD-VLL in (15) contains the phase generated by velocity, acceleration, and jerk. Hence, (15) better fits the instantaneous phase of the received signal in (8), which reduces the dynamic impact on the loop. A structure diagram of the HD-VLL is shown in
Figure 5.
As shown in
Figure 5, the structure of a multi-carrier NCO is displayed in the dashed box above, where
is the gain of the multi-carrier NCO; the structure of the HD-VLL loop filter is displayed in the dashed box below, where the second-order VLL loop filter structure is shown in the gray area, the jerk compensation module is shown in the purple area, and the acceleration compensation module is shown in the red area.
The workflow of the HD-VLL to generate local phase is summarized in Algorithm 1.
Algorithm 1: Workflow of HD-VLL to Generate Local Phase |
- 1: Input:
velocity error vdis, sampling period Ts, loop update interval T, total number of loop update periods L, total number of sampling points in a loop update period M, carrier frequency of the current frequency hopping time slot fcj, acquisition velocity vacq, loop bandwidth Bv.
|
. |
do |
. |
, by formula (10), formula (11) and formula (9). |
do |
by formula (12). |
by formula (13). |
by formula (14). |
by formula (15). |
11: end for |
12: end for |
. |
3.3. HD-VLL-NCO
An HD-VLL for hybrid DS/FH spread spectrum signal tracking is proposed in
Section 3.2, but the below problems are faced in practical engineering implementation.
When the number of channels involved in a communication system is relatively small, or when hardware resources are sufficient, we typically equip each channel with an independent filter module to ensure independent and stable tracking for each channel. In this case, the HD-VLL mentioned above can be directly adopted. However, when receivers simultaneously need to process signals from multiple channels in order to improve hardware resource utilization, time-division multiplexing technology is widely employed in the design of filter modules. It allows multiple channels to share the same filter module, and through precise timing control, each channel utilizes the filter during different time slots, thus achieving the parallel processing of multi-channel signals without additional hardware costs. However, the output of the HD-VLL loop filter needs to be updated with the system clock, which means the filter must complete data processing within each system clock. This high-frequency update requirement poses a certain conflict with the multiplexing of a traditional filter.
The carrier NCO plays a crucial role in generating a locally replicated carrier signal, which is updated at each system clock. The working principle of the carrier NCO involves calculating the corresponding frequency word based on the input Doppler frequency value. The accumulator then accumulates the frequency words, and the accumulation results are used to look up the table and obtain the corresponding sine and cosine amplitude values.
The multi-carrier NCO, however, differs from the carrier NCO, as illustrated in
Figure 6. The workflow is as follows: The input filtered velocity value and acquisition velocity are added together to form a velocity measurement value. Based on the predicted frequency hopping pattern and the current velocity measurement value, the Doppler frequency shift variable introduced by the next frequency hopping point is estimated. Subsequently, this estimated variable is converted into a frequency word, which is then accumulated and used for the lookup table. The hybrid DS/FH spread spectrum system employs multiple carrier frequencies. When utilizing the traditional carrier NCO structure, each carrier frequency necessitates a dedicated NCO, leading to increased resource utilization. The multi-carrier NCO, on the other hand, improves efficiency and reduces the use of hardware resources by centrally processing multiple carrier signals.
Based on the preceding discussions, the acceleration compensation module and jerk compensation module can be integrated into the multi-carrier NCO module, leading to the design of the HD-VLL-NCO. At each loop update period, the filter module outputs the filtered jerk , the filtered acceleration , as well as the filtered velocity to the multi-carrier NCO module, which uses these values to update the frequency word at each system clock and then accumulates the frequency word and looks up the table to obtain the corresponding amplitude values.
The structure of the HD-VLL-NCO is shown in
Figure 7.
As is shown in
Figure 7, the structure of the second-order VLL loop filter is displayed in the dashed box at the bottom, and the structure of the high dynamic multi-carrier NCO is displayed in the dashed box at the top.
However, this method will bring new problems to the multi-carrier NCO. The dimension difference between jerk, acceleration, and velocity is . Since the sampling frequency can reach tens or even hundreds of megahertz, its reciprocal will be very small. Therefore, in high dynamic cases, it is necessary to comprehensively consider the precision and bit width when selecting the parameters for the multi-carrier NCO so as to ensure that the compensation of jerk and acceleration can be reflected on the frequency word while minimizing the waste of resources.
It can be seen in
Figure 7 that there are three accumulators corresponding to three frequency words in the high dynamic multi-carrier NCO, with the name of jerk frequency word, acceleration frequency word, and frequency word, respectively. Three accumulators simultaneously accumulate these three frequency words, and the high
bits of the velocity accumulator are selected to perform a phase query. Finally, the multi-carrier NCO outputs the amplitude values of the sine and cosine wave signals. By appropriately setting the bit widths of the jerk frequency word, the acceleration frequency word, the frequency word, the accumulators, as well as the truncation, it is possible to achieve the accuracy and dynamic requirements while minimizing the waste of resources.
The formulas and bit widths for the frequency words of each order are given below. The first-stage jerk accumulator sum2 accumulates the jerk frequency word
and truncates
bits of the result and then adds it to the acceleration frequency word
, and the output
is
The second-stage acceleration accumulator sum1 accumulates
and truncates
bits of the result and then adds it to the frequency word
, and the output
is
The third-stage velocity accumulator sum0 accumulates
and then truncates
bits of the result, and the output
is
The phase variation caused by the filtered jerk
, the filtered acceleration
, and the estimated velocity
can be expressed as
After discretizing the analog signal, that is,
, the equivalent phase sequence is defined as
According to the principle of direct digital synthesis (DDS), the output of the accumulator has the following relationship with the phase of simulated signal:
where
denotes the input of the lookup table and
denotes the bit width of the lookup table.
Hence,
can, in turn, be derived as follows:
By making the output
of the HD-VLL based on the multi-carrier NCO equal to
, the formulas for the frequency word of each order can be obtained as follows:
The simplified formulas can be derived as follows:
When the frequency word equals 1, it corresponds to the minimum frequency value, which is also the frequency resolution. The velocity resolution can be deduced from the frequency resolution. To make the frequency word, acceleration frequency word, and jerk frequency word equal to 1, respectively, we obtain the velocity resolution
, acceleration resolution
, and jerk resolution
as follows:
In practical applications, , , and are determined in terms of the accuracy requirements. After determining the lookup table bit width and sampling frequency , the appropriate truncation widths , , and can be obtained by solving the above equations.
Figure 8 shows the block diagram of the implementation for the HD-VLL-NCO.