Joint Use of Thermal Characterization and Simulation of AlGaN/GaN High-Electron Mobility Transistors in Transient and Steady State Regimes to Estimate the Hotspot Temperature

Abstract

Channel temperature has a strong impact on the performance of a microwave power transistor. In this paper, various methods, including electrical measurements, optical analysis, and FEM simulations, were employed to perform both transient and steady-state thermal characterization of GH15 2 × 150 µm transistors from UMS foundry (United Monolithic Semiconductors, France). The transient study allowed for the extraction of thermal time constants according to which the temperature in the transistor changes. The steady-state study provided the hotspot temperature. As the channel is physically inaccessible, direct thermal measurement at the hotspot is not possible, in order to extract the temperature of this hotspot, different measurement methods are combined by simulation, which is calibrated based on the measurements, resulting in a well-adjusted thermal model. This calibrated model enabled the extraction of temperature at any location within the device’s structure, particularly at the hotspot. The measurement and simulation results have shown that the hotspot temperature can be 30% higher than the temperature of the nearest external surface for high dissipated power levels.

1. Introduction

GaN-based high-electron mobility transistors (HEMTs) are used in various fields of application, including military and space domains. These devices provide significant advantages for power and high-frequency applications due to the intrinsic properties of their materials. This is particularly true when utilizing “power-dedicated substrates” like silicon carbide (SiC) or diamond [1,2]. In the long term, we could also imagine using carbon nanotubes, which offer high thermal conductivity and robustness against temperature fluctuations [3]. Such materials enable their use in diverse fields, including microwave power amplification and power electronics. However, the GaN HEMTs can deliver very high power densities, resulting in thermal energy dissipation. In radar applications, object detection relies on receiving signals reflected from targets. These reflected signals originate from a modulated pulse train emitted by the radar source. A signal pulse train with a duration of τ allows the rest of the period to be used for detecting echoes from the detected targets. To reach distant targets, the pulse signal is transmitted with high energy. This increases the significance of thermal effects, which can impact system stability and degrade detection quality [4]. Thus, temperature reliability is critical to determine the choice of the GaN HEMT device and the architecture of the power amplifier.

The channel temperature is an important factor for AlGaN/GaN HEMTs to improve device reliability and optimize design and performance. Therefore, advanced characterization methods are required to carry out thermal analysis of HEMTs, in order to measure the channel temperature in a steady state and during transient conditions.

Various methods can be used to determine the steady-state temperature in GaN HEMT devices, such as electrical methods like Pulsed I-V [5,6] which gives an average channel temperature along the channel, contact methods such as Scanning Thermal Microscopy (SthM), which yields the surface temperature of the device [7], and Raman spectroscopy and the thermoreflectance method for optical non-contact methods [8,9]. However, only a limited number of methods can measure the transient temperature of AlGaN/GaN HEMTs. Four different methods are used in this study to determine the temperature transient in the GaN transistor: two electrical methods, one optical method, and one nonlinear simulation method.

• Electrical Methods: These include Transient Analysis of Drain Current which focuses on studying the time-dependent behavior of the drain current, and Gate Current Analysis which examines the current flowing through the gates.
• Optical Method: Thermoreflectance Measurement which utilizes the principle that a material’s reflectivity changes with temperature to assess thermal variations.
• Nonlinear Simulation Method: Finite Element (FE) Simulation, which is a transient thermal analysis based on the Finite Element Method to model and predict thermal behavior.

The latter section of this work is dedicated to extracting the hotspot temperature variation in relation to the dissipated power applied to the transistor. This involves a combination of both measurement and simulation methods. Using the gate temperature measurement results obtained in a steady-state regime, the FE model can be calibrated, allowing for the determination of the maximum temperature in the channel through simulation.

2. Thermal Time Constants

The temperature change within transistors, caused by the dissipated power, does not occur instantaneously. This is due to the thermal inertia of the transistor and the surrounding materials. When a transistor is powered, energy is converted into heat within the transistor channel, which then propagates through the different layers of the device, reaching the substrate before dissipating into the surrounding environment. This process takes time and depends on the thermal properties of the materials, such as thermal conductivity and heat capacity. Upon power application, the initial temperature rise occurs quickly, slowing down as thermal equilibrium is approached.

In the experimental setup, the resting bias conditions are set to V_gs = 0 V for the thermoreflectance method, 0.1 V for the electrical methods, and V_ds = 0 V for both methods, ensuring that no pre-stress conditions activate traps before the transient measurements begin. During the measurement, V_gs remains fixed, while V_ds is pulsed from 0 to 10 V for thermoreflectance measurement and from 0 to various values for the electrical methods with a controlled pulse width and duty cycle. This configuration minimizes the possibility of activating surface traps. Regarding the transition from 0 V to 10 V for the V_ds voltage (positive direction), this configuration minimizes the effects of drain-lag traps. Furthermore, their capture time constant is significantly lower compared to the thermal time constants [10,11].

In addition, the different measurement methods were performed in our laboratory under identical ambient temperature (25 °C) and humidity conditions. For this reason, the impact caused by changes in these parameters was ignored, as their variations were considered negligible.

• Transient Thermal Analysis using an Electrical Approach

Experiments based on the observation of the temporal evolution of the drain current i_ds(t) and the gate current i_gs(t) have been conducted. The study of the current flowing through the gate of the transistor was made possible by exploiting the specific transistor under investigation, which has two accesses to its gates, as shown in Figure 1. This two-gate cell has been designed by the UMS foundry and is based on the commercially available GH15 process. The main idea behind this method is to use the gate resistance of the transistor as an electrical sensor where the variation in its resistance is the image of its temperature [5]. The first and the second gate accesses are set at two close electrical potentials, allowing a small current to flow between them and also measuring the electrical resistance. The potential difference is small enough to ensure that its thermal effect is negligible compared to the main effect of the drain current in the channel. Electrical excitation is then applied to the drain, and the resulting dissipated power causes a rise in channel temperature. This thermal energy impacts the drain current i_ds and the gate current i_gs.

In this experiment, a pulse voltage of 0.1 V was applied to the gate terminal of the transistor, resulting a gate current i_gs of 3.5 mA. This allows us to analyze the transistor’s thermal behavior, and hence, the time-dependent currents i_ds(t) and i_gs(t) were recorded. This was achieved by applying a variable pulse voltage V_ds to the transistor using a pulse generator, with an amplitude varying from 1 to 10 V with a pulse duration of 10 milliseconds, as illustrated in Figure 2 of the experimental electrical excitation setup. The use of several power dissipation levels makes it possible to understand how the transistor dynamically responds to varying input conditions.

The currents i_gs and ids exhibit an exponential decrease due to variations in the temperature of the gates and the channel, as shown in Figure 3 and Figure 4. This phenomenon is governed by fundamental principles such as the temperature dependence of the carrier mobility and electrical conductivity in the materials. As the temperature increases, lattice vibrations increase, leading to the scattering of charge carriers and reducing their mobility. Consequently, this effect results in a decrease in the current flow through the materials [12]. It is assumed that the time evolution of the currents is inversely proportional to the temperature changes induced by the dissipated power. It is then possible to deduce the time profile of the gate and channel temperature based on the time profile of the electrical currents.

The results show a significant phenomenon in terms of heat propagation at high dissipated power levels. Temperatures reach higher levels more rapidly and increase more prominently compared to lower dissipated power levels. The time constants are bias dependent as clearly shown in [13].

Another phenomenon is also observed. The experiments show that the support on which the component is placed influences the measurement results. To highlight this observation, two different materials for wafer support were used: one made of a very good thermal conductor material and the other made of a poor thermal conductor material, i.e., a thermal insulator. The use of these two supports made of materials with significantly different thermal conductivities (K_isolator = less than 1 w/k.m; K_good = 220 w/k.m) makes it possible to observe their influence on the heat dissipation of the component. In fact, the poor thermal conductor prevents heat from escaping to the outside of the transistor due to its poor thermal conductivity, whereas the other material is an excellent thermal conductor. For this experiment, a dissipated power of 2.7 W was applied to the 2 × 150 µm transistor. The results indicate that the temperature rises similarly for both supports up to approximately 100 µs, for both the gate and drain currents. This first phase corresponds to the temperature evolution within the transistor, which has not yet reached its dimensional limits. Beyond 100 µs, a different dynamic is observed, attributed to the transfer of thermal energy from the transistor to the wafer support. Gate and drain currents decrease more significantly with lower thermal conductivity support. This reduced thermal conductivity results in higher thermal energy retention within the component, leading to a substantial rise in temperature. This high temperature significantly reduces the currents.

In real applications, the transistor is not mounted on an isolator support. This work aims to highlight the impact of the quality of the transistor assembly and the base on which it is mounted. Poor contact resistance caused by a rough assembly will increase the total thermal resistance of the transistor, which in turn affects the temperature of the transistor and the current response. The measurement results presented in Figure 5 show the effect of temperature on the drain and gate currents for the different supports: (a) i_ds and (b) i_gs. Indeed, the thermal energy generated in the channel propagates from the channel to the rest of the device and is then transferred to the outside environment by three types of heat transfer: radiation, convection, and conduction. Given the surface size of the transistor (a few hundred micrometers square), heat transfer by radiation and convection is negligible compared to heat transfer by conduction. The latter occurs at the interface between the device and the support on which the device is placed.

In this section, we have shown that both the support on which the transistor is mounted and the level of power affect the measurement results, both in transient and steady state. The study of the drain and gate currents allowed the determination of the temperature profiles in the channel and on the gates.

2.

Transient Thermal Analysis using an Optical Approach

Thermoreflectance is a noninvasive optical technique used to measure temperature variations on the surface of materials with high spatial and temporal resolution. This technique utilizes an optical signal in the visible range, which can penetrate the passivation layer of GaN transistors. This method is based on the dependence of a material’s reflectivity (R) on its temperature. When a temperature variation (ΔT) occurs, the optical properties of the material, including its refractive index (n) and extinction coefficient (k), change, resulting in a measurable variation in reflectivity [14].

Transient thermoreflectance measurements were performed to observe the temporal evolution of temperature in a 2 × 150 µm transistor. Unlike steady-state measurements, where temperature is recorded after thermal equilibrium is reached, transient measurements capture rapid temperature changes immediately after power is applied. This technique also allows the extraction of thermal time constants.

The measurement involves directing a focused optical signal onto the surface of the material. The reflected signal is detected in a matrix format, enabling simultaneous data acquisition for each pixel of the image captured by a CCD camera [15].

A pulsed voltage generator is synchronized with both the light source and the CCD camera to ensure accurate timing and measurement precision, as shown in Figure 6.

An optical signal of wavelength λ = 530 nm illuminates the surface of the transistor with a 50× magnification lens with a numerical aperture NA = 0.44 to reach the gate where the measurements are performed (Figure 6). The spatial resolution is generally less than one micrometer and depends on the illumination wavelength, and the numerical aperture of the objective. For our setup, the spatial resolution is around 600 nm according to [16] and the measurement accuracy is around 0.5 °C after averaging.

To perform this temporal measurement, a pulsed voltage is applied to the component, and the temporal evolution of its temperature during the pulse is captured. Since the temperature variation within the component occurs very rapidly, the pulse generator must have optimal characteristics, particularly very short rise and fall times, 7 ns in our case, to ensure precise measurement of the thermal dynamics.

The temporal measurement is carried out by sweeping the excitation electrical signal with the optical signal from the measurement LED. The temporal diagram of the thermoreflectance measurement is illustrated in Figure 7. The specificity of the transient measurement lies in the continuous variation in the optical signal, which scans the entire excitation signal.

The delay corresponds to the temporal step by which the optical measurement signal is shifted within the excitation pulse. This step enables the scanning of the excitation signal and the capture of the device’s thermal response at different moments.

The temporal resolution of the measurement is defined by the temporal width of the LED signal. This resolution is directly related to the duration of the excitation pulse: longer excitation pulses reduce the temporal resolution, making it harder to distinguish rapid temperature variations. Conversely, shorter excitation pulses provide better temporal resolution.

It is possible to combine multiple measurements using excitation pulses of different durations. Shorter pulses capture the rapid initial temperature transient at the start of the excitation, while longer pulses allow tracking of the temperature progression at later times.

For this purpose, several measurements were performed by applying a dissipated power of 2.7 W with excitation pulses of 9.7 V of varying durations: 30 µs, 50 µs, 100 µs, 200 µs, and 1 ms. These pulse durations correspond to the temporal resolutions of 5 µs, 9 µs, 17 µs, 35 µs, 90 µs, and 200 µs, respectively. The combination of these results allowed for the construction of a complete temperature profile, as shown in Figure 8.

The temperature measurement results, normalized to the maximum temperature at 900 µs, are illustrated in Figure 9.

The temperature versus time curve is obtained by thermoreflectance, which exhibits a similar shape to the ΔT_ig(t) and ΔT_id(t) curves. The curves will be compared in a next part.

3.

Transient Thermal Analysis through a NonLinear Simulation

Figure 10 shows the electric field profile along the GaN channel at V_gs = 0 at different drain voltages (V_ds) i.e., (i) 5 V, (ii) 7 V, and (iii) 10 V. The physics-based 2D device simulation is performed using TCAD Sentaurus device software [17]. The physical model includes the drift-diffusion model for carrier transport, no bandgap narrowing, a temperature-dependent mobility model with high-field saturation, Shockley–Read–Hall (SRH) recombination for trap dynamics, Fermi statistics, and the thermionic emission model at the heterojunction interface. The Sentaurus device numerically simulates the electrical behavior of a standalone semiconductor device. An actual semiconductor device is represented as a virtual device with its physical properties distributed across a non-uniform grid or mesh of nodes [17].

It is widely recognized that the lateral electric field is focused at the gate edge region on the drain side in HEMT devices [13]. TCAD tools inherently enable true multi-physics simulation, allowing it to accurately predict the hotspot location [13,18]. Hence, the thermal properties of GaN-based HEMTs can be effectively modeled for ANSYS simulations by adding the heat source at the drain side of the gate edge.

A thermal simulation, based on the Finite Element Method (FEM), is carried out for the thermal analysis in transient regime. All the layers constituting the transistor are simulated as well as the support on which the device rests, as shown in Figure 11. The layer thicknesses of the device are confidential. They have been provided to us by the UMS foundry but are not explicitly given in Figure 12. Figure 11 and Figure 12 show the position of the hotspot from the top of the device and the layers that have been considered for the simulation. The nonlinearity of the thermal properties with temperature, including the thermal conductivity of each material, is considered according to the equation $k\left(T\right)=k_{300}·{\left({\displaystyle \frac{T}{300}}\right)}^{-\alpha }$. The conductivity varies as a function of temperature, but also as a function of the material thickness. This phenomenon is due to phonon confinement, which arises when the dimensions of the materials, especially semiconductors, become very small, typically when the thickness becomes less than a micrometer. This confinement results in a decrease in the material’s thermal conductivity [19]. All these parameters have been considered to ensure that the simulation conditions are as close as possible to those of the real conditions. The other phenomenon taken into consideration is the contact resistance between the transistor and the support. Indeed, as shown in the previous section, this resistance as well as the nature of the support influences the results. During the measurement, the transistor was placed on the aluminum support, the contact between them was not perfect. In order to simulate this imperfect contact, a 1 mm thick layer was added between the transistor backside and the aluminum support, this layer has a thermal conductivity of about 1 W/K.m.

Figure 12 and

Table 1. The thermal properties (at 25 °C) of the transistor materials used in the simulation. Sic and GaN are nonlinear.

Material	Conductivity (W/(m·K))	Density (kg/m3)	Specific Heat Capacity (J/(kg·K))
Au	315	19,320	130
SiN	35	3200	680
AlGaN	40	5184	604
GaN	130 (α = −1.45)	6150	490
SiC	390/490 (α = −1.49)	3220	698

show the dimensions of the materials used in the simulation and their thermal properties. Thermal conductivities have been obtained [19,20] and depend both on layer thickness [19] and temperature [21]. Also, SiC presents anisotropy between in-plane and out-plane thermal conductivity [22]. Due to the symmetry of the transistor structure along the x and y axes, only a quarter of the structure is simulated. This double symmetry considerably reduces the computation time and allows further refinement of the results. Volume averaging (probing over 1000 points) makes it possible to obtain the volumetric temperature of the gates so that the comparison with the measurement method is consistent. This average is used because the measurements, based on the study of the current flowing through the gates, give the volumetric temperature as the current flows through the entire gate metallization.

The simulation was carried out for several dissipated power. This power density was used in the part of the channel below the gate on the drain side. The same phenomenon was observed for the temperature propagation rate, as shown in Figure 13. The higher the dissipated power, the earlier and faster the temperature increases.

In order to compare the simulation results with the measurement methods, a dissipated power of 2.7 W, is considered in this simulation which is the same as for the other methods. The normalized transient simulation results are shown in Figure 14.

4.

Comparison of Results and Conclusion

Despite the fact that three different methods have been used in this section, the results are similar. The gate and drain currents are normalized to extract the thermal time constants governing their evolution. The results showed that the curves decrease exponentially and are expressed by Equations (1) and (2). In order to obtain the corresponding temperature profile and for comparison with other methods, these curves are expressed using the same time constants to exhibit increasing exponential behavior as shown in Figure 15.

$$I_d(t)=y_{d0}+\sum _{i=1}^5{A}_{di}.exp\left({\displaystyle \frac{-t}{{\tau }_{dai}}}\right)$$

(1)

$$I_g(t)=y_{g0}+\sum _{i=1}^5{A}_{gi}.exp\left({\displaystyle \frac{-t}{{\tau }_{gai}}}\right)$$

(2)

$${\Delta TI}_{d Norm }(t)={\sum }_{i=1}^5{A}_{di}(1-exp\left({\displaystyle \frac{-t}{{\tau }_{di}}}\right))$$

(3)

$$\Delta T{I}_{g Norm }(t)={\sum }_{i=1}^5{A}_{gi}(1-exp\left({\displaystyle \frac{-t}{{\tau }_{gi}}}\right))$$

(4)

The temperature in the transistor seems to evolve in a similar way in the channel and the gates, which can be explained by the small distance that separates these two areas (less than 1 µm). The substrate of the HEMT device is SiC. Considering that the thermal diffusivity of the 70 um of SiC substrate is around 1.82 × 10⁻⁴, we obtain 27 μs for the diffusion time at the backside of the device. As shown in Figure 5a, this occurs roughly at the time when the red and the black curves deviate.

The three methods investigated reveal that the temperature in the transistor evolves according to the time domain profile, as shown in Figure 16. The thermal transient requires five-time constants to be faithfully represented (see

Table 2. The different thermal time constants and their weightings extracted from the i_ds and i_gs currents for the two different baseplates.

Title 1	${\mathit{\tau }}_1 \left(\mathit{\mu }\mathbf{s}\right)$	${\mathit{A}}_1$	${\mathit{\tau }}_2 \left(\mathit{\mu }\mathbf{s}\right)$	${\mathit{A}}_2$	${\mathit{\tau }}_3 \left(\mathit{\mu }\mathbf{s}\right)$	${\mathit{A}}_3$	${\mathit{\tau }}_4 \left(\mathit{\mu }\mathbf{s}\right)$	${\mathit{A}}_4$	${\mathit{\tau }}_5 \left(\mathit{\mu }\mathbf{s}\right)$	${\mathit{A}}_5$
$I_{ds}$	2.28	27.1%	21.47	18.6%	125	17.2%	586.4	14.4%	3510	19.8%
$I_{gs}$	1.17	27.4%	18.32	16.84%	126.3	19.2%	662.26	16.55%	4000	19.3%

). Other smaller thermal time constants exist theoretically [23] but the time resolution of the measuring instruments did not allow to extract them, they are included in the smallest thermal time constant (about 2 µs). The simulation results are consistent with the measurement results. Nevertheless, a slight difference is observed for the shorter time constant compared to the measurements. This can be explained by the fact that the data acquisition during the measurement is not instantaneous at this time scale, but takes place over a time-lapse, unlike the simulation where the acquisition is instantaneous; the temperature is then averaged over an acquisition time corresponding to the temporal resolution, which depends on the performance of the measuring instruments.

It is challenging to define a strict physical model to explain the presence of five main thermal time constants, as thermal time constants in GaN HEMTs are inherently complex. Several factors contribute to their existence:

• Multiple Time Constants Even in a Single Material:

Even within a single-layer material, multiple thermal time constants can arise due to the nature of thermal diffusion. The transient thermal response of a homogeneous structure does not follow a single exponential decay but rather a spectrum of time constants. This is evident in the analytical and numerical studies presented in the literature, such as Bagnall’s analytical approach and the Ritz Model Order Reduction (MOR) technique used for numerical extraction [23].

• Influence of the Heat Source Length (Gate Length):

The characteristic thermal time constants are strongly dependent on the length of the heat source (the gate region in a GaN HEMT). The study confirms that reducing the heat source length leads to a broader thermal time constant spectrum, indicating a more complex thermal response. The shortest time constant can vary significantly with the gate length, while longer time constants remain relatively unaffected [23].

• Layered Structure and Material Coupling Effects:

In a GaN HEMT, multiple material layers contribute to different thermal time constants due to their distinct thermal diffusivities and thicknesses. Each layer introduces its own thermal response, and interactions between these layers to create additional coupled thermal dynamics. The study confirms that the thermal time constants extracted from simulations align with analytical predictions, considering both individual and coupled layer effects [23].

• Interfacial and Contact Resistances:

The presence of thermal resistances at interfaces further complicates the transient response, adding additional thermal time constants. These resistances slow down heat propagation and create other timescales for temperature evolution in different regions of the device.

• Impact of Phonon Confinement and Nanoscale Effects:

Fourier’s law may be insufficient for nanoscale structures where phonon scattering and confinement become significant. These effects modify heat transport dynamics and could lead to additional thermal time constants that are not captured by classical macroscopic thermal models.

The fitting of experimental and simulation results shows that a model with five thermal time constants achieves a correlation rate exceeding 97%, ensuring an accurate representation of the system’s dynamics. The inclusion of a sixth-time constant does not significantly improve the quality of the fit, suggesting that only five characteristic time scales dominate the observed thermal behavior.

Even in the absence of a precise physical model, our calibration process ensures that the model accurately reflects the thermal behavior of the GH15 2 × 150 µm GaN transistor. Based on simulation and measurement methods. We can now investigate the maximum temperature reached in the transistor channel. This will be further discussed in the next section of the paper.

3. The Maximum Temperature Reached Within the Transistor

The work performed in this section aims to extract the temperature of the hotspot. The methods described above are performed in the steady state to extract the final temperature reached within the transistor. Two of them allow the measurement of the gate temperature. The first one is the “GRT” electrical method based on calibrating the gate resistance as a function of temperature. This method establishes a relationship between the gate temperature and the applied dissipated power through the application of the drain current i_ds [5,6]. Two steps are required: The first one is the calibration of the gate resistance as a function of the temperature extrinsically induced by a thermal chuck. The second step involves the expression of the gate resistance versus the dissipated power. It is then possible from these two relationships to express the gate temperature as a function of the dissipated power [5]. This electrical method allows for the characterization of the temperature along the gates close to the hotspot region and averages the temperature over the gate width. The second method is based on thermoreflectance used in a steady state for the gate’s temperature measurement.

Physical access to the hotspot is impossible, studying the behavior of the drain current flowing through the channel is interesting, but it gives averaged results along the channel and does not target the hotspot [6]. Therefore, the temperature extracted by this method is the average temperature of all the channel. Figure 17 shows the different measurement areas targeted by the different methods.

The two measurement methods (GRT and thermoreflectance) are combined with the steady-state simulation to extract the hotspot temperature. A power density is applied to the area of the channel below the gate. By calibrating the gate temperature results from the simulation with those from the measurement methods, it is possible to plot the temperature of the hotspot. A number of factors were considered in this simulation to make it as close as possible to real-life conditions, in particular the support on which the device is placed, and the nonlinearity of thermal properties such as the thermal conductivity. The method’s results show that the hotspot temperature can be more than 35% higher than the gate temperature for dissipated power greater than 9 W/mm, as shown in Figure 18 and

Table 3. Average and hotspot temperature obtained for different dissipated power.

Dissipated Power (W)	Gate Average Temperature (°C)	Hotspot Temperature (°C)
$0.63$ 2.1 W/mm	56.5	65.5
$1.27$ 4.2 W/mm	93.0	114.5
1.55 5.2 W/mm	110.0	138.5
1.95 6.5 W/mm	137.5	176.0
2.70 9 W/mm	192	256.5
2.95 9.8 W/mm	209	284.0

. The results also indicate that the average temperature along the channel is in close agreement with measurements obtained using the RON-based method. This consistency further corroborates that the region of the highest thermal stress is part of the channel beneath the gate on the drain side, called “hotspot”.

4. Conclusions

This paper presents a transient and steady-state thermal study of a GaN HEMT transistor, named GH15 2 × 150 µm from the UMS foundry. This transistor has the particularity of being designed with two accesses to its gate, allowing it to be used as a resistive temperature sensor. This study revealed that the temperature of the gates and the channel varies according to five main thermal time constants. Optical and electrical measurements as well as thermal simulation were then carried out and compared. The comparison exhibits a very good agreement between the different methods. The last part of this paper is devoted to the extraction of the maximum hotspot temperature, which combines the simulation method and the measurement method based on the study of the gate current. The results show that the hotspot temperature is higher than the gate temperature. This temperature difference increases as the dissipated power applied to the transistor grows.