TSV Technology and High-Energy Heavy Ions Radiation Impact Review
Abstract
:1. Introduction
2. Silicon Interposers and TSV Technology
2.1. Silicon Interposer Production
2.2. Silicon Interposer Structure
2.3. The Silicon Interposer Testing Technology
2.4. Thermal Design of Silicon Interposer
2.5. Micro-Bump Electromigration and Heat Transfer
2.6. The TSV and Interposer Technology Conclusion
3. Influence of High-Energy Particle Radiation on Semiconductor Devices
3.1. Influence of High-Energy Particles on Semiconductor Devices
3.2. The High-Energy Heavy Ions Radiation Simulator
3.3. Mathematical Simulation and Optimization of Single Particle Effect
3.4. How to Reduce the Influence of High-Energy Particles on Semiconductor Devices
3.5. Summary of the Impact of High-Energy Heavy Ions on Semiconductor Devices
4. Effect of High-Energy Heavy Ions on Silicon Interposer (Discussion)
4.1. Prediction of Failure of the Silicon Interposer Caused by High-Energy Heavy Ions
4.2. Research Method for High-Energy Heavy Ion Influence on Silicon Interposer
Author Contributions
Funding
Conflicts of Interest
References
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Application | Via Depth/Diameter | Cost | Performance | Reference |
---|---|---|---|---|
3D ASIC and memory integration | 220/50 μm | High | A total of 3000 cycles with 10 min ramps and dwell from 0 to 100 °C | [14] |
Passive Interposer | 230/80 μm | Low | High density | [15] |
RF wireless devices | 120/60 μm | N/A | The loss of 0.6 dB/mm at 60 GHz. | [22] |
Passive Interposer | 130/50 μm | N/A | No electrical failure occurred in all samples after 500 MSTs (moisture sensitivity testing) and 1000 TCTs (thermal cycling testing from −40 °C to 125 °C). Only two of them failed after 3000 TCTs. | [24] |
On-silicon-interposer | N/A | N/A | Four times higher than the data rate of HBM generation 2 | [26] |
3D integration | 100/40 μm | Lower | Simplified the integrated process flows, enhanced the reliability | [27] |
high-density RDLs of silicon interposers | -/10 μm | Lower | reduce the amount of waste materials | [28] |
Mechanism/Material | Via Depth/Diameter | Duration | Reference |
---|---|---|---|
Cu | 100/10 μm | Coverage of near 100% and lower leakage current | [29] |
Vacuum pressure/Molten 1SAC305 solder | 220/30 μm | The filling time is 4 s; The wetting layer deposition may take more than 1 h. | [30] |
RF-MEMS switch/Molten Sn-Ag solder | 300/150 μm | The wetting layer deposition may take more than 1 h. | [31] |
N2 gas pressure/Molten Zn-Sn alloy | 150/50 μm | The wetting layer deposition and Zn electroplating may take more than 3 h. | [32] |
Inkjet printer/Ag-based ink | 115/80 μm | N/A | [33] |
Very high aspect ratio TSVs/Gold | 625/30 μm | Adapt standard wire bonding technology to fill the through via holes | [34] |
3-D integration/Ag-based conductive polymers | 500/150 μm | The resistance is between 30 and 55 Ω | [35] |
Waveguides Material | Waveguides Thickness | Performance | Reference |
---|---|---|---|
Si | 500 nm | Promoting light coupling to other materials for efficient electro-optical modulation | [54] |
Si | 220 μm | Negligible loss | [55] |
SiN | 100 μm | power variation less than 0.1 dB | [56] |
Classification | Research Content | Conclusion | Reference |
---|---|---|---|
The interposer production | A passive silicon interposer | Cost and performance-effective. | [14] |
The interposer production | A passive silicon interposer | High density and low-cost. | [15] |
The interposer production | A passive silicon interposer with annular TSVs. | The loss of 0.6 dB/mm at 60 GHz. | [22] |
The interposer production | An annular copper through-silicon via (TSV) integration process. | No electrical failure occurred in all samples after 500 MSTs. | [24] |
The interposer production | A new on-silicon-interposer passive equalizer for HBM. | Higher performance. | [26] |
The interposer production | Through-hole filled with micro-bump integration production. | Simplify the production process, save costs and enhance its reliability. | [27] |
The interposer production | Redistribution layers were fabricated using Combination of E-Jet and Inkjet Printing. | Simplify the production process and save costs. | [28] |
The interposer production | TSVs filled with void-free copper. | Nearly 100% coverage and lower leakage current. | [29] |
The interposer production | TSVs filled with the molten solder. | The 100% filling ratio for vias. | [30] |
The interposer production | A radio frequency MEMS. | Short filling time. | [31] |
The interposer production | Fill vias with the Sn Zn. | Higher performance. | [32] |
The interposer production | Print blind vias using an inkjet printer. | Avoid the filling material melting process. | [33] |
The interposer production | A new concept for the quick metallization of TSVs. | Super high aspect ratio. | [34] |
The interposer production | Ag-based and C-based conductive polymers. | Accelerate the metallization process and enhance the electrical connection quality. | [35] |
The interposer production | High-resistance silicon instead of p-type low-resistance silicon as a Interposer material. | High-resistance -silicon interposer can be well suited to high-frequency circuits. | [36] |
The interposer production | Glass interposer instead of Silicon interposer. | Reduce costs. | [37] |
The interposer production | TSV vias filled with Cu metal are converted to fill with polysilicon for use in MEMS devices. | It is more compatible with high temperature process, without metal, and suitable for the special requirements of MEMS technology | [38] |
The interposer production | Nano-carbon filled glass adapter plate | Reduce the maximum temperature of the interposer in a large extent. | [39] |
The interposer structure | Ohm contact CPW RDL structure with ground directly in contact with the silicon substrate | Reduce signal crosstalk to some extent. | [44] |
The interposer structure | The silicon-interposer structure composed of a thin metal substrate | The far-end crosstalk can be reduced to a certain degree when the center distance of the via hole is greater than or equal to the thickness of the silicon substrate. | [45] |
The interposer structure | A novel silicon-core coaxial TSV structure. | The structure has the characteristics of low loss, high performance and simple production process. | [46] |
The interposer structure (TSC) | Integrate 3D deep on silicon interposer. | Increase the capacitance density and improve the chip package performance. | [47] |
The interposer structure (TSC) | Production of axial TSC and radial TSC. | The using of radial TSC can reduce the ESL and increase the SER. | [48] |
The interposer structure (3D PICs) | Efficient electro-optical modulation. | Promote light coupling to other materials. | [54] |
The interposer structure (3D PICs) | 220 nm-thick silicon waveguides. | With negligible loss. | [55] |
The interposer structure (3D PICs) | A high-density wafer-scale 3-D silicon-photonic integrated circuits. | Lower power variation. | [56] |
The interposer testing | E-fuse, a new test framework, was proposed based on the plug-in structure of integrated circuit test. | Connect the test system and the circuit to be tested and separated. | [61] |
The interposer testing | Propose a novel de-embedding methodology and broadband microprobe measurement | There is a transition to resistance around 1 GHz due to the property of the silicon substrate, and then dominated by capacitive behavior when frequency goes up to 4 GHz | [65] |
The interposer testing | Designed a test interposer for POP | Signal integrity issues can be tested without contact with solder joints, reducing errors due to the solder-joints damage and the poor contact | [66] |
The interposer thermal design | Designed and fabricated a silicon interposer embedded with microfluidic channels. | Thermal conductivity increased significantly. | [67] |
The interposer thermal design | 3-D embedding concept of optical and electrical dies. | Address the thermal issues based on wet-etched silicon interposer with low cost | [70] |
The interposer thermal design | Wet-etched three-level Silicon Interposer | Only a 0.1and 0.8-dB additional penalty. | [71] |
Micro-bump | Micro-bump failure | Sensitive to the loading mode | [75] |
Micro-bump | Examine the reliability of Ni/Sn3.5Ag (15 μm)/Ni micro-bumps. | The orientation affects the electromigration reliability. | [81] |
Micro-bump | Power one daisy chain of the micro-bumps. | The latter failed due to thermomigration | [82] |
Micro-bump | The thermo-mechanical properties of SnAg micro-bumps | Significantly weaken its mechanical and electrical properties. | [87] |
Part Number | Technology | Active Area | CMOS | Reference |
---|---|---|---|---|
MSO9104A | PPL | N/A | 130 nm | [107] |
N/A | HBT | N/A | N/A | [110] |
EPC2019ENG | GaN | N/A | N/A | [111] |
3DG110 | BJT | N/A | N/A | [114] |
STPSC1006D | SiC Schottky diodes | 2.31 mm2 | N/A | [121,122] |
STPSC10H065DY | SiC Schottky diodes | 2.62 mm2 | N/A | [121,123] |
FM22L16 | FRAM | N/A | 130 nm | [125] |
MT29F128G08CBECBH6 | NAND | N/A | 16 nm | [128] |
N/A | FinFET | N/A | 16 nm | [52] |
Artix-7 | SRAM-FPGA | N/A | 28 nm | [53] |
ION | ENERGY (MeV) | Material | LET (MeV/(mg/cm2))/Tilt (°) | Projected Range (μm) | Facility | Reference |
---|---|---|---|---|---|---|
Kr | 480 | Si | 37.6 | N/A | HIRFL | [107] |
Kr | 768 | SiC | 33.8/0 | 63 | RADEF | [121,122] |
Fe | 523 | SiC | 20.1/0 | 64 | RADEF | [122] |
Ar | 372 | SiC | 10.9/0; 11.7/30; 14.3/45; 15.7/50 | 78 | RADEF | [123] |
N | 139 | Si | 1.8/0 | 202 | RADEF | [126] |
Fe | 523 | Si | 18.5/0 | 97 | RADEF | [126] |
Kr | 768 | Si | 32.1/0; 45.4/45 | 94 | RADEF | [126] |
Ne | 186 | Si | 3.6/0; 4.2/30; 5.1/45 | 146 | RADEF | [126] |
Xe | 1217 | Si | 60/0; 69.3/30; 84.8/45 | 89 | RADEF | [126] |
Xe | 466 | Si | 64.3/0 | 37 | GANIL | [126] |
Xe | 1790 | Si | 50.2/0 | 137 | GANIL | [126] |
B | 108 | Si | 0.9/0 | 306 | BASE | [126] |
Ne | 216 | Si | 3.5/0 | 175 | BASE | [126] |
Si | 292 | Si | 6.1/0 | 142 | BASE | [126] |
Ar | 400 | Si | 9.7/0 | 130 | BASE | [128] |
Cu | 659 | Si | 21.2/0 | 108 | BASE | [128] |
Xe | 1232 | Si | 49.3/0 | 148 | BASE | [128] |
C | 50 | Si | 3/0; 5.21/45; 9.13/60 | N/A | 1LAFN-USP | [130] |
Object/Methods | Content | Conclusion | Reference |
---|---|---|---|
SiO2/The high-energy heavy ions radiation simulator | Deduced the dependence of breakdown voltage on the deposition energy. | The breakdown voltage is a linear function of the residual charge after ion orbital recombination | [99,100] |
PLL/HIRFL | The radiation hardening of PLL (low-jitter phase-locked loop) | The SEE of hardened PLL are an order of magnitude higher than unhardened one | [107] |
SiGe HBT/TCAD | The SEE caused by heavy ions and lasers in SiGe HBT | There is a moderately high LET threshold for heavy ion radiation changing the decay mechanism observed in SiGe HBTs from exponential to fast exponential decay with significant diffusion tail | [110] |
GaN/TCAD | The SEE of GaN transistors after heavy-ion radiation | The self-polarization of the gate caused by the hole current originating from the ion beam leads to a momentary turn-on of the device. | [111] |
NPN transistor/EN Tandem Accelerator | The defect characteristics of the displacement caused by the irradiation of various heavy ions in an NPN transistor | The degradation of device electrical performance is NIEL independent. | [114] |
SiC Schottky power diodes/TCAD | The charge transport mechanism (current-voltage characteristics) of heavy-ion-causing damages in SiC structures. | The charge transport is controlled by space-limited charge flow | [121] |
SiC Schottky power diodes/TCAD | The SEB of SiC Schottky power diodes caused by the heavy ion. | The increment of the reverse leakage current induced by the heavy ion in the SiC-based device is caused by the synergistic effect of the energy deposition of the ions and the bias voltage. | [122] |
SiC Schottky power diodes/TCAD | The dependence of heavy ion-induced degradation on the incident angle and energy deposition in SiC Schottky diodes. | The heavy ion-induced degradation in SiC Schottky diodes is strongly dependent on incident angle. | [123] |
FRAMs/RADEF& GANIL | The effect of heavy ion on commercial FRAMs | The static flip-up cross section in FRAM devices is very low due to the intrinsic radiation hardness of the ferroelectric layer-based memory cells. | [126] |
16 nm NAND flash/BASE | The SEE of a Micron 16 nm NAND flash | The SEU cross-section is inversely proportional to the cumulative effect which in turn leads to unsteady rollover rates and contrary to the traditional assumption. | [128] |
16 nm FinFET/TCAD | The effects of heavy ion impact angles on the SEE of a 16-nm FinFET 3D TCAD model D-latch. | The probability of failure and the SEU cross-section increase with the increase of the tilt angle, but will decrease with the increase of the angle when heavy LET heavy ions are incident. | [129] |
28 nm SRAM/SRIM | The effect of the incidence and rotation angle of heavy LET ions on the MBU effect of an FPGA based on 28 nm SRAM. | The MUSCA SEP tool was used to highlight the angular configuration as a function of memory cell layout strongly influences sensitivity of CRAM and BRAM in FPGA Artix-7. | [130] |
Heavy Ion Accelerator Name | Conversion from Gaussian and CGS EMU to SI Accelerators | The Type of Particles Provided | The Energy of Particles Provided | Reference |
---|---|---|---|---|
HI-13 | Chinese Department of Nuclear Physics. | H~F, Al~Cl, Ca, Ag, Ti, Fe, Cu, Ge, Br, Nb, I, Hf, Au | ~100 MeV/u | [131] |
HIRFL | Chinese National Laboratory of Heavy Ion Accelerator of Lanzhou. | C~Ta | 1.22 MeV/u (238U72+) ~ 1100 (12C6+) MeV/u | [107] |
BNL-RHIC | Brookhaven National Laboratory in the United States. | Proton ~ Au | ~100 GeV(Au) | [140,142] |
BASE | Lawrence Berkeley National Laboratory in the United States. | B, Ne, Si, Ar, Cu, Xe et al. | ~10 MeV/ u(electron) | [128] |
RADEF | Jyväskylä in Finland. | N, Fe, Kr, Ne, Ar, Xe et al. | ~1217 MeV/u (Xe) | [126] |
GANIL | The University of Caen in France. | Xe, Kr et al. | 466/1217/1790 MeV/u (Xe)768 MeV/u (Kr) | [126] |
RIKEN-RIBF | Japan’s RIKEN | Proton ~ U | 440 MeV/u(Light ions) 350 MeV/u (Heavy ions) | [142,143] |
8UD | São Paulo | 12C, 16O, 28Si, 35Cl, 63Cu | ~32 MeV/u | [144] |
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Tian, W.; Ma, T.; Liu, X. TSV Technology and High-Energy Heavy Ions Radiation Impact Review. Electronics 2018, 7, 112. https://doi.org/10.3390/electronics7070112
Tian W, Ma T, Liu X. TSV Technology and High-Energy Heavy Ions Radiation Impact Review. Electronics. 2018; 7(7):112. https://doi.org/10.3390/electronics7070112
Chicago/Turabian StyleTian, Wenchao, Tianran Ma, and Xiaohan Liu. 2018. "TSV Technology and High-Energy Heavy Ions Radiation Impact Review" Electronics 7, no. 7: 112. https://doi.org/10.3390/electronics7070112