Figure 1.
Schematic of Smart Grid Interoperability Standard.
Figure 1.
Schematic of Smart Grid Interoperability Standard.
Figure 2.
Circuit diagram for bidirectional DC–DC converter.
Figure 2.
Circuit diagram for bidirectional DC–DC converter.
Figure 3.
Equivalent circuit for mode I.
Figure 3.
Equivalent circuit for mode I.
Figure 4.
Equivalent circuit for mode II.
Figure 4.
Equivalent circuit for mode II.
Figure 5.
Equivalent circuit for mode III.
Figure 5.
Equivalent circuit for mode III.
Figure 6.
Equivalent circuit for mode IV.
Figure 6.
Equivalent circuit for mode IV.
Figure 7.
Equivalent circuit for mode V.
Figure 7.
Equivalent circuit for mode V.
Figure 8.
Equivalent circuit for mode VI.
Figure 8.
Equivalent circuit for mode VI.
Figure 9.
Equivalent circuit for mode VII.
Figure 9.
Equivalent circuit for mode VII.
Figure 10.
Equivalent circuit for mode VIII.
Figure 10.
Equivalent circuit for mode VIII.
Figure 11.
Circuit diagram for multilevel inverter.
Figure 11.
Circuit diagram for multilevel inverter.
Figure 12.
Block diagram of PI controller: (a) Voltage control; (b) current control.
Figure 12.
Block diagram of PI controller: (a) Voltage control; (b) current control.
Figure 13.
Basic block set for fuzzy logic controller (FLC).
Figure 13.
Basic block set for fuzzy logic controller (FLC).
Figure 14.
Membership Functions of fuzzy sets: (a) Input 1(error); (b) input 2 (change in error); (c) output.
Figure 14.
Membership Functions of fuzzy sets: (a) Input 1(error); (b) input 2 (change in error); (c) output.
Figure 15.
Rule viewer plot for Rule 1.
Figure 15.
Rule viewer plot for Rule 1.
Figure 16.
Surface view of Rule 1.
Figure 16.
Surface view of Rule 1.
Figure 17.
Membership Functions for Rule 2: (a) Input 1(error); (b) input 2 (change in error); (c) output.
Figure 17.
Membership Functions for Rule 2: (a) Input 1(error); (b) input 2 (change in error); (c) output.
Figure 18.
Rule viewer plot for Rule 2.
Figure 18.
Rule viewer plot for Rule 2.
Figure 19.
Surface plot for Rule 2.
Figure 19.
Surface plot for Rule 2.
Figure 20.
Membership Functions for Fuzzy sets: (a) Input 1(error); (b) input 2 (change in error); (c) output.
Figure 20.
Membership Functions for Fuzzy sets: (a) Input 1(error); (b) input 2 (change in error); (c) output.
Figure 21.
Rule viewer plot for Rule 3.
Figure 21.
Rule viewer plot for Rule 3.
Figure 22.
Surface plot for Rule 3.
Figure 22.
Surface plot for Rule 3.
Figure 23.
Membership Functions for Rule 4: (a) Input 1(error); (b) Input 2 (change in error); (c) output.
Figure 23.
Membership Functions for Rule 4: (a) Input 1(error); (b) Input 2 (change in error); (c) output.
Figure 24.
Rule viewer plot for Rule 4.
Figure 24.
Rule viewer plot for Rule 4.
Figure 25.
Surface view of Rule 4.
Figure 25.
Surface view of Rule 4.
Figure 26.
Proposed Fuzzy control block: (a) Voltage; (b) current control.
Figure 26.
Proposed Fuzzy control block: (a) Voltage; (b) current control.
Figure 27.
Voltage control block using proposed hybrid technique.
Figure 27.
Voltage control block using proposed hybrid technique.
Figure 28.
Current control block using PI controller.
Figure 28.
Current control block using PI controller.
Figure 29.
Voltage control block for proposed hybrid controller-2.
Figure 29.
Voltage control block for proposed hybrid controller-2.
Figure 30.
Current controller using PI.
Figure 30.
Current controller using PI.
Figure 31.
Voltage control block for hybrid controller-3.
Figure 31.
Voltage control block for hybrid controller-3.
Figure 32.
Current control block using fuzzy logic.
Figure 32.
Current control block using fuzzy logic.
Figure 33.
Voltage control block for type 4 hybrid controller.
Figure 33.
Voltage control block for type 4 hybrid controller.
Figure 34.
Current control for type 4 hybrid controller.
Figure 34.
Current control for type 4 hybrid controller.
Figure 35.
Simulation diagram of bidirectional DC–DC converter with proposed controller.
Figure 35.
Simulation diagram of bidirectional DC–DC converter with proposed controller.
Figure 36.
Simulation diagram of multilevel inverter interfaced with controlled chopper circuit.
Figure 36.
Simulation diagram of multilevel inverter interfaced with controlled chopper circuit.
Figure 37.
Output voltage waveform for PI-controlled bidirectional converter (BDC).
Figure 37.
Output voltage waveform for PI-controlled bidirectional converter (BDC).
Figure 38.
Ripple waveform for output voltage of PI-based BDC.
Figure 38.
Ripple waveform for output voltage of PI-based BDC.
Figure 39.
Nine level output voltage waveform for MLI interfaced with PI based BDC.
Figure 39.
Nine level output voltage waveform for MLI interfaced with PI based BDC.
Figure 40.
Output voltage waveform for fuzzy-based BDC.
Figure 40.
Output voltage waveform for fuzzy-based BDC.
Figure 41.
Ripple voltage waveform for fuzzy-based BDC.
Figure 41.
Ripple voltage waveform for fuzzy-based BDC.
Figure 42.
Stepped voltage waveform for fuzzy-based BDC.
Figure 42.
Stepped voltage waveform for fuzzy-based BDC.
Figure 43.
Voltage profile for proposed hybrid controller-1.
Figure 43.
Voltage profile for proposed hybrid controller-1.
Figure 44.
Ripple voltage waveform for hybrid controller-1.
Figure 44.
Ripple voltage waveform for hybrid controller-1.
Figure 45.
Output voltage for MLI with hybrid controller circuit-based BDC.
Figure 45.
Output voltage for MLI with hybrid controller circuit-based BDC.
Figure 46.
Output voltage waveform for hybrid controller-2-based BDC.
Figure 46.
Output voltage waveform for hybrid controller-2-based BDC.
Figure 47.
Output voltage ripple waveform for hybrid controller-2-based BDC.
Figure 47.
Output voltage ripple waveform for hybrid controller-2-based BDC.
Figure 48.
Stepped voltage waveform for MLI interfaced with hybrid controller-2-based BDC.
Figure 48.
Stepped voltage waveform for MLI interfaced with hybrid controller-2-based BDC.
Figure 49.
Output voltage waveform for hybrid controller-3-based BDC.
Figure 49.
Output voltage waveform for hybrid controller-3-based BDC.
Figure 50.
Output voltage ripple for hybrid controller-3-based BDC.
Figure 50.
Output voltage ripple for hybrid controller-3-based BDC.
Figure 51.
Multilevel output voltage waveform for MLI interfaced with hybrid controller-3-based BDC.
Figure 51.
Multilevel output voltage waveform for MLI interfaced with hybrid controller-3-based BDC.
Figure 52.
Output voltage waveform for hybrid controller-4-based BDC.
Figure 52.
Output voltage waveform for hybrid controller-4-based BDC.
Figure 53.
Output voltage ripple waveform for hybrid controller-4-based BDC.
Figure 53.
Output voltage ripple waveform for hybrid controller-4-based BDC.
Figure 54.
Output voltage waveform for multilevel inverter interfaced with hybrid controller-4-based BDC.
Figure 54.
Output voltage waveform for multilevel inverter interfaced with hybrid controller-4-based BDC.
Table 1.
Switching combinations for multilevel inverter (MLI).
Table 1.
Switching combinations for multilevel inverter (MLI).
Vo | S1 | S2 | S3 | S4 | S5 | S6 | S7 | S8 | S9 |
---|
2Vdc | High | Low | High | High | High | High | High | Low | Low |
3Vdc/2 | High | Low | Low | High | High | High | Low | Low | High |
Vdc | High | Low | Low | High | High | Low | Low | High | Low |
Vdc/2 | High | Low | Low | High | Low | Low | Low | High | High |
0 | Low | High | Low | High | Low | Low | Low | High | High |
–Vdc/2 | Low | High | High | Low | Low | Low | Low | High | High |
–Vdc | Low | High | High | Low | High | Low | Low | High | Low |
–3Vdc/2 | Low | High | High | Low | High | High | Low | Low | High |
2Vdc | Low | High | High | Low | High | High | High | Low | Low |
Table 2.
Design parameters for PI controller.
Table 2.
Design parameters for PI controller.
Table 3.
Rules for fuzzy—Rule 1.
Table 3.
Rules for fuzzy—Rule 1.
Table 4.
Rules for fuzzy—Rule 2.
Table 4.
Rules for fuzzy—Rule 2.
| e | NB | NS | Z | PS | PB |
---|
ce | |
---|
NB | VL | VL | L | M | M |
NS | VL | VL | L | M | M |
Z | L | L | M | M | VH |
PS | M | M | H | VH | VH |
PB | M | M | H | VH | VH |
Table 5.
Rules for fuzzy—Rule 3.
Table 5.
Rules for fuzzy—Rule 3.
| R.V | NE-B | NE-S | ZE | PE-S | PE-B |
---|
F.V | |
---|
VVLV | MINL | MINL | MINL | MINS | MINS |
VLV | MINL | MINL | MINS | MINS | NOM |
LV | MINL | MINL | MINS | NOM | MINS |
M | MINS | MINS | NOM | MAXS | MAXS |
HV | MINS | NOM | MAXS | MAXS | MAXL |
VHV | NOM | MAXS | MAXS | MAXL | MAXL |
VVHV | MAXS | MAXS | MAXL | MAXL | MAXL |
Table 6.
Rules for fuzzy—Rule 4.
Table 6.
Rules for fuzzy—Rule 4.
|
RC | −2.5 | −1.5 | 0 | 1.5 | 2.5 |
---|
FC | |
---|
−2.5 | −1.01 | −1.01 | −1.01 | −0.31 | −0.01 |
−1.5 | −1.01 | −1.01 | −0.31 | −0.01 | 0.29 |
0 | −1.01 | −0.31 | −0.01 | 0.29 | 0.99 |
1.5 | −0.31 | −0.01 | 0.29 | 0.99 | 0.99 |
2.5 | −0.01 | 0.29 | 0.99 | 0.99 | 0.99 |
Table 7.
Simulation parameters.
Table 7.
Simulation parameters.
Specifications |
---|
Input Voltage (Vb) | 40 V |
Output Voltage (Vh) | 300 V |
Duty ratio (D) | 0.4–0.6 |
Turns Ratio (n) | 3 |
Leakage Inductance (Lleak) | 25 µH |
Magnetising Inductance (Lmag) | 20 µH |
Ca1,Ca2 | 10 µF |
Ch | 470 µF |
Cb | 2.5 µF |
Table 8.
Comparison of proposed controller circuits for BDC interfaced with MLI.
Table 8.
Comparison of proposed controller circuits for BDC interfaced with MLI.
PARAMETERS | PI Based BDC with MLI | Fuzzy Based BDC with MLI | Hybrid Controller for BDC interfaced with MLI |
---|
Type I | Type II | Type III | Type IV |
---|
Output Voltage (BDC) (in Volts) | 279.9 | 282.6 | 297.7 | 300.3 | 303.4 | 301.9 |
Ripple Voltage(BDC) (in Volts) | 4 | 3.5 | 3.3 | 2.9 | 2.5 | 2.8 |
Output voltage for MLI (in Volts) | 551.2 | 556.4 | 589.17 | 574.5 | 592.8 | 578.4 |
Table 9.
Performance parameters.
Table 9.
Performance parameters.
Parameter | PI Based Converter | Fuzzy Based Converter |
---|
Rise Time | 0.01 s | 0.001 s |
Settling Time | 0.6 s | 0.3 s |
Peak Time | 0.06 s | 0.04 s |