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Peer-Review Record

A Novel Address Scheme for Continuous-Flow Parallel Memory-Based Real-Valued FFT Processor

Electronics 2019, 8(9), 1042; https://doi.org/10.3390/electronics8091042
by Min Yuan, Zhenguo Ma, Feng Yu and Qianjian Xing *
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Electronics 2019, 8(9), 1042; https://doi.org/10.3390/electronics8091042
Submission received: 28 August 2019 / Accepted: 13 September 2019 / Published: 17 September 2019
(This article belongs to the Section Circuit and Signal Processing)

Round 1

Reviewer 1 Report

This is a very good paper that proposes a memory-based real-valued FFT architecture based on constant geometry.

The manuscript is well written and  organized, and the theory seems correct. The comparisons with other prior works are interesting.

Overall it is a solid work with interesting performance in terms of circuit resources and frequency efficiency.

Please correct some minor typos e.g. at row 185 "deigned", and so on.

Reviewer 2 Report

The authors present a modified constant-geometry based signal flow graph for memory-based real-valued fast Fourier transform architecture. The proposed method  exibits low memory requirements and  low computaional complexity.  In addition it  meets the constraint of in-place operation, concurrent I/O, normal-order I/O, variable size, and parallel processing. The presented experimental results confirm the  efficiency of the proposed address scheme.

The paper is mostly well written.

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