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Article
Peer-Review Record

A Novel Bidirectional DC-DC Converter for Dynamic Performance Enhancement of Hybrid AC/DC Microgrid

Electronics 2020, 9(10), 1653; https://doi.org/10.3390/electronics9101653
by Morteza Daviran Keshavarzi and Mohd Hasan Ali *
Reviewer 1: Anonymous
Reviewer 2: Anonymous
Electronics 2020, 9(10), 1653; https://doi.org/10.3390/electronics9101653
Submission received: 16 September 2020 / Revised: 2 October 2020 / Accepted: 4 October 2020 / Published: 11 October 2020
(This article belongs to the Section Industrial Electronics)

Round 1

Reviewer 1 Report

I think the paper is well written, and deserves publication. I have only minor suggestions.
- I would add D1 and D2 to fig 4, and D3 to fig 5. Even this does not apply to the considered case study (the vb is more than 500V), when considering low Vb voltages, the voltage drop on this diodes may be not negligible. So, for the sake of completeness, I suggest to add the diodes.
- Authors considers only CCM in the paper. is discontinuous mode observed or possible? I am expecting that for low charging/discharging currents (High load resistance in figure 9), the converter should either be turned off, or run in DCM
- To the best of my understanding, fig 9 has been plotted assuming Vb constant and equal to the nominal value (565V). Indeed, this usually does not happen in real system (see fig 16), and, of course, Rl depends both on Vdc and on Vb. Since both (12) and (14) can be expressed as a function of Vdc/Vb, I suggest authors to express Rl as a function of Vdc/Vb. The vertical asymptote will be at the nominal value 1.414

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Reviewer 2 Report

Comments and questions

  1. The voltage gain in discharge and charge modes is depending on the duty cycle by idealized relation (table 1, eq. (1), etc.) where the duty cycle in the denominator should not be equal one but it should not overcome the critical value given by parasitic issues and size of the load. There is not mentioned in the paper how the parasitics will affect the worked-out simulation results.
  2. The solution of system matrix equation (3) as mentioned in line 201 is not taken from [25], maybe from another reference, see item 4. Besides, it is only valid for zero initial conditions, did not it?
  3. The References are numbered from 1 to 25 but in the text form 1 up to 30. Then, it is hard to understand the text's meaning.
  4. Why the symbol for duty cycle is marked by the lower case in (4), (5)
    „?∈[0,1] is the duty ratio variable and ?′=1−?“.
    but in the system (6)-(10) by the upper case?
    „?=1−?′ is the steady-state value of duty ratio“.
  5. The concluded sentence in line 448 confirms that voltage gain as given by (1) is not valid generally but it depends, among other things, on the size of parasitics and the nature of the load (see comment 1).
  6. There is not mentioned in the paper how the deadtime of the transistors will affect the worked-out simulation results.
  7. There is not mentioned in the paper how the battery voltage inequality (vb1 not equal vb2) will affect the worked-out simulation results.
  8. The article does not contain any experimental verification, but it should be.
  9. It should be clearly stated the meaning of the abbreviations ILC, DER1, DER2 before Figure 2 where is the first time used. They are mentioned only in chapter 4 before the conclusion despite the fact that their function significances are obvious.

 

Author Response

Please see the attachment.

Author Response File: Author Response.pdf

Round 2

Reviewer 2 Report

In fact, I have no comments on the English language and its style, but there is no such opportunity to express.

The planned experimental verification of the proposed DC-DC converter should content also comparison to simulation analysis results.

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