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Volume 9
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10.3390/electronics9111936
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Article

Novel Full TMR Placement Techniques for High-Speed Radiation Tolerant Digital Integrated Circuits

by
Karel Appels
* and
Jeffrey Prinzie
Deptartment of Electrical Engineering (ESAT), KU Leuven, 3000 Leuven, Belgium
*
Author to whom correspondence should be addressed.
Electronics 2020, 9(11), 1936; https://doi.org/10.3390/electronics9111936
Submission received: 21 October 2020 / Revised: 10 November 2020 / Accepted: 12 November 2020 / Published: 17 November 2020
(This article belongs to the Special Issue Radiation Tolerant Electronics, Volume II)
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Abstract

This paper presents a novel physical implementation methodology for high-speed Triple Modular Redundant (TMR) digital integrated circuits for harsh radiation environment applications. An improved distributed approach is presented to constrain redundant branches of Triple Modular Redundant (TMR) digital logic cells using repetitive, interleaved micro-floorplans. To optimally constrain the placement of both sequential and combinational cells, the TMR netlist is used to segment the the logic into unrelated groups allowing sharing without compromising reliability. The technique was evaluated in a 65 nm bulk CMOS technology and a comparison is made to conventional methods.
Keywords: triple modular redundancy; 65 nm CMOS technology; single event effects; radiation hardening by design; digital integrated circuits triple modular redundancy; 65 nm CMOS technology; single event effects; radiation hardening by design; digital integrated circuits

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MDPI and ACS Style

Appels, K.; Prinzie, J. Novel Full TMR Placement Techniques for High-Speed Radiation Tolerant Digital Integrated Circuits. Electronics 2020, 9, 1936. https://doi.org/10.3390/electronics9111936

AMA Style

Appels K, Prinzie J. Novel Full TMR Placement Techniques for High-Speed Radiation Tolerant Digital Integrated Circuits. Electronics. 2020; 9(11):1936. https://doi.org/10.3390/electronics9111936

Chicago/Turabian Style

Appels, Karel, and Jeffrey Prinzie. 2020. "Novel Full TMR Placement Techniques for High-Speed Radiation Tolerant Digital Integrated Circuits" Electronics 9, no. 11: 1936. https://doi.org/10.3390/electronics9111936

APA Style

Appels, K., & Prinzie, J. (2020). Novel Full TMR Placement Techniques for High-Speed Radiation Tolerant Digital Integrated Circuits. Electronics, 9(11), 1936. https://doi.org/10.3390/electronics9111936

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